דרושים » הנדסה » Senior Analog /Mixed-Signal IC Design Engineer

We are looking for a hands-on Hardware Design Engineer to own the full hardware lifecycle - schematic capture, PCB layout, mixed signal circuit design, power architecture, bring-up, and regulatory certification - across current and next-generation hardware.

Responsibilities

Digital Hardware Design - MCU, PHY, Ethernet & PoE

Design the complete digital hardware stack: NXP i.MX RT MCU schematic and BGA layout, Ethernet PHY circuit and controlled-impedance Ethernet routing. Design and validate the IEEE 802.3af PoE front-end : PD handshake, mid/end-span bridge rectifiers, isolated flywheel buck , and optocoupler feedback regulation; analyse cross-domain IO level margins across all MCU interfaces to confirm safe driver/receiver operation.

RF & Analog Circuit Design

Design the ISM transmit chain and 2.4 GHz AoA receive chain; simulate match networks with ADS or equivalent and validate with VNA S-parameter measurements.

PCB Design & Layout

PCB layout: Define stack-up and controlled-impedance rules; route high pin-count BGAs and high-speed peripherals with length tuning; partition RF, digital, and power domains for FCC/ETSI compliance.

Power, calibration & test: Design DCDC/LDO supplies and power distribution; define hardware test procedures for RF power and frequency calibration at production.

Production Support

Failure analysis (field & manufacturing)

Yield improvement

Cost reduction

Post-Silicon Verification Support

Required Post-Silicon Validation Engineer
About The Position
We build cutting-edge radar chipsets for next-generation automotive sensing systems. As a Post-Silicon Validation Engineer, you will play a critical role in bringing complex mixed-signal ICs from silicon to system readiness.
Responsibilities
Perform validation of advanced radar ICs from bring-up through full functional and performance testing
Translate system and chip-level requirements into comprehensive validation plans and test cases
Develop automated test environments using lab instrumentation and custom scripts
Execute silicon bring-up and validate key subsystems (clocking, power, CPU, interfaces, sensors)
Perform electrical and parametric validation, including high-speed, power, and interface testing
Run characterization across PVT conditions and analyze large datasets
Debug complex silicon issues and work closely with design, verification, and system teams
Support device readiness for system integration and productization.

Required Senior Analog Design Engineer, Cloud
Note: By applying to this position you will have an opportunity to share your preferred working location from the following: Tel Aviv, Israel; Haifa, Israel.
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As a Staff Analog Design Engineer, you will design and integrate analog sub-systems. You will be responsible for ensuring the Analog Front-End (AFE) communicates flawlessly with the Digital Signal Processor (DSP), the package and silicon are a single electrical entity. Your work will bridge the analog and digital worlds to enable industry-leading performance.
We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including our Clouds Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.
Responsibilities
Own the architecture and implementation of a major sub-component, such as the entire receiver AFE or the clocking/Phase-Locked Loop (PLL) distribution network.
Design the critical "suspension system" (e.g., Equalization/CTLE, ADC) that allows the digital core to function perfectly despite a noisy, high-loss channel.
Lead the definition and design of test chips to verify out novel topologies and circuit techniques in next-generation Gate-All-Around (GAA) nodes.
Collaborate with DSP, firmware, and system architects to define hardware/software partitioning and interface specifications.
Provide technical guidance and mentorship to engineers on the team.

we are establishing a strategic R&D center in Israel to drive the development of complex semiconductor chips that solve the critical 'data bottlenecks' enabling the future of AI at scale. As we expand our presence in Israel, we're seeking a highly skilled Physical Design Engineer specializing in EMIR CAD to join our local engineering powerhouse from the ground up.
This is a unique opportunity to take on meaningful technical ownership in a new site, executing the backend power methodologies for chips that power the world's largest AI clusters. As a Physical Design Engineer, you will be a core technical contributor ensuring the power robustness and long-term reliability of our high-performance connectivity silicon.
You will continuously develop the Electro-Migration and IR Drop (EMIR) flow, working closely at the intersection of Physical Design, Analog/Mixed-Signal design, and Package Engineering.
Key Responsibilities
Take responsibility on IR drop analysis and signal/power electromigration (EM) flow
Implement and maintain robust EMIR flows and methodologies using industry-standard tools (Ansys RedHawk-SC, Cadence Voltus, or equivalent)
Collaborate closely with Analog/SerDes designers to integrate current profiles and ensure robust power delivery to sensitive high-speed IP blocks
Partner with Package Design engineers to perform Chip-Package-System (CPS) co-analysis flow
Understand root-cause analysis for voltage drop violations and EM risks
Support silicon bring-up by correlating simulation results with actual silicon measurements and yield data.

We are looking for an experienced Design Engineer to join the YU design team and develop the next generation technologies.

As a design engineer in the YU design team, you will participate in definition and implementation of our boot and chiplet control technologies in various projects. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting Switches, Nic and SoC product lines. We are working closely with a wide range of aspects - chip design, backend, verification and production testing. We are working on the most advanced technologies and sophisticated products, our solutions are unique, innovative, and we are continuously improving and evolving the solutions to meet the challenging goals.

What you'll be doing:
In this position, you will be responsible for defining, coding and integrating sophisticated boot components into various projects and using state-of-the-art technologies.
As a member of our YU design team, you will participate in defining various boot and chip controller features and improvements, write micro-architecture documents, code design blocks, integrate them into various projects, bring your design to silicon tape-out and silicon testing and production.
Strong collaboration with architects, other design teams, verification, back-end and production testing to accomplish your tasks.