We are seeking a highly skilled Senior Communication PHY Algorithms Engineer.
This senior role is focused on the end-to-end research, design, and implementation of digital receivers for proprietary drone communication signals.
Responsibilities:
Mathematically characterize complex communication and signal detection problems. Analyze and assess design trade-offs based on both performance metrics and implementation complexity.
Develop and maintain simulations using MATLAB and Python.
Design digital receiver modules to be implemented either by FPGA of SW.
Implement features directly in SW or technically lead and verify the FPGA implementation efforts of the FPGA engineer.
Accompany the integration process of the feature until its end-to-end operation.

We are seeking a Communication PHY Algorithms Engineer.
This role is focused on the end-to-end research, design, and implementation of digital receivers for proprietary drone communication signals.
Responsibilities:
Mathematically characterize complex communication and signal detection problems. Analyze and assess design trade-offs based on both performance metrics and implementation complexity.
Develop and maintain simulations using MATLAB and Python.
Design digital receiver modules to be implemented either by FPGA of SW.
Implement features directly in SW or technically lead and verify the FPGA implementation efforts of the FPGA engineer.
Accompany the integration process of the feature until its end-to-end operation.

The System team defines and develops cutting-edge 5G technology. In this role, you will lead the system team responsible for defining our next-generation modem products and developing modem algorithms, working at the intersection of research, system design, and implementation.

Responsibilities

Lead a team of senior system and algorithm engineers responsible for developing innovative 5G modems.

Partner closely with VLSI and SW teams implementing the modem HW and SW and align on system definitions with implementation constraints.

Develop and maintain deep expertise in cellular standards and their implications for modem design.

Lead system and algorithmic research, balancing trade-offs between DSP/SW/HW implementations, performance, implementation cost, real-time constraints, and time-to-market.

Own system definitions, requirements, and implementation from initial research through simulation to official release, including MATLAB/C/C++/SystemC modeling and specification documentation.

Mentor and grow team members, fostering technical excellence and professional development.

We are looking for an experienced system engineer to participate and lead the development of a radio-based drone detection and mitigation system as part of the company products.
Responsibilities:
Lead features and platforms from ideas to releases.
Guide and participate in the research and analysis of both proprietary and standard radio communication
protocols.
Develop and optimize algorithms for scanning, signal separation, antenna selection, etc.
Define requirements and guide other multi-disciplinary teams (SW, Modem algorithms, DSP, and FPGA) through
implementation and debugging.
Analyze and define complex system behaviors, state machines, algorithms, and event-response logic, including
radio link budget considerations.
Perform independent, hands-on debugging and optimization for system problem-solving using tools like
MATLAB, Python, Excel, and other log analysis software.
Gain a deep understanding of the full system to guide and support development, testing and validation teams.

Required Radar & Cyber System Engineer
Scope:
As a Systems Engineer, you will bridge the gap between high-level concepts and real-world execution. You will lead multi-system features from initial idea to release, acting as the key integrator across multiple internal systems developed by our various R&D teams, while also bridging the technical gap with external vendors to bring our unified technology to life in the field.
Key Responsibilities:
Lead complex, multi-system features and platforms from initial concept through design, implementation, and release.
Analyse, define, and debug complex system behaviours, state machines, algorithms, and event-response logic (including radio link budget considerations).
Define requirements and guide multi-disciplinary teams-spanning both our internal engineering groups (SW, HW, Modem, DSP, FPGA) and external vendors-through implementation, debugging, and integration.
Lead the integration of internal subsystems and optimize the integration of external vendor technologies.
Perform independent, hands-on debugging using Python or Matlab and log analysis tools.
Actively participate in, guide, and lead lab and field testing, validation, and system optimization both in the lab and in outdoor environments.

We are looking for a highly skilled RF Test Automation Developer to join our R&D Integration Automation team.
This role is focused on designing, developing, and maintaining advanced automation solutions across unit, integration, system, and end-to-end testing levels.
The ideal candidate is a hands-on developer with strong expertise in Python and Pytest, experienced in building and executing automated tests, and comfortable working with modern CI/CD pipelines and automation tools.
The Senior Developer will act as a technical mentor and key contributor, ensuring best practices are followed and test automation is seamlessly embedded into the development lifecycle.
Knowledge of RF systems is a strong plus.
Key Responsibilities:
Develop and maintain automated RF test development tools using Python and other relevant programming languages.
Configure, calibrate, and operate RF test equipment such as Vector Signal Generators (VSGs), Spectrum Analyzers (SAs), and related instruments.
Create and validate RF test setups for performance validation, debug, and system characterization.
Analyze test results, generate comprehensive reports, and present findings to cross-functional teams.
Collaborate with hardware and software engineers to integrate automated RF testing into the product development cycle.
Stay current with emerging RF technologies and testing methodologies, proposing and implementing improvements to existing test processes.
Contribute to the development of RF testing strategies aligned with R&D goals and product roadmaps.
Research and introduce innovative RF automation tools, frameworks, and workflows aligned with R&D goals.

Required RF/HW & System Validation Engineer
Scope:
As an RF/HW Validation Engineer, you will bridge the gap between HW/RF validation and complex system-level testing. You will design, develop, and execute automated and manual test plans to verify the performance, reliability, and compliance of our SDR (Software Defined Radio) architectures and multi-layered tactical systems (including integration with other systems).
Key Responsibilities:
System-Level Testing: Execute end-to-end system testing of counter-drone platforms, verifying the integration of RF hardware, firmware, and complex software-defined radio algorithms under real-world scenarios.
Hardware Product Testing: Test and validate various HW products, including antennas, radar systems, jammers, and related peripherals.
Failure Analysis & Troubleshooting: Debug complex RF anomalies, signal integrity issues, and system bugs down to the component/board level, working closely with RF Design, Board Design, and SW teams.
Documentation: Create comprehensive test plans (ATP/DTP), write test reports, and present data-driven analysis to cross-functional R&D teams to impact the next generation of hardware.

We are seeking a highly motivated High-Performance System Architect to join our team of experts and help shape the future of high-performance and ML / AI computing. Our next-generation NVL systems will be at the forefront of connecting and powering the world's most advanced compute clusters, from supercomputers used in AI research to high-performance clusters used at almost every industry today, such as car and Pharmaceutical. As a high-performance system architect, you will have the opportunity to work on some of the most cutting-edge technology and help to drive the innovation of our next generation networks that will be used by top researchers and engineers around the world.

What youll be doing:

Define the NVL system architecture end-to-end, by internal requirements and customers requirements through all product life cycles (post/pre silicon, on deployments).

Research of various solutions to enable the next large-scale-high-performance computing clusters. The position spans over various layers from algorithms, software, firmware, and HW.

Developing models for simulations and performance testing, analysing the results and development of future HW and SW.

Collaborate with cross-functional teams, including other architecture teams, logic design, system software, firmware, and research teams, to ensure the successful execution of the project.

We are looking for a motivated Hardware Engineer to join our Hardware team in Raanana.

You will have the chance to develop your own skills in a flexible and energetic work atmosphere with friendly and experienced colleagues. You will have helpful supervision, opportunity to learn, modern tools and flexible work culture.

If you want to be a part of our growing company that is driven by innovation and is focused on building a future together with our employees, consider applying.

Principle duties and responsibilities:

Design hardware modules, subsystems and systems for synchronization products.

Develop schematics and guide PCB layout (high-speed, mixed-signal, power).

Select and evaluate components (ICs, power devices, oscillators, interfaces).

Design high-speed interfaces (e.g., 10G/25G Ethernet) with signal integrity considerations.

Contribute to hardware design specifications (HDS) and documentation.

Support system-level integration (HW, FPGA, SW).

Define and execute validation and integration test plans.

Debug complex board and system-level issues (mixed-signal, high-speed).

Perform lab bring-up, measurements, and performance characterization.

Support product transfer to manufacturing (NPI).

Collaborate with manufacturing and test teams for production readiness.

Investigate and resolve issues during production and field operation.

Ensure product reliability, quality, and compliance with applicable standards.

Functional Collaboration.

Work closely with FPGA, software, system, SIT/SVT and mechanical teams.

Participate in design reviews and technical discussions.

Interface with suppliers and external partners as required.

Evaluate and introduce new technologies and components.

Drive improvements in performance, power efficiency, and cost.

Contribute to system architecture discussions and design trade-offs.

We are seeking a talented, high-speed board design expert to own the detailed implementation and industrialization of our next-generation Counter-UAS (C-UAS) processing units.
As we scale to a complex, multi-product ecosystem featuring deep multi-sensor fusion, you will actively participate in shaping digital hardware architectures while leading the hands-on engineering from schematic design to mass production.
This position demands deep expertise in complex, multi-layer carrier board design specifically utilizing Intel processors and COM Express (COMe) architectures, as well as robust simulation and production methodologies.
Key Responsibilities:
Hardware Design Execution: Own the full lifecycle of complex digital hardware boards from schematic capture, component selection, and power distribution network (PDN) design through to high-yield mass production.
Architecture Collaboration: Actively participate in defining the digital hardware architecture, collaborating closely on modular computing strategies, baseboard optimizations, and multi-sensor integration.
Intel & COM Express Integration: Lead the detailed layout and integration of high-performance Intel processors and COM Express (COMe) form factors, managing complex, dense high-speed buses (PCIe Gen 4/5, DDR4/DDR5, 10GbE, USB4).
Simulation & Signal Integrity: Execute rigorous pre- and post-layout Signal Integrity and Power Integrity (SI/PI) simulations to guarantee precise timing margins, stable power delivery, and low-noise performance on dense, fine-pitch BGA footprints.
Production Scale-Up & DFx: Champion Design for Excellence (DFM, DFA, DFT) methodologies, boundary-scan testability, and detailed verification hardware documentation to ensure flawless transfer to manufacturing lines and eliminate field escalations.
Cross-Discipline Collaboration: Work closely with subcontractors (layout) and other R&D disciplines-including FPGA, Embedded SW, Cyber, and Mechanical engineering-to resolve interdisciplinary space, thermal, and noise constraints.