דרושים » הנדסה » System Engineer

Required Radar & Cyber System Engineer
Scope:
As a Systems Engineer, you will bridge the gap between high-level concepts and real-world execution. You will lead multi-system features from initial idea to release, acting as the key integrator across multiple internal systems developed by our various R&D teams, while also bridging the technical gap with external vendors to bring our unified technology to life in the field.
Key Responsibilities:
Lead complex, multi-system features and platforms from initial concept through design, implementation, and release.
Analyse, define, and debug complex system behaviours, state machines, algorithms, and event-response logic (including radio link budget considerations).
Define requirements and guide multi-disciplinary teams-spanning both our internal engineering groups (SW, HW, Modem, DSP, FPGA) and external vendors-through implementation, debugging, and integration.
Lead the integration of internal subsystems and optimize the integration of external vendor technologies.
Perform independent, hands-on debugging using Python or Matlab and log analysis tools.
Actively participate in, guide, and lead lab and field testing, validation, and system optimization both in the lab and in outdoor environments.

We are seeking a highly skilled Senior Communication PHY Algorithms Engineer.
This senior role is focused on the end-to-end research, design, and implementation of digital receivers for proprietary drone communication signals.
Responsibilities:
Mathematically characterize complex communication and signal detection problems. Analyze and assess design trade-offs based on both performance metrics and implementation complexity.
Develop and maintain simulations using MATLAB and Python.
Design digital receiver modules to be implemented either by FPGA of SW.
Implement features directly in SW or technically lead and verify the FPGA implementation efforts of the FPGA engineer.
Accompany the integration process of the feature until its end-to-end operation.

We are seeking a Communication PHY Algorithms Engineer.
This role is focused on the end-to-end research, design, and implementation of digital receivers for proprietary drone communication signals.
Responsibilities:
Mathematically characterize complex communication and signal detection problems. Analyze and assess design trade-offs based on both performance metrics and implementation complexity.
Develop and maintain simulations using MATLAB and Python.
Design digital receiver modules to be implemented either by FPGA of SW.
Implement features directly in SW or technically lead and verify the FPGA implementation efforts of the FPGA engineer.
Accompany the integration process of the feature until its end-to-end operation.

Required RF/HW & System Validation Engineer
Scope:
As an RF/HW Validation Engineer, you will bridge the gap between HW/RF validation and complex system-level testing. You will design, develop, and execute automated and manual test plans to verify the performance, reliability, and compliance of our SDR (Software Defined Radio) architectures and multi-layered tactical systems (including integration with other systems).
Key Responsibilities:
System-Level Testing: Execute end-to-end system testing of counter-drone platforms, verifying the integration of RF hardware, firmware, and complex software-defined radio algorithms under real-world scenarios.
Hardware Product Testing: Test and validate various HW products, including antennas, radar systems, jammers, and related peripherals.
Failure Analysis & Troubleshooting: Debug complex RF anomalies, signal integrity issues, and system bugs down to the component/board level, working closely with RF Design, Board Design, and SW teams.
Documentation: Create comprehensive test plans (ATP/DTP), write test reports, and present data-driven analysis to cross-functional R&D teams to impact the next generation of hardware.

We are looking for a highly skilled RF Test Automation Developer to join our R&D Integration Automation team.
This role is focused on designing, developing, and maintaining advanced automation solutions across unit, integration, system, and end-to-end testing levels.
The ideal candidate is a hands-on developer with strong expertise in Python and Pytest, experienced in building and executing automated tests, and comfortable working with modern CI/CD pipelines and automation tools.
The Senior Developer will act as a technical mentor and key contributor, ensuring best practices are followed and test automation is seamlessly embedded into the development lifecycle.
Knowledge of RF systems is a strong plus.
Key Responsibilities:
Develop and maintain automated RF test development tools using Python and other relevant programming languages.
Configure, calibrate, and operate RF test equipment such as Vector Signal Generators (VSGs), Spectrum Analyzers (SAs), and related instruments.
Create and validate RF test setups for performance validation, debug, and system characterization.
Analyze test results, generate comprehensive reports, and present findings to cross-functional teams.
Collaborate with hardware and software engineers to integrate automated RF testing into the product development cycle.
Stay current with emerging RF technologies and testing methodologies, proposing and implementing improvements to existing test processes.
Contribute to the development of RF testing strategies aligned with R&D goals and product roadmaps.
Research and introduce innovative RF automation tools, frameworks, and workflows aligned with R&D goals.

We are seeking a high-caliber, multidisciplinary Hardware Systems Architect & Tech Lead to serve as the technical cornerstone of our hardware development and system integration.
In this role, you will bridge high-level system requirements with physical deployment reality, acting as the designated "Tech Lead" driving day-to-day engineering execution.
This role demands a "System of Systems" mindset. Beyond engineering our core SDR and RF hardware architectures, you will orchestrate the physical, logical, and electrical integration of complex tactical sensor suites - incorporating software-defined radios, active/passive radar arrays, electro-optical (EO/IR) cameras, and jamming payloads.
You will steer the hardware through its entire lifecycle (PLCM) while implementing flawless Design for Excellence (DFx) frameworks.
KEY RESPONSIBILITIES:
System of Systems Integration: Architect, model, and define hardware-level interfaces and high-speed data flow paths for multi-sensor integration (SDR, Active/Passive Radar, EO/IR Cameras, and RF Jamming payloads).
Requirements Definition: Translate high-level operational and product demands into detailed, actionable hardware and system-level requirements, Interface Control Documents (ICDs), and structural specifications.
System Modeling: Establish and manage rigorous physical power, thermal, high-speed data bandwidth, and RF link budgets for deeply integrated tactical configurations.
Technical Ownership: Direct day-to-day engineering activities, lead comprehensive design reviews, and serve as the final authority on architectural and hardware design trade-offs.
Product Lifecycle Management (PLCM): Guide hardware products smoothly through the entire lifecycle-from early concept and prototyping to mass production, validation, field deployment, and subsequent obsolescence management.
Cross-Functional Orchestration: Align and coordinate specialized teams across RF/Analog, high-speed digital, FPGA, embedded software, and mechanical engineering to achieve seamless hardware/software synergy.
Test Strategy Definition: Architect and define the end-to-end testing, verification, and validation (V&V) strategy for complex hardware-software systems.
Progressive Integration: Design and oversee methodical integration plans, successfully migrating subsystems from standalone bench testing to full "System of Systems" integration.
System Verification: Oversee high-reliability Hardware-in-the-Loop (HIL) testing, RF performance verification, and automated test regression setups.
Operational Validation: Partner with field testing and QA teams to design real-world tactical validation scenarios (including drone flight trials and complex RF interference environments) to ensure top performance in the field.
DFx Implementation: Drive critical design decisions optimizing for manufacturability (DFM), automated testing (DFT), reliability (DFR), and target cost (DFC) without sacrificing tactical performance.

We are looking for a motivated Hardware Engineer to join our Hardware team in Raanana.

You will have the chance to develop your own skills in a flexible and energetic work atmosphere with friendly and experienced colleagues. You will have helpful supervision, opportunity to learn, modern tools and flexible work culture.

If you want to be a part of our growing company that is driven by innovation and is focused on building a future together with our employees, consider applying.

Principle duties and responsibilities:

Design hardware modules, subsystems and systems for synchronization products.

Develop schematics and guide PCB layout (high-speed, mixed-signal, power).

Select and evaluate components (ICs, power devices, oscillators, interfaces).

Design high-speed interfaces (e.g., 10G/25G Ethernet) with signal integrity considerations.

Contribute to hardware design specifications (HDS) and documentation.

Support system-level integration (HW, FPGA, SW).

Define and execute validation and integration test plans.

Debug complex board and system-level issues (mixed-signal, high-speed).

Perform lab bring-up, measurements, and performance characterization.

Support product transfer to manufacturing (NPI).

Collaborate with manufacturing and test teams for production readiness.

Investigate and resolve issues during production and field operation.

Ensure product reliability, quality, and compliance with applicable standards.

Functional Collaboration.

Work closely with FPGA, software, system, SIT/SVT and mechanical teams.

Participate in design reviews and technical discussions.

Interface with suppliers and external partners as required.

Evaluate and introduce new technologies and components.

Drive improvements in performance, power efficiency, and cost.

Contribute to system architecture discussions and design trade-offs.

we are seeking a highly motivated Power Integrity Engineer to join our Hardware Engineering team. In this role, you will be responsible for defining, analyzing, simulating, and validating power delivery networks (PDNs) for next-generation networking platforms supporting high-performance ASICs, advanced SerDes interfaces, optical modules, and AI-scale networking systems.
You will work closely with hardware architects, PCB designers, ASIC teams, signal integrity engineers, mechanical engineers, and manufacturing partners to ensure robust power delivery, optimal system performance, and successful product deployment.
Responsibilities:
Lead Power Integrity (PI) activities throughout the hardware development lifecycle, from architecture through production.
Define and optimize board-level and package-level Power Delivery Networks (PDNs) for high-current networking ASICs and supporting devices.
Perform pre-layout and post-layout PI simulations using industry-standard tools.
Establish target impedance requirements and validate compliance across all power rails.
Analyze DC voltage drop, AC impedance, transient response, and power distribution performance.
Collaborate with PCB layout engineers to optimize stackups, plane structures, decoupling strategies, and power routing.
Work closely with Signal Integrity engineers to ensure SI/PI co-optimization of high-speed interfaces.
Develop power integrity design guidelines and best practices for next-generation networking products.
Support schematic reviews, layout reviews, and design sign-off activities.
Perform laboratory measurements and correlation using oscilloscopes, VNAs, power analyzers, current probes, and related equipment.
Investigate and resolve PI-related issues during board bring-up, validation, and production.
Collaborate with ASIC, FPGA, memory, optics, and power component vendors to optimize overall system performance.
Drive continuous improvement of PI methodologies, simulation flows, and validation processes.

We are looking for somone to join our WiFi hardware team.
Our team operates in an AI-driven environment where we leverage cutting-edge AI tools to enhance productivity, code quality, and reduce development timelines. You'll be expected to actively utilize and promote AI-assisted development practices within the team.
What you'll do:
In this role, you will work on defining, developing and debugging validation environments for TIs wireless MCU products targeted at Industrial markets. You'll Deep dive into both low level and system level modules, ensure compliance with specifications, collaborate with experienced software, Architecture, design and verification teams and build your skills through hands-on projects and dedicated mentorship.

In this role, as Senior Team Leader of the AI NPU Simulator, you will lead a Group developing a major part of our companys AI simulation framework, in the core of our AI software offering. The AI NPU simulator enables the execution of state-of-the-art LLMs, Generative AI models, and neural networks with exceptional performance, impacting multiple hardware and software teams across the company.
You will drive the development of robust, scalable, and efficient simulation software, working closely with global Architecture, VLSI, and Software teams to shape our companys next generation of AI solutions.
We are looking for an exceptional hands-on leader with strong technical expertise, proven experience leading software teams, and a track record of delivering complex, state-of-the-art products on time and with high quality. The ideal candidate is execution-driven, innovative, and passionate about building high-performing teams and cutting-edge AI technology.
Responsibilities
Manage and lead two teams (Development + Validation) .
Be accountable for the simulation lifecycle, including architecture, development, validation, and release.
Lead development of advanced simulation models for AI processors.
Own delivery of complex, multi-release roadmaps.
Ensure strong alignment between hardware design, compiler behavior, and simulation models.
Drive system-level correctness and performance accuracy.
Support system bring-up, debugging, and customer-facing activities when needed.