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1 ימים
Location: Yokne`am
Job Type: Full Time
perform physical layout for mixed-signal functions like pll's, high speed i/o circuits, serdes, general i/o's, esd structures designs in state-of-the-art sub-micron cmos finfet technologies using cadence tools
you will work with asic and mixed-signal engineers to customize designs for integration in vlsi products.
job duties will include floor planning, custom layout and verifying against design rules and schematics, em/ir analysis
Requirements:
what we need to see:
you will have a minimum of 8 years of relevant mask analog layout experience
an electronics practical engineer certificate or a b.sc. in electrical engineering
proven understanding of analog circuit layout concepts in submicron cmos technologies - such as operational amplifiers and adc/dacs.
you are an expert with cadence custom circuit design tools - particularly virtuoso
experience running and debugging drc and lvs with verification tools such as icv, calibre
you can work effectively in a team, good interpersonal skills, enthusiasm and positive energy.
ways to stand out in the crowd:
proficiency in scripting languages like Python, skill
knowledge of drc and lvs checking flows, em/ir tools, ability to customize drc and lvs decks
This position is open to all candidates.
 
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1 ימים
Location: Yokne`am
Job Type: Full Time
what you'll be doing:
support and develop solutions that will improve the efficiency and quality of the mixed-signal group.
define, develop, and maintain in-house, along with industrial utilities, solutions for schematic, layout, package and physical-verification in the fields of costume and eda vendor tools (cadence virtuoso, mentor calibre, synopsys icv and more), environment, and general-purpose solutions.
write, customize and debug icv/calibre runsets of drc, lvs, ext.
skill coding including pcells development.
scripting and programing for ad-hoc solutions and wide tasks solutions.
work closely with nvidias world-wide mixed-signal and technology teams.
Requirements:
what we need to see:
a minimum of 5 years of meaningful experience and a relevant education
experience with cadence custom circuit design tools and skill language.
experience running and debugging drc and lvs with verification tools such as icv, calibre.
effectively teamwork, good interpersonal skills, passion, and positive energy.
very good english.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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1 ימים
Location: Yokne`am
Job Type: Full Time
our company has continuously reinvented itself over two decades. our invention of the gpu in 1999 sparked the growth of the pc gaming market, redefined modern computer graphics, and revolutionized parallel computing. more recently, gpu deep learning ignited modern ai - the next era of computing. our company is a learning machine that constantly evolves by adapting to new opportunities that are hard to seek, that only we can pursue, and that matter to the world. this is our lifes work, to amplify human creativity and intelligence. make the choice to join us today.
what youll be doing:
working closely with product design engineers, you'll perform pcb layout of high speed/high-density value-conscious pcbs for all business units at our company (gpu desktop, notebook, automotive, professional, data center, deep learning, and ai), all using cadence pcb design tools.
focus will be on the complete development of cad layout from symbol creation, floor planning, and detailed component placement, constraints management, with a concept of topology and signal/trace integrity.
you will be responsible for the design releases required generation of artwork files, odb++, and electronic pcb documentation.
your designs will need to follow si constraints, emi/rfi control and fcc, ul and european regulations, ipc specifications and nrc regulations.
Requirements:
what we need to see:
b.sc. in Electronic Engineer degree or equivalent experience.
5+ years of experience in high-speed design.
having a detailed knowledge of circuit design and consideration for layout, routing, and timing constraints, dfm, dfa, dft constraints in volume manufacturing is needed for this role.
be an authority in using cadence allegro pcb design tools.
have a deep understanding of high-density interconnect pcb layout and pcb signal integrity.
knowledge in pcb manufacturing processes for hdi, standard thru-hole, and back-drilling.
proven ability to work with a team while taking personal responsibility for your own contributions.
agility in changing focus as the needs of our effort evolve.
strong leadership, communication, and presentation abilities.
ways to stand out from the crowd:
experience in crafting pcbs in the 25gbps + range using back-drilling technology.
designing sophisticated multi-layer hdi pcb's for very dense placement and routing is helpful.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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1 ימים
Location: Yokne`am
Job Type: Full Time
we are looking for best-in-class physical design engineers to join our outstanding networking silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.
what you'll be doing:
you will be responsible for chip floorplan and pin placement, ensuring integration within our innovative builds.
we expect you to run, debug, and approve physical verification flows across multiple projects, ensuring strict adherence to our high standards.
you will perform physical layout implementation, planning and optimization, contributing to the development of our groundbreaking chips.
we are widely considered to be one of the technology worlds most desirable employers. we have some of the most forward-thinking people in the world working for us. are you a creative and autonomous engineer who loves a challenge? are you ready to become the engineer you always wanted to be? come and be part of the best physical design team in the industry!
Requirements:
b.sc./ m.sc. in electrical engineering
you should have at least 5+ years of hands-on layout experience, demonstrating your proven expertise.
a strong background in physical verification methodology, including erc, lvs and drc, is necessary.
in-depth knowledge of advanced silicon process technologies.
familiarity with physical build eda tools, including synopsys and cadence.
a great teammate who thrives in a collaborative environment.
ai tools orientation or alternatively a desire to learn.
ways to stand out from the crowd:
experience in Linux environments.
tcl, Python, shell scripting abilities.
experience with data collection and analysis
understanding of the chip and die verification process
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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1 ימים
Location: Yokne`am
Job Type: Full Time
come join the team and see how you can make a lasting impact on the world.
what youll be doing:
analyze pcb designs for manufacturability (dfm) and assembly (dfa) and identify issues early in the design cycle.
collaborate with hardware, layout, and manufacturing teams to ensure design intent aligns with production capabilities.
use cad tools such as cadence allegro and siemens valor to review and optimize pcb layouts.
participate in design reviews and cross-functional meetings to address manufacturing constraints and improve design quality.
document and promote best practices and dfm/dfa guidelines across teams.
support root cause analysis and resolution of manufacturing issues during new product introduction.
stay current with industry standards and emerging pcb manufacturing technologies.
Requirements:
what we need to see:
bachelors degree in electrical, electronics, mechanical, or manufacturing engineering (or equivalent experience)
at least 8 years industry experience.
deep understanding of pcb manufacturing and assembly processes with advanced technologies (bga, fine-pitch, hdi, high-speed designs, rigid- Flex )
experience with valor npi
familiarity with pcb design tools (e.g., altium designer, eagle, orcad).
solid understanding of pcb design fundamentals and dfm/dfa principles.
strong analytical and communication skills with attention to detail.
ability to work in a fast-paced, multidisciplinary environment and adapt to changing priorities.
ways to stand out from the crowd:
internship or project experience in pcb design.
experience with design rule checks, gerber file generation, and industry standards.
familiarity with high-volume manufacturing environments and failure analysis workflows.
passion for continuous improvement and process optimization.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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8593818
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02/03/2026
Location: Ra'anana and Yokne`am
Job Type: Full Time
What youll be doing:
Working closely with product design engineers, you'll perform PCB layout of high speed/high-density value-conscious PCBs for all our business units (GPU Desktop, Notebook, Automotive, Professional, Data Center, Deep Learning, and AI), all using Cadence PCB design tools.
Focus will be on the complete development of CAD layout from symbol creation, floor planning, and detailed component placement, constraints management, with a concept of topology and signal/trace integrity.
You will be responsible for the design releases required generation of artwork files, ODB++, and electronic PCB documentation.
Your designs will need to follow SI constraints, EMI/RFI control and FCC, UL and European regulations, IPC specifications and NRC regulations.
Requirements:
What we need to see:
B.Sc. in Electronic Engineer degree or equivalent experience.
5+ years of experience in high-speed design.
Having a detailed knowledge of circuit design and consideration for layout, routing, and timing constraints, DFM, DFA, DFT constraints in volume manufacturing is needed for this role.
Be an authority in using Cadence Allegro PCB design tools.
Have a deep understanding of High-Density Interconnect PCB layout and PCB Signal Integrity.
Knowledge in PCB manufacturing processes for HDI, Standard Thru-Hole, and Back-drilling.
Proven ability to work with a team while taking personal responsibility for your own contributions.
Agility in changing focus as the needs of our effort evolve.
Strong leadership, communication, and presentation abilities.

Ways to stand out from the crowd:
Experience in crafting PCBs in the 25gbps + range using back-drilling technology.
Designing sophisticated multi-layer HDI PCB's for very dense placement and routing is helpful.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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עדכון קורות החיים לפני שליחה
8566000
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1 ימים
חברה חסויה
Location: Yokne`am
Job Type: Full Time
our company has been transforming computer graphics, pc gaming, and accelerated computing for more than 25 years. its a unique legacy of innovation thats fueled by great technology-and amazing people. today, were tapping into the unlimited potential of ai to define the next era of computing. an era in which our gpu acts as the brains of computers, robots, and self-driving cars that can understand the world. doing whats never been done before takes vision, innovation, and the worlds best talent. as an employee, youll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. come join the team and see how you can make a lasting impact on the world.
at our networking, we are driven by innovation and excellence. our team in israel is looking for a dedicated chiplet layout owner to join us in defining the next era of ai's networking. this is an outstanding opportunity to work with innovative technology and collaborate with some of the most experienced minds in the industry. if you are ambitious, passionate about flawless design, and eager to make a lasting impact, this role is perfect for you!
what you'll be doing: be part of a cross-business-unit team and own the high-speed ip integration.
build a chiplet floorplan layout design from early assembly/planning through implementation and signoff.
work closely with partition owners and full chip sta engineers to assure high quality and timely convergence.
define and implement efficient, high-quality full chip/chiplet physical design tools, flows, and methodologies.
gain hands-on experience implementing the partition-level be design (rtl2gds).
Requirements:
what we need to see: b.s. in electrical engineering or electrical practical engineer certificate, or equivalent experience.
at least 3 years of relevant experience.
proven expertise in p&r and layout tools, tcl scripting, and netlist-to-gdsii flow.
great teammate, responsible, and motivated.
experience in unit and top-level floor planning, full-chip clock tree, power grid planning, and drc/lvs.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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עדכון קורות החיים לפני שליחה
8593738
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1 ימים
Location: Yokne`am
Job Type: Full Time
we are now looking electrical engineers who like to see the big picture of high-end optical transceiver design. this role will give you a rare opportunity to craft and deliver a new class of products, aimed at delivering data at incredible speeds, using high end solutions to lead the world of high-speed optical communication to new extremes. 
what you'll be doing: 
detailed design of the electrical schematics in the product, board design and components selection. 
leading the product multi-discipline design in all fields including work with thermo-mechanical, signal/power integrity, software, and optics teams and more. 
hands on lab work to bring to design to life, evaluate and improve the product performances. 
work with multiple operational groups inside and outside the company such as qualification, suppliers, and manufacturers to scale the product from lab to mass production high runner. 
learning to use new technologies to enable improvement for generation to generation.
Requirements:
what we need to see:
b.sc./m.sc. in electrical engineering from a leading university (or equivalent experience)
12+ years of relevant experience
strong problem-solving skills
excellent interpersonal and written communication skills. 
desire to work multi-discipline projects
engineering approach and understanding of physical trade-offs
ability to work in a high-paced project development environment 
ways to stand out from the crowd: 
knowledge in electro-optic communication or high-speed signals or analog circuits 
hands on experience with electrical lab work. 
previous experience in hardware/ system fields 
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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עדכון קורות החיים לפני שליחה
8594081
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סגור
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תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
1 ימים
Location: Yokne`am
Job Type: Full Time
our company has continuously reinvented itself over two decades. our invention of the gpu in 1999 sparked the growth of the pc gaming market, redefined modern computer graphics, and revolutionized parallel computing. more recently, gpu deep learning ignited modern ai - the next era of computing. nvidia is a learning machine that constantly evolves by adapting to new opportunities that are hard to solve, that only we can tackle, and that matter to the world. this is our lifes work, to amplify human creativity and intelligence!
we are looking for a senior signal & power integrity engineer. we work closely with our sites in usa and china and have access to extensive knowledge, technologies and tools. yet we are responsible for our own product line of phy ics. taking the products from concepting, through design, implementation, verification and release to customers. if you thrive working with highly skilled people that enjoy reaching challenging goals then nvidia in might be the perfect workplace for you. this is a dynamic team working with state of the art, unique technology. if you are someone that loves a challenge, come join this diverse team and help move the needle!
what you'll be doing:
design high frequencies channels up to 400gb/s per lane for pcbs, packages, connectors and cables.
design layout guidelines for our systems.
simulate passive and active elements in 3d and 2d simulation tools
measure systems in the lab using network analyzer, tdr and scope
master infiniband, ethernet and pci-ex layer 1 specifications and implementation methods
work in an intense environment and control multi-discipline expertise
Requirements:
what we need to see:
b.sc. in electrical engineering (or equivalent experience)
5+ years of experience
familiar with electromagnetics, specifically electromagnetic waves including transmission line theory and via properties.
expert level proficiency with em tools (such as ansys em, cst, etc.).
familiarity with high-speed i/o design concepts including clock generation, transmitter & receiver design, and equalization schemes.
experience in lab measurements including vna & tdr experience, interface timing budgets, and system modeling.
master infiniband, ethernet, and pci-ex layer 1 specifications and implementation methods.
ability to work in an intense environment and control multi-discipline expertise.
ways to stand out from the crowd:
m.sc./ph.d. in electrical engineering and pdn analyses including model generation and time domain simulation.
familiar with nrz/pam-4 signaling schemes.
analyses involving co-simulation of circuits and pdn models.
experience with matlab, Python, and C.
exposure to tsv (through-silicon-via) modeling and analysis.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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8593516
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תיאור
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סגור
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מודים לך שלקחת חלק בשיפור התוכן שלנו :)
1 ימים
חברה חסויה
Location: Yokne`am
Job Type: Full Time
our company is looking for best-in-class physical design cad engineer to join our outstanding networking silicon engineering team, developing the industry's best high speed communication devices, delivering the highest throughput and lowest latency! come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.
what you'll be doing:
you will be in charge of developing physical design, synthesis, sta and logic eq methodologies for implementation of networking chips and socs.
work closely with block owners. full chip sta engineers and project managers to assure high quality and timely convergence.
come up with unique and creative solutions to the state of the art physical design problems that are needed for our chips.
additional responsibilities include participating and developing flow and tool methodologies for chip floorplan, power and clock distribution, p&r, timing analysis and closure, power and noise analysis and back-end verification across multiple projects.
Requirements:
what we need to see:
b.sc./ m.sc. in electrical engineering/computer engineering (or equivalent experience).
at least 2 years of relevant experience
proficiency using Python, PERL, tcl, make scripting.
expertise in analysing and converging crosstalk delay, noise glitch, and electrical/manufacturing rules in deep-sub micron processes.
knowledge in physical design and optimization e.g. placement, routing, cell sizing, buffering, logic restructuring, etc. to improve timing and power required and implementing them through ecos is required.
knowledge in process variation effect modelling and experience in design convergence taking into account variations.
successful track record of delivering designs to production is necessary.
self-motivation, attention to detail, and good written, verbal, and presentation skills are critical to success in this role.
ways to stand out from the crowd:
familiarity with synthesis, place and route, sta eda tools from synopsys (dc/fc/pt), cadence (innovus/tempus)
experience in methodology definition / flow owner of synthesis / place and route/ sta steps is an advantage.
great teammate.
ownership, self-learning skills, and ability to work autonomously.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8593784
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דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
סגור
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תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
5 ימים
חברה חסויה
Location: More than one
Job Type: Full Time
We are looking for best-in-class Physical Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.

What you'll be doing:
You will be responsible for complex physical design unit designs, ensuring integration within our innovative builds.
We expect you to run, debug, and approve PnR and verification flows across multiple projects, ensuring strict adherence to our high standards.
You will perform physical design implementation, planning and optimization, contributing to the development of our groundbreaking chips.
Requirements:
What we need to see:
B.SC./ M.SC. in Electrical Engineering
You should have at least 5+ years of hands-on Physical Design 'Place and Route' experience, demonstrating your proven expertise.
A strong background in Physical Design methodology, including Synthesis, Floorplan, CTS and Routing, is necessary.
Sign-off stages experince such as , 'STA', 'PV', 'LEC' and 'EMIR'.
In-depth knowledge of advanced silicon process technologies.
Familiarity with physical build EDA tools, including Synopsys and Cadence.
A great teammate who thrives in a collaborative environment.
AI tools orientation or alternatively a desire to learn.

Ways to stand out from the crowd:
AI prompting experience.
Experience in Linux environments.
TCL, Python, shell scripting abilities.
Experience with data collection and analysis.
Understanding of the chip and die verification process.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8586970
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