דרושים » חומרה » layout physical design engineer

our company is looking for best-in-class physical design cad engineer to join our outstanding networking silicon engineering team, developing the industry's best high speed communication devices, delivering the highest throughput and lowest latency! come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.
what you'll be doing:
you will be in charge of developing physical design, synthesis, sta and logic eq methodologies for implementation of networking chips and socs.
work closely with block owners. full chip sta engineers and project managers to assure high quality and timely convergence.
come up with unique and creative solutions to the state of the art physical design problems that are needed for our chips.
additional responsibilities include participating and developing flow and tool methodologies for chip floorplan, power and clock distribution, p&r, timing analysis and closure, power and noise analysis and back-end verification across multiple projects.

our company is looking for an experienced dft design engineer to join the dft design team and develop the next generation dft technologies.
as a design engineer in the dft design team at our company, you will participate in definition and implementation of our dft technologies in various projects. this position offers the opportunity to have real impact in a dynamic, technology-focused company impacting switches, nic and SOC product lines. we are working closely with a wide range of aspects - chip design, backend, verification and production testing. we are working on the most advanced technologies and sophisticated products, our dft solutions are unique, innovative, and we are continuously improving and evolving the solutions to meet the challenging goals.
what you'll be doing:
in this position, you will be responsible for defining, coding and integrating sophisticated dft components into various projects and using state-of-the-art technologies.
as a member of our dft design team, you will participate in defining various dft features and improvements, write micro-architecture documents, code design blocks, integrate them into various projects, bring your design to silicon tape-out and silicon testing and production.
strong collaboration with architects, other design teams, verification, back-end and production testing to accomplish your tasks.

come join the team and see how you can make a lasting impact on the world.
what youll be doing:
analyze pcb designs for manufacturability (dfm) and assembly (dfa) and identify issues early in the design cycle.
collaborate with hardware, layout, and manufacturing teams to ensure design intent aligns with production capabilities.
use cad tools such as cadence allegro and siemens valor to review and optimize pcb layouts.
participate in design reviews and cross-functional meetings to address manufacturing constraints and improve design quality.
document and promote best practices and dfm/dfa guidelines across teams.
support root cause analysis and resolution of manufacturing issues during new product introduction.
stay current with industry standards and emerging pcb manufacturing technologies.

we are looking for individuals who thrive in a dynamic environment, and are not afraid to roll-up his their sleeves and get their hands dirty. we desire a self-starter, with great communication skills; as well as a leader, with a deep sense of commitment. you will be responsible for developing wafer forecasts, schedule generation and management, supporting cross-functional teams, and mitigating any programmatic risks. you will also review and improve processes, and handle prototype demand.
nvidia networking division is a leading supplier of innovative end-to-end nvlink, infiniband and ethernet connectivity solutions and services for servers and Storage. we offer market-leading solutions that include adapter cards, switches, cables, and software to support networking technologies. our products optimize data center performance, using nvidias ai solution and deliver industry-leading bandwidth and scalability. in addition, we serve a wide range of sectors, including high-performance computing, enterprise, data centers, cloud computing, Big Data, and web 2.0.
what you'll be doing:
you own silicon bring-up schedule from power on to production release
negotiate silicon and board demand with teams and drive a bottom-up forecast
oversee and manage chip and board allocations across the company
lead prototype chip delivery to internal customers
track and coordinate engineering deliverables, key milestones and qualification/validation tasks in the new product introduction phase
identify and mitigate risks to schedules and programs
communicate status to cross-functional teams as well as upper management
continuously evaluate internal tools and processes and drive fixes to improve productivity
create new and fix existing processes between different teams
drive implementation of sw tools for data analytics and process evaluation

perform physical layout for mixed-signal functions like pll's, high speed i/o circuits, serdes, general i/o's, esd structures designs in state-of-the-art sub-micron cmos finfet technologies using cadence tools
you will work with asic and mixed-signal engineers to customize designs for integration in vlsi products.
job duties will include floor planning, custom layout and verifying against design rules and schematics, em/ir analysis

what you'll be doing:
support and develop solutions that will improve the efficiency and quality of the mixed-signal group.
define, develop, and maintain in-house, along with industrial utilities, solutions for schematic, layout, package and physical-verification in the fields of costume and eda vendor tools (cadence virtuoso, mentor calibre, synopsys icv and more), environment, and general-purpose solutions.
write, customize and debug icv/calibre runsets of drc, lvs, ext.
skill coding including pcells development.
scripting and programing for ad-hoc solutions and wide tasks solutions.
work closely with nvidias world-wide mixed-signal and technology teams.