דרושים » הנדסה » Senior Chip Design Verification Engineer

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11/02/2026
משרה זו סומנה ע"י המעסיק כלא אקטואלית יותר
מיקום המשרה: יקנעם ותל אביב יפו
סוג משרה: משרה מלאה
משרות דומות שיכולות לעניין אותך
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26/03/2026
Location: Tel Aviv-Yafo
Job Type: Full Time
we are looking for best-in-class chip design engineers to join our outstanding networking silicon engineering team, developing the industry's best high speed communication devices, delivering the highest throughput and lowest latency! come and take a significant part in designing and verifying our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a huge impact in a technology-focused company.
what you will be doing:
join tel-aviv/beer-sheva group, working on verification in the field of encryption accelerators.
verification of chip blocks/entities according to specifications under challenging constraints and with high orientation to power, area and performance.
daily work will involve verification and might involve any or all aspects of chip development including micro-architecture.
work closely with firmware and other groups around the globe.
work mode: hybrid home-office.
Requirements:
what we need to see:
b.sc./m.sc. or equivalent experience in electrical engineering/communication engineering/computer engineering
5+ years of validated experience in rtl frontend asic verification (chip design)
high level of english
highly motivated and a team player
ways to stand out from the crowd:
knowledge in Specman
knowledge and experience in the encryption field
experience in rtl frontend asic design 
knowledge in verilog
we are widely considered to be one of the technology worlds most desirable employers. we have some of the most forward-thinking and hardworking people in the world working for us. are you a creative and autonomous engineer who loves a challenge? are you ready to become the engineer you always wanted to be? come and be part of the best chip design team in the industry! we are an equal opportunity employer and value diversity at our company.
we do not discriminate on the basis of race, religion, color, national origin, gender, sexual orientation, age, marital status, veteran status, or disability status. we will ensure that individuals with disabilities are provided reasonable accommodation to participate in the job application or interview process, to perform essential job functions, and to receive other benefits and privileges of employment. please contact us to request accommodation.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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מודים לך שלקחת חלק בשיפור התוכן שלנו :)
26/03/2026
Location: Tel Aviv-Yafo
Job Type: Full Time
looking for outstanding chip design Verification engineers to join our networking silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency!
come and take a significant part in designing and verifying our ground-breaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a huge impact in a technology-focused company.
what you will be doing:
work in a combined design and verification team which develops core units within the networking silicon.
build reference models, verify and simulate chip blocks/entities according to specifications and performance requirements.
work closely with multiple teams within organizations such as architecture, micro- architecture, full-chip, fw and post-silicon validation.
your daily work will involve all aspects of design verification: planning, coding, coverage and integration
Requirements:
what we need to see:
b.sc or above in electrical engineering or computer engineering, graduation with high scores.
5+ years of validated experience in chip design dynamic verification.
professional verification experience, knowledge in advanced verification methodologies and tools.
demonstrates deep understanding in design and verification logic.
strong debugging, problem-solving and analytical skills.
a great teammate with strong communication and interpersonal skills.
self-motivated, ability to work independently and drive tasks to completion.
ways to stand out from the crowd:
experience in developing verification environments in Specman.
prior design or verification experience of high-speed interconnects and/or SOC.
knowledge in network flows and protocols.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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עדכון קורות החיים לפני שליחה
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תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
26/03/2026
Location: Tel Aviv-Yafo
Job Type: Full Time
looking for outstanding chip design Verification engineers to join our networking silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency!
come and take a significant part in designing and verifying our ground-breaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a huge impact in a technology-focused company. 
what you will be doing:
join tel aviv group, working in a combined design and verification team which develops phy layer ip within the networking silicon.
build reference models, verify and simulate chip blocks/entities according to specifications and performance requirements.
work closely with multiple teams within organizations such as architecture, micro- architecture, fw and post-silicon validation.
Requirements:
what we need to see:
b.sc in electrical engineering or equivalent experience.
5+ years of validated experience in rtl frontend asic design or verification (chip design). less experienced engineers with outstanding academic records will also be considered.
strong debugging, problem-solving and analytical skills.
a great teammate with strong communication and interpersonal skills. 
ways to stand out from the crowd:
knowledge in Specman.
knowledge in verilog
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
27/03/2026
Location: Yokne`am
Job Type: Full Time
we are now looking for best-in-class senior chip design Verification engineer to join our outstanding network adapter silicon group, developing the industry's best high-speed smart communication devices, data processing unit (dpu), delivering the highest throughput and lowest latency! come and take a significant part in verifying and designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a huge impact in a technology-focused company. 
what you'll be doing:
work in a verification team which develops some of the networking silicon core units.
build reference models, verify and simulate chip blocks/entities according to specifications under challenging constraints with high orientation to performance.
gain a strong understanding of chip micro-architecture and features, and develop the verification environments.
work closely with multiple teams within organizations such as architecture, micro- architecture, and fw.
Requirements:
what we need to see:
b.sc. or above in electrical engineering or computer engineering.
5+ years of validated experience.
professional verification experience, knowledge in advanced verification methodologies and tools.
a team player with excellent communication and interpersonal skills.
strong debugging, problem solving and analytical skills.
demonstrates deep understanding in design and verification logic.
self-motivated, ability to work independently and drive tasks to completion. 
ways to stand out from the crowd:
prior design or verification experience of high-speed interconnects, smart nic and/or SOC.
experience in developing verification environments in Specman and/or prior knowledge in verilog.
knowledge in network protocols.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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8594201
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דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
סגור
v נשלח
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
26/03/2026
Location: Tel Aviv-Yafo
Job Type: Full Time
looking for best-in-class physical design engineers to join our outstanding networking silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.
what you'll be doing:
physical design of blocks according to specifications under challenging constraints targeting for the best power, area, and performance.
be exposed and work on a variety of challenging designs (including high cell count and hs blocks). resolving complex timing and congestion problems.
daily work involves all aspects of physical design chip development (rtl2gds) - synthesis, power and clock distribution, place and route, timing closure, power and noise analysis, and physical verification.
taking part in flows development.
Requirements:
what we need to see:
b.sc./ m.sc. in electrical engineering/computer engineering or equivalent work experience.
5+ years of experience in physical design.
proven experience in rtl2gds flows and methodologies.
knowledge in physical design flows and methodologies (pnr, sta, physical verification).
deep understanding of all aspects of physical construction and integration.
strong background of physical design verification methodology lvs/drc.
familiarity with physical design eda tools (such as synopsys, cadence, etc).
great teammate.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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דיווח על תוכן לא הולם או מפלה
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תיאור
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סגור
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תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
26/03/2026
חברה חסויה
Location: Tel Aviv-Yafo
Job Type: Full Time
we are looking for best-in-class physical design engineers to join our outstanding networking silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.
what you'll be doing:
physical design of blocks according to specifications under challenging constraints targeting for the best power, area, and performance.
be exposed and work on a variety of exciting designs. resolving complex timing and congestion problems.
daily work involves all aspects of physical design chip development (rtl2gds) - synthesis, power and clock distribution, place and route, timing closure, power and noise analysis, and physical verification.
taking part in flow development.
Requirements:
what we need to see:
b.sc./ m.sc. in electrical engineering/computer engineering or equivalent experience.
knowledge in physical design flows and methodologies (pnr, sta, physical verification).
deep understanding of all aspects of physical construction and integration.
knowledge in physical design verification methodology lvs/drc.
familiarity with physical design eda tools (such as synopsys, cadence, etc.).
2-3 years of relevant experience
great teammate.
our company has some of the most forward-thinking people in the world working for us. are you a creative and autonomous engineer who loves a challenge? are you ready to become the engineer you always wanted to be? come and be part of the best physical design team in the industry!
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
סגור
v נשלח
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
26/03/2026
Location: Tel Aviv-Yafo
Job Type: Full Time
looking for best-in-class physical design engineers to join our outstanding networking silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.
what you'll be doing:
physical design of blocks according to specifications under challenging constraints targeting for the best power, area, and performance.
be exposed and work on a variety of challenging designs (including high cell count and hs blocks). resolving complex timing and congestion problems.
daily work involves all aspects of physical design chip development (rtl2gds) - synthesis, power and clock distribution, place and route, timing closure, power and noise analysis, and physical verification.
taking part in flows development.
Requirements:
what we need to see:
b.sc./ m.sc. in electrical engineering/computer engineering or equivalent work experience.
5+ years of experience in physical design.
proven experience in rtl2gds flows and methodologies.
knowledge in physical design flows and methodologies (pnr, sta, physical verification).
deep understanding of all aspects of physical construction and integration.
strong background of physical design verification methodology lvs/drc.
familiarity with physical design eda tools (such as synopsys, cadence, etc).
great teammate.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
סגור
v נשלח
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
26/03/2026
Location: Tel Aviv-Yafo
Job Type: Full Time
looking for best-in-class physical design engineers to join our outstanding networking silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.
what you'll be doing:
physical design of blocks according to specifications under challenging constraints targeting for the best power, area, and performance.
be exposed and work on a variety of challenging designs (including high cell count and hs blocks). resolving complex timing and congestion problems.
daily work involves all aspects of physical design chip development (rtl2gds) - synthesis, power and clock distribution, place and route, timing closure, power and noise analysis, and physical verification.
taking part inflows development.
Requirements:
what we need to see:
b.sc./ m.sc. in electrical engineering/computer engineering or equivalent work experience.
3+ years of experience in physical design.
proven experience in rtl2gds flows and methodologies.
knowledge in physical design flows and methodologies (pnr, sta, physical verification).
deep understanding of all aspects of physical construction and integration.
knowledge in physical design verification methodology lvs/drc.
familiarity with physical design eda tools (such as synopsys, cadence, etc.).
great teammate.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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8593770
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דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
סגור
v נשלח
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
18/03/2026
Location: Tel Aviv-Yafo
Job Type: Full Time
We are looking for best-in-class Physical Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.

What you'll be doing:

Physical design of blocks according to specifications under challenging constraints targeting for the best power, area, and performance.

Be exposed and work on a variety of challenging designs (including high cell count and HS blocks). Resolving complex timing and congestion problems.

Daily work involves all aspects of physical design chip development (RTL2GDS) - synthesis, power and clock distribution, place and route, timing closure, power and noise analysis, and physical verification.

Taking part inflows development.
Requirements:
B.SC./ M.SC. in Electrical Engineering/Computer Engineering or equivalent work experience.

Knowledge in physical design flows and methodologies (PNR, STA, physical verification).

Deep understanding of all aspects of Physical construction and Integration.

Knowledge in Physical Design Verification methodology LVS/DRC.

Familiarity with physical design EDA tools (such as Synopsys, Cadence, etc.).

Great teammate.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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8583558
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דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
סגור
v נשלח
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
26/03/2026
Location: Tel Aviv-Yafo
Job Type: Full Time
looking for a best-in-class chip design - hw emulation senior engineer to join our outstanding networking silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! come and take a significant part in emulating our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a huge impact in a technology-focused company. join world-class emulation team in israel. our focused team takes switches/nics/socs designs and program the emulators to behave like our silicon. are you ready to take on interesting problems and craft solutions? come check out our team.
what you will be doing:
the main responsibility is emulation and prototyping of complex chip designs. this includes defining the methodology and crafting the infrastructure needed to quickly take large chips into hardware emulation platforms.
the job also requires close collaboration with design, verification, and software engineers to enable Embedded software and application software development.
connecting emulator/fpga based solutions to real external h/w or virtual targets, taking care of complex testbench and different protocols.
this is a role for a versatile engineer that includes rtl design, verification, fpga partitioning and implementation, scripting, and lab-based bring up of the design.
Requirements:
what we need to see:
bsc or msc in electrical engineering or Computer Science or equivalent experience
4+ years working in the semiconductor industry.
hands-on pre-silicon verification or design experience.
experience in building TEST -benches and debugging simulation failures.
experience in scripting with Python /tcl/ C / PERL / Unix shell
strong interpersonal skills and ability & desire to innovate.
ways to stand out from the crowd:
experience with hw emulation platforms.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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