דרושים » חשמל ואלקטרוניקה » SoC Verification Expert

The company's EyeC VLSI team specializes in designing advanced radar system chips for ADAS (Advanced Driver Assistance Systems) and autonomous vehicles. The group is responsible for all disciplines of VLSI development, including but not limited to Logic Design, Design Verification, Microarchitecture, Analog and circuit design and layout, Physical and structural design (backend), Product and test engineering.
What will your job look like:
Design ownership on major blocks/clusters from definition to implementation phase.
Participate in various ASIC activities and flow definition which includes CDC, DFT, Lint.
Design micro-architecture of custom blocks.

our company, a world leader in driver assistant systems and autonomous vehicles, is looking for SW Embedded Engineer engineer for the range of its next generation SoCs supporting its radar systems
Our team is responsible for validating our company's radar SoCs, utilizing Pre-Silicon environments, as well as Post-Silicon platforms.
We are developing fully embedded C++ based validation environment for our needs.
You will be taking part in developing anything from environment and drivers through system modules such as file system, network stack, memory management and more, and up to complex automation tools in both C++ and python.
What will your job look like
Get a deep understanding of our chip hardware IP blocks, both analog and digital.
Develop our validation environment.
Develop, port, or add features to the product drivers using Technical Specs and existing modules.
Define, develop and execute various complex validation scenarios on the SoC.
Debug complex SoC problems using embedded GDB, JTAG probes, going down to signal level using scopes.
Take part in Next Gen SoC's Power-On's and platforms Bring-Up's.
Collaborate with other SW/Embedded and HW/Electrical Validation teams across the company.

our company, a world leader in driver assistant systems and autonomous vehicles, is looking for silicon validation Tech Lead engineer for the range of its next generation SoCs supporting its radar systems.
Our team is responsible for validating our company's radar SoCs, utilizing Pre-Silicon environments, as well as Post-Silicon platforms.
We are developing fully embedded C++ based validation environment for our needs.
You will be taking part in developing anything from environment and drivers through system modules such as file system, network stack, memory management and more, and up to complex automation tools in both C++ and python.
What will your job look like
Get a deep understanding of our chip hardware IP blocks, both analog and digital.
Develop our validation environment.
Develop, port, or add features to the product drivers using Technical Specs and existing modules.
Define, develop and execute various complex validation scenarios on the SoC.
Debug complex SoC problems using embedded GDB, JTAG probes, going down to signal level using scopes.
Take part in Next Gen SoC's Power-On's and platforms Bring-Up's.
Collaborate with other SW/Embedded and HW/Electrical Validation teams across the company.

The RFIC/Analog design groups in our company's Radar organization is responsible for developing the cutting edge Transceivers in mmW frequencies for the best Imaging Radar technology.
The design process includes the entire process from specs to productization. To support these challenging processes, we need a skilled CAD team that will work with the design teams on all design aspects and flows from design environment setups, through design tools implementations and support and to chip level verifications and validation enablement.
We're looking for an CAD or Design Automation Manager to build and lead our company's RF/Analog CAD team to support with tools/flows and automation flows for the next-generation Imaging Radar chips.
What will your job look like:
Manage a team of few DAs and CAD Engineers
Build and support RF/analog design environments
Implement, develop, and maintain design flows, tools and scripts
Evaluate and explore new automation technologies and advocate for efficiency improvements
Evaluate multiple vendor solutions and guide execution, in the most optimal use, based on design needs
Effectively communicate and support a large number of designers, providing high-quality tools and flows, documentation, and presentations.

we are looking for an Embedded SW Engineer for SystemC Modeling that include Performance and Program view Modeling. You will be part of VLSI emulation team , working on current and next-generation designs for next generation sensors.
The SystemC models are fundamental parts of the VLSI chip infrastructure, they are used during HW architecture definition phase and by SW developers for system shift left.
What will your job look like:
You will work on Critical performance analysis and optimizations on the ASIC micro architecture as multi-NOC , DDR and CPU .
You will work on developing SystemC models that describe the RTL models on High level language and enable true system . level shift left for the embedded SW team.
You will have the opportunity to work on state-of-the-art simulation and profiling tools and adopt them to our company's needs.
You will work closely with HW architects and SW/Algorithms developers.

The RFIC/Analog design groups in our company's Radar organization is responsible for developing the cutting edge Transceivers in mmW frequencies for the best Imaging Radar technology. The design process includes the entire process from specs to productization.
To support these challenging processes, we need a skilled CAD team that will work with the design teams on all design aspects and flows from design environment setups, through design tools implementations and support and to chip level verifications and validation enablement.
We're looking for an Experienced CAD or Design Automation Engineer to develop our company's RF/Analog design tools/flows and automation flows for the next-generation Imaging Radar chips.
What will your job look like:
Build and support RF/analog design environments
Implement, develop, and maintain design flows, tools and scripts.
Evaluate and explore new automation technologies and advocate for efficiency improvements
Evaluate multiple vendor solutions and guide execution, in the most optimal use, based on design needs
Effectively communicate and support a large number of designers, providing high-quality tools and flows, documentation, and presentations.

a leading global provider of mission-critical Command and Control software solutions for the defense sector, is seeking a highly experienced System Engineer to enhance our dynamic system engineering team.
In this pivotal role, you will spearhead intricate, multidisciplinary projects, transforming client needs into precise system specifications and overseeing the full cycle of development and approval processes.
Responsibilities
Serve as the primary point of contact for clients, fostering strong relationships and understanding their unique requirements.
Conduct thorough analysis of client needs to inform project specifications and system requirements.
Lead and manage subcontractor relationships, overseeing all contractual agreements and procurement activities.
Guide and direct a team of engineers, managing work plans, delivery timelines, and ensuring the highest quality of work.
Develop and implement solutions to complex engineering problems, ensuring they are both effective and feasible for deployment.
Organize, lead, and participate in Design Review sessions and contractual discussions, ensuring alignment with project goals.
Coordinate acceptance and delivery procedures with various stakeholders, both domestically and internationally.
Provide comprehensive reports to the Director of Engineering and Project Manager, detailing project progress and outcomes.

The Application Engineer will provide expert level technical customer Pre-Sale and post-sale support for Cadence customers in Physical Design area.

The Application Engineer will provide expert level technical customer Pre-Sale and post-sale support for customers in Physical Design area.