לוח משרות דרושים חשמל ואלקטרוניקה, לחיפוש זה נמצאו 2,080 משרות

Requirements:
What we need to see:

B.SC./ M.SC. in Electrical Engineering/Computer Engineering (or equivalent experience).

You should have at least 5+ years of hands-on Full-chip layout and Physical Verification experience, demonstrating your proven expertise.

A strong background in Physical Verification methodology, including DRC / LVS / ANT / ERC / DFM in advanced process nodes is necessary.

Proficiency using Python, Tcl, Shell, Make scripting.

Experience in Linux environments.

AI tools orientation or alternatively a desire to learn.

Familiarity with physical build EDA tools, including Synopsys (ICC2/FC) and Cadence (Innovus).

Familiarity with Physical Verification tools: Synopsys (ICV), Siemens (Calibre)

Self-motivation, attention to detail, and good interpersonal skills.


Ways to stand out from the crowd:

Experience with data collection and analysis

Experience in methodology definition / flow owner of Full-chip / Place and Route

Great teammate.

Ownership, self-learning skills, and ability to work autonomously.

Requirements:
What we need to see:

Hold a M.Sc. or Ph.D. in Computer Science, Electrical or Computer Engineering from a leading university (or equivalent experience).

5+ years of industry experience (or equivalent) in software architecture, hands-on development, AI/ML, applied research, or related fields.

Strong background in software or solution architecture, applied AI/ML research, or hands-on development of production-grade AI systems.

Industry experience building and shipping AI-powered tools or ML pipelines (not just training models - end-to-end delivery).

Strong understanding of LLM capabilities and limitations - prompt engineering, fine-tuning, RAG, agent architectures.

Experience with at least two of: reinforcement learning, classical ML, NLP/information retrieval, evaluation framework design.

Strong understanding of AI development and evaluation pipelines.

Can reason about trade-offs: when to use which approach, with real reasoning backed by shipping experience.

Strong programming skills (Python required; familiarity with ML frameworks - PyTorch, HuggingFace, etc.).

Ability and flexibility to work and communicate effectively in a multi-national, multi-time-zone corporate environment.

Ways to stand out from the crowd:

Experience with LLM-based code generation, code review, or developer tooling.

Familiarity with eval frameworks and feedback loop design (online and offline evaluation).

Experience with AI agent orchestration (multi-agent systems, tool use, planning).

Shown research track record (publications, open-source contributions).

Knowledge of AI-assisted development tools and their underlying architectures.

Requirements:
What we need to see:
B.SC./ M.SC. in Computer Engineering/Electrical Engineering/Communication Engineering.
5+ years of validated experience in ASIC Verification.
High Level of English.

Ways to stand out from the crowd:
Background in Specman.
Knowledge in HDL (Verilog/VHDL).
Knowledge in Mixed Signals, Analog, and Behavioral Models for Verification.
Knowledge in Chip boot and Infrastructures.

Requirements:
What we need to see:
B.SC./ M.SC. in Computer Engineering/Electrical. Engineering/Communication Engineering.
5+ years of practical experience.
Exposure to rtl implementation and coding.
Familiarity with verification tools.
Strong debugging, problem solving and analytical skills.
Strong communication and social skills are required.
Ability to work in a geographically diverse team environment.
Self motivated, independent and target oriented.
High Level of English.

Ways to stand out from the crowd:
Prior Design or Verification experience.
Experience in developing sophisticated design blocks.
Knowledge in Mixed Signals, Analog, and Behavioral Models for Verification.
Knowledge in Chip boot and Infrastructures.
Experience in working with back-end on area, power and timing closures.

Requirements:
What we need to see:

Bachelor's or master's Degree in Electrical/Computer Engineering, or equivalent experience are required.

Prior 8+ years of experience in Firmware.

Strong C/C++ and OOP capabilities.

Excellent Data analysis, debugging and problem-solving skills.

Strong understanding of digital design, computer architecture, Linux, drivers and CPU/GPU/SOC architecture.

Familiar with the fundamentals of Linux scripting languages and python hands-on.

Strong analytical, debugging and problem solving skills.

Motivated and independent with strong communication skills.


Ways to stand out from the crowd:

Familiarity with FIPS certification process and crypto engines.

Coding and automation skills in scripting languages like Python.

Experience with RISCV architecture and verification.

Ability to multitask and prioritize in a fast paced environment.

Strong interpersonal and communication skills and ability to work effectively across different teams.

Requirements:
What we need to see:

B.Sc. in Electrical Engineering, Materials, Physics, Chemical Engineering, or equivalent experience.

5+ years of proven experience in Process, Integration, Device engineering, or Semiconductor manufacturing.

Strong knowledge of FAB processes, integration flows, device behaviour, and quality metrics.

Outstanding problem-solving and data analysis skills.

Experience with large datasets and correlation methodologies.

Ability to multitask, prioritize, and complete tasks under pressure.

Strong communication and presentation skills.

High ownership, autonomy, and accountability.

Familiarity with scripting/programming (Python or similar) for data analysis and workflow automation.

Passion for data systems, automation, and applying AI/ML techniques to engineering problems.


Ways to stand out from the crowd:

Experience working directly with FAB or Silicon technology supporting systems (inspection tools, OSAT, etc.).

Hands-on experience with data analysis tools (e.g., JMP).

Experience with visualization tools (e.g., Tableau, custom Python dashboards).

Experience building or using ML models for yield prediction, defect classification, or process control.

Familiarity with data platforms or semiconductor-specific data ecosystems.

Requirements:
What We Need to See:

BSc or MSc in Electrical/Computer Engineering, Computer Science, or Mathematics.

5+ years of managerial experience leading engineering teams in chip design or verification.

8+ years of industry experience in RTL design, functional verification, or related domains.

Strong understanding of chip design flows and verification methodologies.

Excellent leadership, analytical, problem-solving, and communication skills.


Ways to Stand Out from the Crowd:

Experience with formal verification tools and methodologies (e.g., JasperGold, VC Formal).

Background in assertions, coverage models, or formal testbench development.

Track record of building and scaling high-performing engineering teams.

A passion for recruiting, mentoring, and developing talent.

Requirements:
What we need to see:

Possessing a bachelor's degree in Electrical Engineering or a related field.

Minimum of 8+ years of experience in hardware build and development.

Expertise in physical build top-level implementation and RTL to GDS experience.

Very good scripting capabilities.

Proven expertise in high-speed digital build and signal integrity.

Demonstrated ability to troubleshoot and solve complex hardware issues.

Excellent communication skills and a collaborative approach.

Requirements:
What we need to see:
B.SC./ M.SC. in Electrical Engineering.
You should have at least 5+ years of hands-on Physical Design 'Place and Route' experience, demonstrating your proven expertise.
A strong background in Physical Design methodology, including Synthesis, Floorplan, CTS and Routing, is necessary.
Sign-off stages experince such as , 'STA', 'PV', 'LEC' and 'EMIR'.
In-depth knowledge of advanced silicon process technologies.
Familiarity with physical build EDA tools, including Synopsys and Cadence.
A great teammate who thrives in a collaborative environment.
AI tools orientation or alternatively a desire to learn.

Ways to stand out from the crowd:
AI prompting experience.
Experience in Linux environments.
TCL, Python, shell scripting abilities.
Experience with data collection and analysis.
Understanding of the chip and die verification process.

Requirements:
What we need to see:

B.SC./ M.SC. in Electrical Engineering.

At least 5+ years of hands-on STA experience.

Experience in Prime Time and signoff methodologies.

A great teammate who thrives in a collaborative environment.

AI tools orientation or alternatively a desire to learn.


Ways to stand out from the crowd:

Agentic Frameworks.

AI prompting experience.

Experience in Linux environments.

TCL, Python, shell scripting abilities.

Experience with data collection and analysis.

Requirements:
What we need to see:

B.SC./ M.SC. in Electrical Engineering.

You should have at least 5+ years of hands-on layout experience, demonstrating your proven expertise.

A strong background in Physical Verification methodology, including ERC, LVS and DRC, is necessary.

In-depth knowledge of advanced silicon process technologies.

Familiarity with physical build EDA tools, including Synopsys and Cadence.

A great teammate who thrives in a collaborative environment.

AI tools orientation or alternatively a desire to learn.


Ways to stand out from the crowd:

Experience in Linux environments.

TCL, Python, shell scripting abilities.

Experience with data collection and analysis

Understanding of the chip and die verification process

Requirements:
What we need to see:

B.Sc. in Electrical Engineering or Computer engineering or equivalent experience.

5+ years of practical experience.

Exposure to rtl implementation and coding.

Familiarity with verification tools.

Strong debugging, problem solving and analytical skills.

Strong communication and social skills are required.

Ability to work in a geographically diverse team environment.

Self motivated, independent and target oriented.


Ways to stand out from the crowd:

Prior Design or Verification experience.

Experience in developing sophisticated design blocks.

Integration of design elements to large cluster or full-chip.

Experience in working with back-end on area, power and timing closures.

Scripting ability.