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We are seeking a Senior HPC Application Engineer with extensive experience in running, profiling and optimizing benchmarks and HPC applications at the server or cluster level. As part of the System Performance software team, you will play a pivotal role in analyzing and improving key HPC applications, directly influencing software requirements and hardware specifications. This position sits at the intersection of computer science and computational physics, requiring both technical expertise and creative problem-solving to address bottlenecks and accelerate application performance on novel architectures. If you are passionate about science, skilled at tackling complex challenges, and thrive in a cutting-edge multidisciplinary environment, we want to hear from you!

Responsibilities:
Profile a wide range of HPC applications on various architectures, identifying performance bottlenecks.
Develop creative algorithmic and software solutions to address bottlenecks and accelerate applications on a novel dataflow architecture.
Translate application requirements into software features and hardware requirements.
Develop performance models for future hardware architectures.

The AI software team is building solutions that enable the latest AI models and workflows to run efficiently on on NextSilicons unique hardware architectureunlocking a new level of performance

We are seeking a talented engineer with extensive experience in modelling, analyzing and optimizing AI workloads and end-to-end flows. This position lies at the intersection of computer science, hardware architecture and ML computational algorithm.

Responsibilities:
Model AI workload behavior on custom hardware and software
Identify bottlenecks and propose optimizations in hardware architecture and software.
Define next generation software requirements and specifications.

As part of the memory system team, you will work on design and implementation of new and enhanced features of the memory system to support high performance computing and AI applications in the Maverick accelerator runtime environment.

You will work closely with software engineers, hardware engineers, compiler developers and other stakeholders to enable the most efficient execution of applications on a large scale, multi threaded and highly distributed system across multiple disciplines with a deep OS Internals point of view.

Responsibilities:
Work on design and implementation of new and enhanced features of the memory system for the Maverick accelerator.
Develop a high performance, low latency distributed unified virtual memory management system.
Work on system software support for the next generation Maverick system.
Define feature development scope and plan for successful product delivery.
Wide system impact through collaboration with software engineers, hardware engineers, compiler developers and other stakeholders.

We are looking for a talented and experienced Group Manager to lead teams in our software division, building an innovative multidisciplinary computing platform. In this role, you will bridge the gap between architecture, software, and hardware. You will lead the development of the lower layers in our highly optimized software stack including Boot, BSP, and device runtime, while dealing with an innovative and challenging system architecture.

Responsibilities:
Work on design and implementation of new and enhanced runtime features across the AI stack to support high performance computing of AI models.
Develop the runtime environment for massively accelerating AI workloads execution and handle OS/device process and thread lifecycle.
Develop multi nodes execution scaling while leveraging standard networking APIs of MPI and Collectives.
Define feature development scope and plan for successful product delivery.
Wide system impact through collaboration with software engineers, hardware engineers, compiler developers and other stakeholders.

We are looking for an experienced STA Engineer to join our growing BE team. We are working on the most challenging and interesting ASIC chips. Come join us and have a big impact on our groundbreaking and innovative designs.

Responsibilities:
Take part in STA activities for blocks, Sub Systems and Full chip, from definitions to TO.
Analyze timing results, verify correctness and provide timing budget for the different partitions.
Own the timing constraints both for STA and P&R flow.
Working closely with architecture, design, PD and DFT teams to make sure timing closure and ensures product success.
Identify risks and bottlenecks, work closely with PD, RTL and DFT teams, ensuring convergence throughout various project stages.
Participating in design methodology, reviews and tool automation work and definition.
As part of this rule you will gain very good understanding of our HPC and AI designs and sub system as well as product targets.

We are looking for a talented and experienced engineer to participate in the physical design of the companys product for leading one of our BE projects. This position involves working with external back-end developers as well as carrying out critical tasks in-house, and leading aggressive back-end initiatives to meet challenging targets in terms of area, timing, and layout. In this role, you will be at the center of the companys design efforts and will have a significant influence on product architecture.

Responsibilities:
Generate and analyze critical block- and chip-level static timing constraints.
Spec and define full chip floor plan, including pin placement, partitions, and power grid.
Develop and validate high-performance, low-power clock network guidelines.
Perform critical block-level place and route and create designs that meet timing, area, and power constraints.
Review the vendors physical design verification flow at chip and block level and guide other designers on how to fix LVS and DRC violations.
Work with vendors on defining physical design methodologies and assist in flow development for chip integration.

We are looking for a talented and experienced engineer to participate in designing the next era of computer architecture. In this position you will take part in designing the critical parts of our future chips. You will transform architectural requirements to micro-architectural specs, implement key blocks in RTL, and participate in post-silicon activities.

Responsibilities:
Define and drive the design of advanced blocks from micro-architecture phase to netlist.
Support timing and constraints definitions work closely with the BE team on timing and physicals implementation efforts.
Leading processes relating to power optimization.
Technology expert, building a knowledge base for the group.
Work with various teams to drive execution (SW, Architecture, verification, BE, etc).
Devise execution indicators and monitor and report execution progress to enable prioritization and clear decision making.

shaping the Cognitive Banking era, harnessing AI to help banks anticipate customer needs, provide actionable insights, and deliver intelligent financial guidance. Our platform continuously analyzes and leverages real-time transactional data, enabling banks to proactively support customers in managing their finances and reaching their goals. As industry leadersyes, we really are leaderswe partner with the worlds top financial institutions, empowering over 150 million customers monthly across 35 global markets from offices in New York, London, Singapore, São Paulo, and Tel Aviv.
About the position
As part of our growth, we are looking for a Research Analyst to join our dynamic and growing team. The candidate should have strong analytical capabilities, combined with technical skills and a proactive approach to problem-solving.
In this role you will transform raw transaction data into clear, meaningful details, helping users better understand their financial activities. By enriching transaction descriptions with key information like categories and merchants, you will enhance the user experience and support advanced analytics. This work provides the foundation for insightful financial models and analyses across the company.

Responsibilities
Perform business research on various information sources (external sources such as the web as well as internal materials, etc.).
Work closely with the product group to explore and enrich big data, and take part in new product evolution.
Research, interpret and organize textual data from both technical and business perspective.
Collaborating with AI and Data Science teams to support our Model Development.

shaping the Cognitive Banking era, harnessing AI to help banks anticipate customer needs, provide actionable insights, and deliver intelligent financial guidance. Our platform continuously analyzes and leverages real-time transactional data, enabling banks to proactively support customers in managing their finances and reaching their goals. As industry leadersyes, we really are leaderswe partner with the worlds top financial institutions, empowering over 150 million customers monthly across 35 global markets from offices in New York, London, Singapore, São Paulo, and Tel Aviv.

Responsibilities
Lead the end-to-end development of the companys business products.
Manage a team of developers and QA engineers in an agile environment, supporting their professional growth and development.
Drive technical features from design through implementation and code review.
Collaborate closely with cross-functional teams including Product and Customer Success to ensure delivery of high-quality, valuable products to our customers.
Own and promote architectural best practices across the companys business services.

shaping the Cognitive Banking era, harnessing AI to help banks anticipate customer needs, provide actionable insights, and deliver intelligent financial guidance. Our platform continuously analyzes and leverages real-time transactional data, enabling banks to proactively support customers in managing their finances and achieving their goals. As true industry leaders, we partner with the worlds top financial institutions, empowering over 150 million customers each month across 35 global markets from our offices in New York, London, Singapore, São Paulo, and Tel Aviv.

About the position
We are looking for an experienced QA Engineer to take a key role in ensuring the quality and reliability of our product. In this role, you will lead the full QA processfrom planning and test design to manual execution and reportingand work closely with the development and product teams. You will also build and execute automated tests to ensure continuous test coverage.

Responsibilities
Design, write, and execute detailed end-to-end manual test cases (UI, backend components)
Collaborate closely with product managers, developers
Creating and maintaining automated tests using automation frameworks
Integrate automated tests into the CI/CD pipeline
Analyze and report on automation test coverage