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We are now looking for a Power Optimization and Analysis Engineer! our company prides ourselves on having energy-efficient products. We believe that continuing to maintain our products' energy-efficiency compared to competition is key to our continued success. As part of the u/arch team in the Switch group, you will be responsible for analyzing full chip and unit-level power data and driving the FE/BE ASIC teams to improve their units power efficiency; you will be responsible for researching, developing, and deploying methodologies to help our company's products become more energy efficient. Key responsibilities include developing techniques to model, analyze, and reduce power consumption of our company Switches product line.
As a member of Switch u/arch Team, you will collaborate with Architects, Performance Engineers, Software Engineers, ASIC Design Engineers, and Physical Design teams to study and implement power analysis and reduction techniques for our company's next generation switches. Your contributions will help us gain early insight into energy consumption of graphics and artificial intelligence workloads, and will allow us to influence architectural, design, and power management improvements.
What You'll Be Doing:
Use internally developed tools and industry standard pre-silicon gate-level and RTL power analysis tools, to help improve product power efficiency.
Develop and share best practices for performing pre-silicon power analysis.
Perform comparative power analysis, to spot trends and anomalies, that warrant more scrutiny.
Interact with architects and RTL designers to help them interpret their power data and identify power bugs; drive them to implement fixes.
Select and run a wide variety of workloads for power analysis.
Prototype new architectural features in Verilog and power analysis.

we are looking for a passionate Senior Software Engineer to join our Simulation development team. Our team is growing, and we are looking for hardworking and experienced engineers to take part in building advanced networking simulation solutions. You will be part of a team developing next generation Switch simulation, works closely with other SW R&D teams and SW Architects.
What you will be doing:
Design and develop advanced features simulating our world class Switches
Develop solutions using advanced virtualization technology
Write clean, efficient and maintainable code
Collaborate with team members, SW R&D, Architects, Chip Design and FW.

we are looking for a highly motivated Software QA Engineer to join our DPU Firmware QA Team. Quality is an integral aspect of our products, and as a Firmware QA Engineer you will have a significant impact in helping us to deliver our products to customers in a fast paced and constantly evolving environment. You will bring your upbeat personality with excellent communication skills, attention to detail, and real passion for a positive user experience. The candidate will take part in wide areas of Software testing, systems testing, networking and automation in Linux environment.
What you'll be doing:
Design, Develop and Execute tests (manual and automatic).
Learn new networking standards, features and protocols and improve QA coverage
Participate in reviews and provide feedback on product feature requirements, specifications, and technical design documents
Collaborate with various team including project management, hardware, and software developers, provide technical analysis of bugs
Execute tests in different scopes: regression, performance, functional, security; report the progress of testing and provide summary reports of testing activity
Develop/Enhance Tools, applications, or processes to improve the quality and test efficiency
Define and build setups topologies for appropriate product coverage.

We are looking for a hardworking and engaged Senior QA SW Engineer with experience in Networking to join the System Ethernet QA Team! Our QA team is responsible to test and qualify the company Ethernet Switches solutions. We learn new features, design, execute, write automation based on Python! we are widely considered to be one of the technology worlds most desirable employers. We have some of the most forward-thinking and hardworking people in the world working for us. If you're creative and autonomous, we want to hear from you!
What you'll be doing:
Review the Arch design and requirements for new features introduced in the product.
Design, develop, and execute tests for the new features, as part of SW GA releases and update releases.
Report bugs found during execution, assist with reproduction and debugs in order to understand root cause verify bug fixes provided by the R&D team, raise if not fixed.
Execute system tests in different scopes: regression, performance, functional, security for Ethernet protocols.
Write automation tests and framework APIs based on the Python language.

we are looking for an outstanding Senior Software Performance Engineer for our Linux Drivers group. You'll closely work with our company Driver developers, verification teams, and performance architects, gaining a deep understanding of our companys Networking products and technologies built on top of our company ConnectX and BlueField network cards. You will lead feature verification from design through implementation to integration into frameworks, develop robust infrastructure, and work collaboratively with cross-functional teams.
This position offers the opportunity to have real impact in a dynamic, technology-focused company, influencing product lines that empower the most advanced data centers in the world. We've built a team of outstanding people stretching around the globe, whose mission is to push the frontiers of what's possible today and define the platform for the future of computing. We strongly believe in developing our employees and giving them the tools to succeed.
What youll be doing:
Work closely with developers to test new components, including crafting and executing unit, functional, and performance tests.
Develop a verification environment using Python to qualify the product from functional and performance perspectives.
Investigate performance-related issues in networking Linux drivers.
Analyze coverage measures to identify verification holes and to show progress toward product development and releases.
Identify and write all types of coverage measures for stimulus and corner cases.

we are searching for a highly motivated, excellent Software Engineer for design and verification to join the software tools group. You will design and develop tools that enable developers worldwide to harness the full power of our company products. The successful candidate will show a strong background in C++ programming, strong documentation, and writing skills, take ownership of parts of the codebase, good communication and ability to integrate well as part of the team and organization, and motivated to solve sophisticated problems, developing tools for management, configuration and debug of all our company networking products.
What you'll be doing:
As a valued member of the team, you will be involved in the technical design and implementation of numerous features working in an Agile environment. You will write code in C, C++ and Python, in OOP methodology.
Develop tools for management, configuration and debug of our company networking products
Effectively estimate and prioritize tasks in order to create a realistic delivery schedule
Write fast, effective, maintainable, reliable and well documented code
Collaborate with multiple development teams on new features
Provide peer reviews to other engineers
Document designs, and review documents with stake holders
Demonstrate growth in technical and non-technical abilities
Prepare and develop test plans for new features.

our company Networking BU is looking for Senior Software Program Manager that will be responsible for software programs and projects. The PM should drive planning and execution of FW/SW projects while aligning with corporate priorities and constraints.
our copmpany Mellanox Networking division is a leading supplier of innovative end-to-end InfiniBand and Ethernet connectivity solutions and services for servers and storage. We offer best-in-class solutions that include adapter cards, switches, cables, and software to support networking technologies. Our products optimize data center performance and deliver industry-leading bandwidth and scalability. In addition, we serve a wide range of markets including high-performance computing, enterprise, data centers, cloud computing, big data and Web 2.0. We are constantly reinventing ourselves to stay ahead of the market and bring groundbreaking products and services to the industry. Our product line is focusing on delivering the most optimized Ethernet solutions for industries like Media and Entertainment as well as any other industry that can benefit from our Datastream and TCP/IP acceleration.
What you'll be doing:
You will manage the networking software programs for our company next generation AI Data centers
Responsible to coordinate between all project stakeholders such as marketing, engineering teams in IL and around the world, operations, etc. from initial requirements definition through Architectural stage, execution, and delivery.
Develop and execute feature planning and prioritization of perception capabilities to meet the software programs' needs
Identify risks, gaps, and bottlenecks in time, and find resolution with technical leaders and project management
Work with product managers, architects, and engineers to ensure consistency with company strategy, commitments, and goals.

we are looking for a Senior Project Manager to join the Israeli Networking Cluster Solutions group. The project manager will be responsible for the definition, planning and execution of multidisciplinary projects for building our company's clusters in Israel. Direct communication with Architecture, R&D, Operations, Finance, IT, Security, and all relevant stakeholders within and outside of our company. Accountable and responsible for the success of the relevant Cluster build programs.
What youll be doing:
Own entire activities associated with planning and executing projects for building large Clusters for our company in Israel
Co-work with our company teams on different disciplines associated with building large scale clusters Data-Center Engineering, Data-Center Operations, Corporate-IT, Planning, Finance and more
Manage periodic sync meetings within our company and with external stakeholders to track and monitor projects meetings
Present project status to our company senior executive team
Matrix management of internal teams and resources for successful execution of projects and activities.

our company Networking IC Product Engineering team is looking for a senior System Validation engineer, to take part of Networking system validation and characterization efforts of different platforms and products. You will be a part of a team working on groundbreaking technology. We are in need of hardworking and motivated engineers ready to define and lead validation activities. Do you have system approach, have passion for lab work, data analysis and post-Si hands on problem solving? We will be happy to have you on our team!
We are looking for a skilled and experienced Engineer with a focus on System level Validation to join our Engineering team in Yokneam, Israel. As part of this role, you will play a crucial role in ensuring the quality of our sophisticated products. You will collaborate closely with PHY design, system HW architecture and companywide system, validation, reliability, signal integrity and testing owners to devise and implement effective validation strategies, aligning with our high-quality standards.
What youll be doing:
Create and implement system level validation plans for new products.
Analyze and interpret validation results to identify potential issues.
Collaborate with design and architecture teams to define required validation and optimize and solve electrical/SW/FW/ functional issues.
Work closely with software and firmware teams to ensure seamless integration.
Provide technical expertise and guidance for team members.
Drive coverage gap analysis and closure between system level (L6) to Server-Level Assembly (L10) and Rack level (L11).
Take active part of optimization of HSIO traces, to meet the specifications for system performance.
Work with SERDES engineers by sharing plans and guidance for high-speed routings testing, data analysis, extensive debug.
Investigate technically complicated bugs and help drive debug efforts across various teams.

we are looking for an outstanding Software Verification Engineer for our company SW Host Verification group. You will closely work with our company Driver and SDK developers, performance team and gain a deep understanding of our companys Networking products and technologies on top of our company BlueField network cards. You will lead feature verification from design through implementation to integration into frameworks, develop robust infrastructure, and work collaboratively with cross-functional teams.
This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting product lines that empower the most advanced data centers in the world. We have crafted a team of outstanding people stretching around the globe, whose mission is to push the frontiers of what is possible today and define the platform for the future of computing.  We are a strong believer in developing our employees and giving them the tools to succeed.  
What youll be doing: 
In this role, you will work closely with developers to test new components including crafting and executing unit, functional, and performance tests. 
Develop a verification environment using Python to qualify the product from functional and performance perspectives. 
Analyze coverage measures to identify verification holes and to show progress toward product development and releases. 
Identify and write all types of coverage measures for stimulus and corner cases. 
Be responsible for verification of system design and software using advanced verification methodologies. 

  

The complexity of the chip has greatly increased over the years. We are now packing tens of billions of transistors in a chip to meet the growing computing demand in a footprint that is responsible to our environment. The company System-On-Chip (SOC) group is looking for a top ASIC Engineer with a curiosity about SOC design automation, RTL integration, chip build and assembly, and padring design and verification. You should have real passion for methodologies and automation solutions that enable SOC creation in the most optimized way.
In this position, you will get the opportunity to build complex networking chips and interact directly with unit-level ASIC, Physical Design, CAD, Package Design, Software, DFT and other teams.
What you'll be doing:
Lead the end-to-end execution, tracking, and convergence of chip-level CDC and RDC for complex SoCs across all IPs and partitions.
Plan and orchestrate CDC/RDC signoff: define methodology, scopes, run plans, constraints, and acceptance criteria.
Run and maintain CDC/RDC flows and rule decks, including multi-mode, multi-clock, and hierarchical signoff.
Triage violations efficiently: root-cause to RTL, constraints, tool setup, or IP models; prioritize and drive fixes to closure with owners.
Verify reset architecture and RDC robustness (reset domain intent, release sequencing, glitch detection, fanout).
Author and review CDC/RDC constraints, waivers, and justifications; ensure auditability and signoff quality.
Automate runs, report parsing, dashboards, and KPIs for closure tracking using scripting and data tooling.
Partner with RTL, DV, DFT, STA, PD, and Architecture to align fixes, manage ECOs, and protect CDC/RDC quality during late design changes.
Define and enforce signoff gates; communicate progress and risks with clear metrics and issue tracking.
Continually improve methodology and training to prevent recurring CDC/RDC issues and accelerate convergence.

we are seeking a hands-on engineer to join our Networking Insights team and generate the data-driven hardware insights that shape the backbone of the AI revolution. This position is for engineers who are motivated to explore beyond typical protocols, delving into the micro-architecture of our brand new switches to address intricate hardware challenges. You will investigate and resolve elusive hardware and software challenges at their root cause, ensuring our technology operates with maximum performance and reliability in the world's most demanding data centers.
What you'll be doing:
Investigate complex performance issues seen in real-world AI data centers.
Design and build targeted test cases from scratch to replicate and isolate hardware and software bottlenecks.
Write and debug diagnostic scripts (Python) to drive traffic generators (e.g., IXIA) and manipulate test environments.
Analyse test data to uncover the root cause of hardware-level behaviours, collaborating with architects to understand micro-architectural impacts.
Develop repeatable tests that will become part of our broader automation framework.

we are looking for an excellent Firmware Design Engineer for our company FW PHY Group. The person will closely work with our company FW development, architecture, chip design teams and gain deep understanding of our company's Networking products and technologies.
We have some of the most forward-thinking and hardworking people in the world working for us. Are you a creative and autonomous engineer who loves a challenge? Are you ready to become the engineer you always wanted to be? Come and be part of the best chip design team in the industry!
What youll be doing:
Enabling new SerDes and Optical Technologies
Implement FW functionality in signal processing units of our company products
Work closely with the architecture, HW, and SW design teams
Define implement and maintain FW algorithm to control the Silicon
Develop and test FW on emulation & simulation environments during the Pre-silicon phase
Debug and screen HW/FW/SW issues
Take an active part in silicon bring-up and SW development phases
Lead data-driven discussions about the product functionality and areas for improvement.

we are looking for best-in-class Physical Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.
What you'll be doing:
Physical design of blocks according to specifications under challenging constraints targeting for the best power, area, and performance.
Be exposed and work on a variety of challenging designs (including high cell count and HS blocks). Resolving complex timing and congestion problems.
Daily work involves all aspects of physical design chip development (RTL2GDS) - synthesis, power and clock distribution, place and route, timing closure, power and noise analysis, and physical verification.
Taking part inflows development.

We are now looking for a Principal Formal Verification Engineer to join our our company Networking team!
As a Principal Formal Verification Engineer in our companys Networking Business Unit, you will play a critical role in shaping the formal strategy and execution of complex, high-performance silicon designs that power data centers, AI infrastructure, networking, and storage systems. This is a senior technical leadership role, requiring deep hands-on experience and a strong execution mindset.
You will join a passionate and expert team responsible for applying formal methods to validate designs at the highest level of rigor. This role offers the opportunity to work at the cutting edge of formal verification, influence architecture, and collaborate across functions to drive best-in-class silicon quality.
What Youll Be Doing:
Define and execute advanced formal verification strategies for complex digital blocks and systems.
Lead formal activities across multiple projects, ensuring scalability, completeness, and convergence .
Guide the development of formal testbenches, properties, assertions, and coverage models.
Collaborate with architects, RTL designers, and DV teams to identify formal targets and maximize design verification efficiency.
Provide technical leadership and mentoring to other formal engineers and contribute to the growth of formal expertise within the organization.
Evaluate and deploy state-of-the-art formal tools, flows, and methodologies to continuously improve formal verification coverage and impact.