דרושים » הנדסה » Senior Analog Layout Design Engineer

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לפני 22 שעות
Location: Yokne`am
Job Type: Full Time
Our Analog Layout design team is looking for a Senior Analog Layout Design Engineer - someone who is excited to join a growing group of diverse individuals responsible for handling challenge high-speed mixed-signal circuit designs. We have continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI - the next era of computing. We are a learning machine that constantly evolves by adapting to new opportunities that are hard to solve, that only we can pursue, and that matter to the world. This is our lifes work, to amplify human creativity and intelligence.

What you'll be doing:

Perform physical layout for mixed-signal functions like PLL's, high speed I/O circuits, SerDes, general I/O's, ESD structures designs in state-of-the-art sub-micron CMOS FinFET technologies using Cadence tools.

You will work with ASIC and mixed-signal engineers to customize designs for integration in VLSI products.

Job duties will include floor planning, custom layout and verifying against design rules and schematics, EM/IR analysis.
Requirements:
What we need to see:

You will have a minimum of 5 years of relevant mask analog layout experience.

An Electronics Practical Engineer certificate or a B.Sc. in Electrical Engineering.

Proven understanding of analog circuit layout concepts in submicron CMOS and FinFet technologies - such as Operational Amplifiers and ADC/DACs.

You are an expert with Cadence custom circuit design tools - particularly Virtuoso.

Experience running and debugging DRC and LVS with verification tools such as ICV, Calibre.

You can work effectively in a team, good interpersonal skills, enthusiasm and positive energy.

Ways to stand out in the crowd:

Proficiency in scripting languages like python, skill.

Knowledge of DRC and LVS checking flows, EM/IR tools, ability to customize DRC and LVS decks.
This position is open to all candidates.
 
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2 ימים
חברה חסויה
Location: Ra'anana and Yokne`am
Job Type: Full Time
We have continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI - the next era of computing. we are a learning machine that constantly evolves by adapting to new opportunities that are hard to seek, that only we can pursue, and that matter to the world. This is our lifes work, to amplify human creativity and intelligence. Make the choice to join us today.

What youll be doing:

Working closely with product design engineers, you'll perform PCB layout of high speed/high-density value-conscious PCBs for all business units in our company (GPU Desktop, Notebook, Automotive, Professional, Data Center, Deep Learning, and AI), all using Cadence PCB design tools.

Focus will be on the complete development of CAD layout from symbol creation, floor planning, and detailed component placement, constraints management, with a concept of topology and signal/trace integrity.

You will be responsible for the design releases required generation of artwork files, ODB++, and electronic PCB documentation.

Your designs will need to follow SI constraints, EMI/RFI control and FCC, UL and European regulations, IPC specifications and NRC regulations.
Requirements:
What we need to see:

B.Sc. in Electronic Engineer degree or equivalent experience.

2+ years of experience in high-speed design.

Having a detailed knowledge of circuit design and consideration for layout, routing, and timing constraints, DFM, DFA, DFT constraints in volume manufacturing is needed for this role.

Be an authority in using Cadence Allegro PCB design tools.

Have a deep understanding of High-Density Interconnect PCB layout and PCB Signal Integrity.

Knowledge in PCB manufacturing processes for HDI, Standard Thru-Hole, and Back-drilling.

Proven ability to work with a team while taking personal responsibility for your own contributions.

Agility in changing focus as the needs of our effort evolve.

Strong leadership, communication, and presentation abilities.


Ways to stand out from the crowd:

Experience in crafting PCBs in the 25gbps + range using back-drilling technology.

Designing sophisticated multi-layer HDI PCB's for very dense placement and routing is helpful.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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לפני 22 שעות
חברה חסויה
Location: Yokne`am
Job Type: Full Time
Networking unit has continuously reinvented itself over two decades. Our high-speed products are leading in the markets with innovative ways to improve speed and bandwidth from one generation to another. Today, we are increasingly known as the place for getting End-to-End High-Speed Ethernet and InfiniBand Solutions. We're looking to grow our company and build our teams with smart people who can join us at the forefront of technological advancement. Our IC Packaging design team is looking for a Senior IC Packaging Design Engineer to join our package team. and focus on delivering and designing state of the art high-speed Interconnect systems for Supercomputers and Datacenters. This position will collaborate with Technical Package Lead and cooperation with different design teams and development of complex, detailed layout of IC substrates for our products.

What you'll be doing:

As part of a IC Packaging design team, you will collaborate to implement high speed and PDN design for ASIC packages.

Develop symbols, pad stack and perform substrate package routing, placement, stack-up, reference plane, power distribution using Cadence APD (Allegro) or SiP tools.

Optimize package pin out incorporating system level trade-offs of pins assignment.

Develop methodologies to improve layout environment, productivity, reliability, and schedule considerations.

In close co-operation with the SI/PI/HW design teams and product teams.

Planning, ensuring stakeholder management and leading projects from start to finish.
Requirements:
What we need to see:

B.Sc. Electrical Engineering or an Electrical Practical Engineer certificate or equivalent experience.

5+ years hands-on in Package/PCB Layout and outing experience; including high speed design signal integrity practices.

Experience in substrate layout of wire bond and flip chip packages, preferred.

Knowledge in substrates or board manufacturing process.

Significant background with Cadence Virtuoso and APD (Allegro) or SiP and/or other PCB layout tools.

Ways to stand out in the crowd:

Knowledge in Ansys (SIwave, HFSS) or Cadence (Sigrity, PowerSI) simulation tools.

Familiarity with Skill language (Cadence) and basic parsing abilities (Python/Perl/Shell-scripting).
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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8837774
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2 ימים
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
We are looking for best-in-class Physical Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.

What you'll be doing:

Perform physical layout for full-chip level, integration, pinning and bump route.

Work with block owners and project managers to assure high quality convergence in all layout aspects.

You will be responsible for chip layout from the floorplanning stage through tape-out.
Requirements:
What we need to see:

An Electronics Engineer certificate or a B.Sc. in Electrical Engineering.

You should have 5 years of hands-on Full-chip layout and Physical Verification experience, demonstrating your proven expertise.

A strong background in Physical Verification methodologies, including DRC, LVS, ANT, ERC, and DFM for advanced process nodes, is required.

Knowledge in scripts' language: TCL, Unix and Shell.

Experience in Linux environments.

AI tools orientation or alternatively a desire to learn.

Familiarity with physical build EDA tools, including Synopsys (ICC2/FC) and Cadence (Innovus).

Familiarity with Physical Verification tools: Synopsys (ICV), Siemens (Calibre).

Self-motivation, attention to detail and good interpersonal skills.


Ways to stand out from the crowd:

Experience in methodology definition / flow owner of Full-chip / Place and Route.

Great teammate.

Ownership, self-learning skills and ability to work autonomously.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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8836166
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1 ימים
Location: Ra'anana and Yokne`am
Job Type: Full Time
Our Hardware team in Israel is looking for a highly experienced System and Board Design Technical Leader to join our Hardware Switch Group. The team leads the development of networking infrastructure for our next-generation data centers, focusing on accelerated performance and optimized end-to-end GPU connectivity. In this role, you will combine deep hands-on board-design expertise with broad technical leadership across multiple switch programs. You will lead products from architecture and concept definition through detailed design, validation, qualification, and mass production, while driving technical alignment, design reuse, and risk management across the project portfolio. Our Networking division is a leading supplier of innovative end-to-end InfiniBand and Ethernet connectivity solutions for servers, storage, and accelerated data centers. Our products deliver industry-leading performance, bandwidth, and scalability across AI, machine learning, cloud computing, and high-performance computing applications.

What youll be doing:

Lead complex switch system and board designs from concept through qualification, production ramp, and mass production, serving as the technical focal point and key decision-maker.

Maintain a broad technical view across multiple projects, identifying common risks, cross-project dependencies, opportunities for reuse, and long-term architectural needs.

Define product, system, and board-level requirements, architectures, interfaces, and technical tradeoffs.

Own and guide the detailed electrical design, including schematics, component selection, power architecture, connectivity, and CPLD/FPGA implementation.

Lead multidisciplinary collaboration across board design, mechanics, thermal, signal and power integrity, PCB layout, software, firmware, RTL, validation, manufacturing, and quality.

Guide and review complex multilayer PCB layouts, ensuring signal integrity, power integrity, reliability, manufacturability, cost, and performance requirements are met.

Perform hands-on board bring-up, integration, validation, and debugging using advanced laboratory equipment, and lead complex root-cause investigations.

Drive qualification, NPI, production-line stabilization, and mass-production support, ensuring technical issues are resolved and lessons learned are applied across projects.
דרישות:
What we need to see:

B.Sc. in Electrical Engineering or equivalent relevant experience.

10+ years of experience in complex board design and hardware-system development, preferably across the complete product lifecycle.

Proven ability to maintain a system-level and portfolio-level perspective while successfully driving the execution of detailed hardware designs.

Demonstrated experience leading multidisciplinary projects, technical reviews, architecture decisions, and complex problem-solving activities.

Deep knowledge of electrical schematics, component selection, advanced multilayer PCB design, and layout implementation.

Strong experience with high-current power-delivery design and a comprehensive understanding of CPLD/FPGA and RTL implementations.

Strong hands-on laboratory skills, including board bring-up, system integration, validation, debugging, and root-cause analysis.

Independent and proactive leadership, with strong project-management, communication, mentoring, and interpersonal skills.

Ways to stand out from the crowd

Experience developing data-center switches or other high-performance networking systems and taking complex hardware products from concept through high-volume manufacturing.

Proven high-speed design experience with interfaces operating at 25 Gb/s and above.

Experience defining reusable architectures and driving technical alignment across multiple products.

Strong knowledge of embedded systems, advanced PCB technologies, signal integrity, and power integrity.

Experience working with ODMs, contract manufacturers, silicon vendors, and compone המשרה מיועדת לנשים ולגברים כאחד.
 
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הגשת מועמדותהגש מועמדות
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מודים לך שלקחת חלק בשיפור התוכן שלנו :)
1 ימים
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
We are looking for best-in-class Physical Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.

What you'll be doing:
Physical design of blocks according to specifications under challenging constraints targeting for the best power, area, and performance.
Be exposed and work on a variety of challenging designs (including high cell count and HS blocks). Resolving complex timing and congestion problems.
Daily work involves all aspects of physical design chip development (RTL2GDS) - synthesis, power and clock distribution, place and route, timing closure, power and noise analysis, and physical verification.
Taking part inflows development.
Requirements:
What we need to see:
B.SC./ M.SC. in Electrical Engineering/Computer Engineering or equivalent experience.
2+ years of relevant experience.
Proven experience in RTL2GDS flows and methodologies.
Knowledge in physical design flows and methodologies (PNR, STA, physical verification).
Deep understanding of all aspects of Physical construction and Integration.
Knowledge in Physical Design Verification methodology LVS/DRC.
Familiarity with physical design EDA tools (such as Synopsys, Cadence, etc.).
Great teammate.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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8837147
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תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
לפני 21 שעות
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
We are is looking for a strong technical senior architect to join us in shaping the future. Senior Architects are innovators who can translate business needs into workable technology solutions. Their expertise is deep and broad. They are hands on, producing both detailed technical work and high-level architectural designs.

As a Senior architect in the AI Networking Research team, you will explore technological challenges on accelerate networking and building AI data centers. Research new transport functions and semantics for optimizing AI workloads, AI systems communication and accelerations and much more. You will also be leading architectural and development efforts across numerous technological fields, related to the modern AI data center, such as distributed AI and deep learning solutions, data analytics, High Performance Computing (HPC), Software Defined Networking (SDN), virtualization, storage, and more.

What youll be doing:

Enhance our GPU Networking offerings for accelerating AI workloads, such as our Dynamo, our NIXL and our UCX, tailored to the unique requirements of AI workloads.

Co-design hardware features (e.g., in GPUs, DPUs, or interconnects) that accelerate data movement and enable new capabilities for inference and model serving.

Identify and evaluate new technologies, innovations and partner relationships for alignment with our technology roadmap and business value.

Lead architecture and design of new technologies and innovations such as runtime systems, communication libraries, AI-specific technologies.

Lead proof-of-concept development to evaluate and drive such technologies.
Requirements:
What we need to see:

Hold a M.Sc. or Ph.D. in Computer Science, Electrical or Computer Engineering from a leading university (or equivalent experience).

5+ years of industry experience (or equivalent) in system architecture, AI systems architecture, scaling of AI, Parallelism of AI frameworks, or deep learning training workloads.

Experienced in algorithm design, system programming, computer architecture and operating systems.

Experienced in virtualization, networking and storage.

Deep understanding of performance profiling and optimization techniques, together with defining and using hardware features.

Strong programming and software development skills.

Ability and flexibility to work and communicate effectively in a multi-national, multi-time-zone corporate environment.

Ways to stand out from the crowd:

Shown research track record.

Have experience and passion for system architecture, CPU/GPU/memory/storage/networking.

Stellar communication skills.

Knowledge in Deep Learning frameworks and AI communication libraries (NCCL, UCX, MPI and equivalents).

Deep understanding of Inference and Training workloads and optimizations, like Prefill/Decode, data parallelism, Tensor parallelism, FDSP and others.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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8837892
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תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
לפני 22 שעות
חברה חסויה
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
Our networking is a world-leader in building the most powerful supercomputers in the world which drive the AI and HPC industry. These rely on high performant network ASICs which connect GPUs at scale for efficient data transfer and compute. We are looking for a hardware performance modeling architect to join our team and build a network simulator used for the design, optimization and exploration of our future networking chips. The role is cross-disciplinary, collaborating with hardware and software teams across the wider company. You will solve complex problems, develop innovative solutions and be instrumental in determining the architecture of our next generation networking solutions.

What you'll be doing:

Define the Network Adapter chip architecture end to end from the market requirements through design and all product life cycles (post/pre-silicon, on deployments). Work with related industry standards & customers on deploying your tech.

Collaborate with teams across teams (physical design, logic design, system software, firmware, applications)

Develop cycle-accurate simulation components to evaluate and analyze micro-architecture and architectural options.

Explore innovative ideas to improve and optimize our chip systems performance.

Serve as a focal point within the organization and distribute the knowledge that you acquire.
Requirements:
What we need to see:

BSc/MSc in Electrical Engineering, Computer Science from a known university.

Experience in developing simulation models.

4+ years of experience in a relevant role as chip architecture or system integration

Knowledge and understanding of computing and networking systems.

Strong debug skills.

A can-do attitude and high energy with leadership and excellent interpersonal skills and possess the ability to learn complex concepts in a fast pace environment.

Utmost passion for attention to details in design and a high focus on design quality.

Ways to stand out from the crowd:

Experience and love for system architecture, CPU/GPU/Memory/Storage/Networking.

We are widely considered to be one of the tech worlds most desirable employers.

Master's degree in Electrical Engineering, Computer Science or related technical field.

5+ years of relevant practical experience.

Experience with network simulation tools (omnet, ns3, sst, gem5).
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
2 ימים
Location: More than one
Job Type: Full Time
We are looking for best-in-class Physical Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.

What you'll be doing:

Perform advanced AI Static Timing Analysis (STA) for complex chiplet and full chip level.

AI use for timing optimization and data analysis in STA and PnR.

Running and build STA tools for anlyaze and debug timing.

Use traditional STA tools like Prime Time, review and debug timing paths, understand constraints, sdc generation, timing ecos generation.

Identify convergence risks and work closely with physical design, RTL and DFT teams, ensuring convergence throughout various project stages.

Responsible for a full timing closer and quality approval from pre-layout STA model through signoff.
Requirements:
What we need to see:

B.SC./ M.SC. in Electrical Engineering.

At least 5+ years of hands-on STA experience.

Experience in Prime Time and signoff methodologies.

A great teammate who thrives in a collaborative environment.

AI tools orientation or alternatively a desire to learn.


Ways to stand out from the crowd:

Agentic Frameworks.

AI prompting experience.

Experience in Linux environments.

TCL, Python, shell scripting abilities.

Experience with data collection and analysis.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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8836160
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תיאור
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תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
2 ימים
חברה חסויה
Location: Yokne`am
Job Type: Full Time
Our HW Sustain team in Israel is looking for an board designer to join the sustaining engineering team . The team leads the HW sustaining of networking infrastructure for NVIDIA next-generation data centers focusing on accelerated performance while enabling optimized end to end GPU connectivity.

Our Networking division is a leading supplier of innovative end-to-end InfiniBand and Ethernet connectivity solutions and services for servers and storage. We offer market-leading solutions that include adapter cards, switches, cables and software to support networking technologies. Our products optimize data center performance and deliver industry-leading bandwidth and scalability. In addition, we serve a wide range of markets including high performance computing, enterprise, data centers, cloud computing, big data and Web 2.0. We are constantly reinventing ourselves to stay ahead of the market and bring groundbreaking products and services to the industry. Our products are focused on delivering the most optimized power - performance communication solutions for industries like AI, ML, Cloud, Media and Entertainment as well as any other industry that can benefit from our Datastream acceleration.

What you'll be doing:

You will take engineering ownership of networking products once they are released to production

Provide engineering technical leadership for improving product availability, driving cost reduction, and resolving manufacturability issues

Work on debugging and resolving HW related quality issues to improve customers' satisfaction
Requirements:
What we need to see:

B.Sc. in Electrical Engineering (or equivalent experience).

2+ years as a board designer, experience in complex HW projects execution.

Hands-on lab skills.

Background in leading Multi layer PCB design.

Experience in high current power delivery design.

Personal: Project management skills, independent, excellent interpersonal relationship.


Ways to stand out from the crowd:

Experience in data-center switches products design for high volume manufacturing.

Proven knowledge in high speed design .

Experience in embedded systems design.

Knowledge in advanced PCB technology.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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8836179
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תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
לפני 22 שעות
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
We are looking for an experienced DFT Design Engineer to join the DFT design team and develop the next generation DFT technologies.

As a design engineer in the DFT design team, you will participate in definition and implementation of our DFT technologies in various projects. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting Switches, Nic and SoC product lines. We are working closely with a wide range of aspects - chip design, backend, verification and production testing. We are working on the most advanced technologies and sophisticated products, our DFT solutions are unique, innovative, and we are continuously improving and evolving the solutions to meet the challenging goals.



What you'll be doing:

In this position, you will be responsible for defining, coding and integrating sophisticated DFT components into various projects and using state-of-the-art technologies.

As a member of our DFT design team, you will participate in defining various DFT features and improvements, write micro-architecture documents, code design blocks, integrate them into various projects, bring your design to silicon tape-out and silicon testing and production.

Strong collaboration with architects, other design teams, verification, back-end and production testing to accomplish your tasks.
Requirements:
What we need to see:

B.Sc. in Electrical Engineering or Computer engineering or equivalent experience.

5+ years of practical experience.

Exposure to rtl implementation and coding.

Familiarity with verification tools.

Strong debugging, problem solving and analytical skills.

Strong communication and social skills are required.

Ability to work in a geographically diverse team environment.

Self motivated, independent and target oriented.



Ways to stand out from the crowd:

Prior Design or Verification experience.

Experience in developing sophisticated design blocks.

Integration of design elements to large cluster or full-chip.

Experience in working with back-end on area, power and timing closures.

Scripting ability.
This position is open to all candidates.
 
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