דרושים » חשמל ואלקטרוניקה » Senior Signal Integrity Engineer

we are seeking a highly motivated Power Integrity Engineer to join our Hardware Engineering team. In this role, you will be responsible for defining, analyzing, simulating, and validating power delivery networks (PDNs) for next-generation networking platforms supporting high-performance ASICs, advanced SerDes interfaces, optical modules, and AI-scale networking systems.
You will work closely with hardware architects, PCB designers, ASIC teams, signal integrity engineers, mechanical engineers, and manufacturing partners to ensure robust power delivery, optimal system performance, and successful product deployment.
Responsibilities
Lead Power Integrity (PI) activities throughout the hardware development lifecycle, from architecture through production.
Define and optimize board-level and package-level Power Delivery Networks (PDNs) for high-current networking ASICs and supporting devices.
Perform pre-layout and post-layout PI simulations using industry-standard tools.
Establish target impedance requirements and validate compliance across all power rails.
Analyze DC voltage drop, AC impedance, transient response, and power distribution performance.
Collaborate with PCB layout engineers to optimize stackups, plane structures, decoupling strategies, and power routing.
Work closely with Signal Integrity engineers to ensure SI/PI co-optimization of high-speed interfaces.
Develop power integrity design guidelines and best practices for next-generation networking products.
Support schematic reviews, layout reviews, and design sign-off activities.
Perform laboratory measurements and correlation using oscilloscopes, VNAs, power analyzers, current probes, and related equipment.
Investigate and resolve PI-related issues during board bring-up, validation, and production.
Collaborate with ASIC, FPGA, memory, optics, and power component vendors to optimize overall system performance.
Drive continuous improvement of PI methodologies, simulation flows, and validation processes.

We are seeking a highly skilled and experienced multidisciplinary engineer with a strong background in system design to join our team. In this role, you will contribute to our upcoming projects and play a key part in the rapid expansion of the Ethernet market.
As a such, you will be responsible for developing high-speed digital and analog circuit boards used in Ethernet products. Your duties will include designing board schematics, overseeing PCB layout, and conducting lab . Additionally, you will be responsible for evaluating new hardware solutions, providing technical leadership in troubleshooting and reviewing schematics, layouts, and design for manufacturability (DFM), as well as managing components selection.

We are seeking outstanding Electrical Engineering graduates from top universities to join our Electrical Compliance team and gain hands-on experience with cutting-edge networking technologies and best-in-class ASIC interfaces.
Responsibilities
Operate and maintain test equipment for compliance and validation processes.
Perform switch platform testing to ensure reliability and performance.
Work with advanced ASIC interfaces, including Ethernet, PCIe, USB, SPI, UART, I2C
Assist in troubleshooting and analysing electrical compliance issues.
Collaborate with senior engineers to improve testing methodologies.
Career Growth Opportunities
Gain real-world experience in compliance testing and hardware validation.
Learn from industry-leading engineers and expand your technical expertise.
Build skills in automation, data analysis, and advanced networking technologies that are highly valued in the industry.
What We Offer
Exposure to state-of-the-art networking technologies.
Opportunity to work on real-world compliance challenges.
Mentorship from industry experts.
Learn from the best and build the future of networking
Ready to launch your career? Apply now and start building the future with our company.
Please attach your gradesheet.

Required Staff GPU Verification Engineer
Join our GPU Hardware Verification team in Raanana, Israel, and help shape the future of the world's most widely deployed GPU architecture - Mali. As a Staff Hardware Verification Engineer, you will play a key technical role in verifying advanced GPU components and subsystems, working alongside architects, designers and verification engineers to deliver high-quality, industry-leading graphics technology. You'll contribute to complex verification environments, solve challenging technical problems and help drive continuous improvements to our verification methodologies and flows.
Responsibilities:
Develop and execute verification plans for advanced GPU components and subsystems.
Develop and maintain AI tools, agents, and skills to support our engineering teams and workflows.
Build, maintain and enhance robust verification environments using SystemVerilog and UVM.
Apply coverage-driven, constrained-random and, where appropriate, formal verification techniques to achieve comprehensive functional coverage.
Debug complex functional issues and work closely with Design and Architecture teams to identify and resolve root causes.
Contribute to block-level and system-level verification, including environment integration and regression analysis.
Improve verification methodologies, automation, scripting and continuous integration flows to increase quality and efficiency.
Participate in verification reviews and support verification sign-off activities.
Share technical knowledge and collaborate with colleagues across the wider GPU engineering organisation.

The System team defines and develops cutting-edge 5G technology. In this role, you will lead the system team responsible for defining our next-generation modem products and developing modem algorithms, working at the intersection of research, system design, and implementation.

Responsibilities

Lead a team of senior system and algorithm engineers responsible for developing innovative 5G modems.

Partner closely with VLSI and SW teams implementing the modem HW and SW and align on system definitions with implementation constraints.

Develop and maintain deep expertise in cellular standards and their implications for modem design.

Lead system and algorithmic research, balancing trade-offs between DSP/SW/HW implementations, performance, implementation cost, real-time constraints, and time-to-market.

Own system definitions, requirements, and implementation from initial research through simulation to official release, including MATLAB/C/C++/SystemC modeling and specification documentation.

Mentor and grow team members, fostering technical excellence and professional development.

We are seeking a senior ATE Software Engineer to design, build, and deploy our next-generation automated manufacturing test platform for advanced telecom, high-density switching, and optical networking hardware.
In this role, you will bridge the gap between R&D hardware/firmware teams and high-volume manufacturing lines. You will take ownership of ingesting, refactoring, and consolidating disparate R&D scripts, diagnostic tools, and legacy software into a single, scalable, production-grade test platform.
We expect you to leverage modern AI-assisted development tools and workflows to maximize engineering efficiency, accelerate delivery timelines, and build highly robust, self-healing test automation. You will deploy test stations across global Contract Manufacturers (EMS/ODM), actively stabilize production lines through bring-up and ramp-up, and drive continuous test maintenance and root-cause failure analysis (RCA).
Key Responsibilities
Test Platform Architecture & Software Development:
Design, develop, and productize robust, modular test software frameworks for board-level (PCBA) and system-level manufacturing testing across multiple product lines and manufacturing sites.
Codebase Unification & Refactoring:
Consolidate and standardize R&D diagnostic libraries, silicon validation scripts, and firmware tools developed across various environments (Python, C# / Visual Studio, VB, ATEasy, Linux) into a unified, maintainable test execution engine.
AI-Accelerated Development & Workflow Automation:
Actively integrate Generative AI tools and AI coding agents into your daily workflow to accelerate code conversion/refactoring, automate test case synthesis, generate edge-case validation scripts, and enhance overall codebase resilience.
Production Line Deployment & Stabilization:
Deploy test stations and fixtures to local and overseas EMS/CM production lines. Monitor, debug, and fine-tune test execution during NPI and ramp-up phases until yield, takt time, and test stability targets (CPK / First Pass Yield) are achieved.
Failure Investigation & Intelligent RCA:
Investigate complex system-level and component-level test failures. Utilize advanced log analysis, structured telemetry, and pattern recognition to drive root-cause investigations and implement preventive software/hardware fixes.
Ongoing Test Maintenance & Optimization:
Provide continuous operational Production line support and maintenance, bug fixes, software updates, and station cycle-time optimizations for active mass-production lines.
R&D Collaboration & Test Specification:
Collaborate closely with Hardware, Firmware, and Validation teams during early design phases to define test specifications, drive Design for Testability,
Documentation & Technical Reporting:
Author and maintain comprehensive testing documentation, Standard Operating Procedures (SOPs), test coverage matrices, and detailed failure analysis reports.
Manufacturing Systems Integration:
Integrate automated test sequences with CMs SFC/MES/QMS, serialized tracking, and central test log databases.
Log Analysis & Analytics Tool Development:
Design and build dedicated log parsing, data visualization, and diagnostic analytics tools to streamline complex hardware/software debugging, accelerate root-cause analysis (RCA), and drive continuous production line cycle-time and yield optimization.

In this role, as Senior Team Leader of the AI NPU Simulator, you will lead a Group developing a major part of AI simulation framework, in the core of our AI software offering. The AI NPU simulator enables the execution of state-of-the-art LLMs, Generative AI models, and neural networks with exceptional performance, impacting multiple hardware and software teams across the company.

You will drive the development of robust, scalable, and efficient simulation software, working closely with global Architecture, VLSI, and Software teams to shape next generation of AI solutions.

We are looking for an exceptional hands-on leader with strong technical expertise, proven experience leading software teams, and a track record of delivering complex, state-of-the-art products on time and with high quality. The ideal candidate is execution-driven, innovative, and passionate about building high-performing teams and cutting-edge AI technology.



Responsibilities

Manage and lead two teams (Development + Validation) .

Be accountable for the simulation lifecycle, including architecture, development, validation, and release.

Lead development of advanced simulation models for AI processors.

Own delivery of complex, multi-release roadmaps.

Ensure strong alignment between hardware design, compiler behavior, and simulation models.

Drive system-level correctness and performance accuracy.

Support system bring-up, debugging, and customer-facing activities when needed

We are looking for an exceptional hands-on leader with strong technical expertise, proven experience leading VLSI Front-End Design engineers, and a track record of delivering complex, state-of-the-art products on time and in production ready quality.

The ideal candidate is execution-driven, innovative, and passionate about building high-performing team and cutting-edge AI technology.

Responsibilities

Manage and lead a team of Front-End Design engineers.

Be accountable for the teams development lifecycle, including architecture, development, validation, and release, focusing on meeting PPAA targets.

Lead development of advanced VLSI IPs for AI processors, DSP and HW accelerators while continuing pushing the VLSI design methodologies, procedures, sign off and AI tools assimilation to its next level.

Support system bring-up, debugging, and customer-facing activities when needed

We are looking for a CAD/Emulation Graduate Engineer to join our infrastructure team. This position is designed as an entry-level role for a recent graduate, providing hands-on experience with advanced VLSI CAD/Emulation and infrastructure



Key Responsibilities

Develop and maintain automation scripts for front-end Emulation and VLSI CAD flows and automation.

Support execution and releases of VLSI artifacts while marinating advanced CAD flows.

Assist in improving infrastructure efficiency and tool integration.

Work with version control systems and CI/CD pipelines for regression and build environments.

Own and rule top notch emulation methodologies and procedures.