דרושים » הנדסה » HW Architect team leader

we are looking for a Senior HW architect
What will you be doing?
Lead research, evaluation, and architectural definition of next-generation chips - from requirements through production.
Define next-generation Packet Processor / Datapath / Congestion Management architectures for high-performance, complex SoC Ethernet Switches.
Design the system architecture and detailed micro-architecture definition across major functional blocks.
Collaborate closely with design, verification, and modeling teams to ensure architectural intent is fully realized.
Work cross-functionally with other architecture teams to shape cohesive system solutions.
Explore and evaluate new technologies and innovative approaches for future products.

we are looking for a Senior Core Power Management Architect.
Job Description:
Will drive the implementation of autonomous core power management for best performance and power efficacy.
The Power expert will take charge in understanding business-units (customers) needs, and translate them to CPU core solution.
This expert will utilize his power management experience to deliver world-class power efficient HW-SW solutions for Huawei products.

This position can be located in Haifa or Hod HaSharon
Be part of a team responsible for designing the next generation of mobile devices. The position includes responsibility for system analysis and SW/HW architecture design for high-speed and low-power interfaces, networking algorithms, or audio processing. This job requires a collaboration with multiple engineering teams in various geographical locations to define requirements, interfaces, interaction between SW and HW blocks, performance analysis, and more.

Looking for a CPU performance modeling architect to take responsibility over the performance aspects of new CPU instructions or modes of operation. The role includes but is not limited to:
Partners with lead SW and HW architects to co-invent optimal HW and SW solutions that come to address requirements. Influences the direction based on experiments and simulation data
Models CPU functionality, performance and/or power in pre-silicon simulators
Defines and runs performance experiments to aid feature definition. Such experiments can be performed on a pre-silicon simulation environment or in a real system or on a combination of both or even in combination with analytical models
Provides experimental/proof of concept for new features and implementation alternatives meeting performance constraints.
Analyzes the bottlenecks of current CPUs on workloads that reflect CPU future usages
Potentially (in the future), lead a team doing above activities
An adequately qualified candidate can also become the leader of definition for some features in addition to all the roles above.

we are looking for a Senior CPU Core Architect.
The CPU Architect will take charge in defining a processor core that meets the requirement of high performance, high bandwidth, and scalable processing architecture. This architect will utilize his processor experience to deliver a world-class processor ASIC with many advanced features for Huawei products.

we are looking for a AI architect/ microarchitecture.
Job Description:
Define the AI core architecture that will shape the next generation of AI chips, leading the global competition in AI computing power. As a key contributor to the competitiveness of AI core architecture, we drive chip architecture innovation starting from algorithm evolution, building a full-stack closed-loop capability of "algorithm-architecture-circuit-system," and creating a globally leading, independently controllable AI accelerator core to support the Ascend AI ecosystem and the implementation of large model strategies.
Responsibilities:
Lead next generation inference solution optimized for power, performance and area. Considering scalable solution for large scale systems with many resources. Covering efficient data delivery and workload map.

Job Description:
Define the AI core architecture that will shape the next generation of AI chips, leading the global competition in AI computing power. As a key contributor to the competitiveness of AI core architecture, we drive chip architecture innovation starting from algorithm evolution, building a full-stack closed-loop capability of "algorithm-architecture-circuit-system," and creating a globally leading, independently controllable AI accelerator core to support the Ascend AI ecosystem and the implementation of large model strategies.
Responsibilities:
Modeling of HW specification of new architecture and microarchitecture. Working closely with architect and microarchitecture on modeling the specification.

Required ATE Design Engineer (IL)
Hod Hasharon
The ATE Engineer is responsible for working with engineering teams to develop the ATE testing stations. We are seeking a highly experienced ATE Hardware and SW Engineer with a strong background in RF, digital, and system-level testing. This role requires deep hands-on knowledge and the ability to design, develop, and support advanced test equipment for complex electronic systems used in production environments.
What will you do:
Design and develop Automated Test Equipment (ATE) for RF, digital, and mixed-signal products at board and system levels.
Collaborate with R&D and manufacturing teams to define and implement test strategies and solutions.
Analyze and understand system schematics, block diagrams, and interface requirements to create robust and reliable ATE.
Support production lines by troubleshooting test failures and optimizing test processes for yield and throughput improvements
Interface with software and firmware teams to integrate hardware with control and automation systems.
Evaluate and select test instruments, fixtures, and measurement techniques based on product specifications.
Maintain documentation for test systems, including design files, calibration procedures, and troubleshooting guides.
Train technicians and engineers in ATE operations and maintenance.