דרושים » חשמל ואלקטרוניקה » Physical Design CAD Engineer

Requirements:
B.SC./ M.SC. in Electrical Engineering/Computer Engineering or equivalent work experience.
5+ years of experience in Physical Design.
Proven experience in RTL2GDS flows and methodologies.
Knowledge in physical design flows and methodologies (PNR, STA, physical verification).
Deep understanding of all aspects of Physical construction and Integration.
Strong background of Physical Design Verification methodology LVS/DRC.
Familiarity with physical design EDA tools (such as Synopsys, Cadence, etc).
Great teammate.

Requirements:
What we need to see:

B.SC./ M.SC. in Electrical Engineering/Computer Engineering.

5+ years of experience in physical design.

Proven experience in RTL2GDS flows and methodologies.

Knowledge in physical design flows and methodologies (PNR, STA, physical verification).

Familiarity with physical design EDA tools (such as Synopsys, Cadence, etc.).

Great teammate.

Requirements:
B.SC./ M.SC. or equivalent experience in Electrical Engineering/Computer Engineering.

2+ years of experience in physical design and/or BE power optimization aspects.

Familiarity with physical design EDA tools (such as Synopsys, Cadence, etc.).

Knowledge in physical design flows and methodologies (PNR, STA, physical verification) is an advantage.

FE design experience is an advantage.

Excellent problem-solving, partnership, and interpersonal skills.

Requirements:
B.SC./ M.SC. in Electrical Engineering/Computer Engineering or equivalent work experience
5+ years of hands-on STA experience.
Experience in Prime Time and signoff methodologies.
Deep understanding of all aspects of Physical construction and Integration.
Great teammate.

Requirements:
B.Sc. or M.Sc. in Electrical or Computer Engineering, or relevant professional experience.
At least 2 years of confirmed experience in SoC design, design automation, or methodology development.
Strong programming or scripting skills in at least one language (Python preferred; Perl, Tcl, or Make are advantages).
Understanding of physical design concepts including placement, routing, timing closure, and ECO implementation.
Familiarity with EDA tools for synthesis, place-and-route, and timing analysis (Synopsys or Cadence flows).
Strong analytical, problem-solving, and soft skills.
Way to stand out from the crowd:
Experience developing or maintaining SoC design or automation flows.
Knowledge of timing-related analysis (crosstalk, noise, delay).
Background in power or timing optimization techniques.
Collaborative attitude with the ability to work effectively across multi-functional teams.
Self-motivated and eager to learn while improving existing design flows.

Requirements:
BSc or MSc in Electrical Engineering or Computer Engineering.
8+ years experience in full chip design.
Experience in leading the full-chip level design and successfully taping out multiple intricate SoCs.
Experience in floor planning, integration, signoff methodologies, and signoff tools for hierarchical designs.
Experience with SoC design practices such as multiple voltage and clock domains, integration of mixed-signal IPs and I/O integration.
Expert knowledge of the entire backend design flow from RTL to TO.
Experience with STA (Static Timing Analysis) tools like primetime or tempus.
Experience with IR drop tools like Ansys Redhawk or Volta's.
Physical Verification Expert (DRC/LVS).
Strong independent and motivated to learn quickly, hard-working, and is results oriented.
Good social skills and ability to work collaboratively with other teams.
Preferred
Experience with high-speed serial interfaces such as PCIe, DDR, Ethernet.
Familiarity with advanced DFT flows & tools.
Strong proficiency in scripting language, such as, Perl, Tcl, Python, Make, and automation methods/algorithms.

Requirements:
A VLSI Design Engineer with extensive experience in backend design
B.Sc./M.Sc. in Electrical Engineering or Computer Engineering with relevent background.
​ 5+ years of hands-on experience in a relevant domain
Strong understanding of Place & Route flow
Preferred qualifications:
Deep understanding of Physical construction and Integration.
Knowledge of Physical Design Verification methods like LVS/DRC and formal verification.
Experience with PD CAD and Physical Design EDA tools (e.g., Synopsys, Cadence).
Ability to support technology adoption and new tool integration.
Great teammate, self-learner, and able to work independently

Requirements:
What we need to see:
B.Sc./M.Sc. in Electrical Engineering, Computer Engineering, Computer Science, or equivalent experience.
5+ years of experience in VLSI CAD tool development, with a strong focus on integrating AI/ML techniques into EDA workflows.
Proficiency in Python and at least one AI/ML framework (such as TensorFlow, PyTorch, or scikit-learn).
Hands-on experience with VLSI physical design and familiarity with industry-standard EDA tools (e.g., Synopsys, Cadence).
Knowledge of data preprocessing, feature engineering, and model deployment as applied to VLSI design challenges.
Experience developing and maintaining automation scripts (Python, Perl, Tcl, Make).
Strong analytical skills in evaluating the impact of AI solutions on design quality, performance, and productivity.
Excellent communication skills and the ability to work cross-functionally in a fast-paced environment.
Self-motivation, attention to detail, and a track record of delivering robust solutions to production.

Ways to stand out from the crowd:
Demonstrated experience deploying AI/ML models in production VLSI CAD environments.
Contributions to open-source AI/EDA projects or publications in relevant conferences/journals.
Deep understanding of VLSI design challenges-such as timing closure, power optimization, or yield enhancement-and how AI can address them.
Experience with cloud-based or distributed compute environments for large-scale AI training and inference.
Strong ownership, curiosity, and a passion for continuous learning and innovation.

Requirements:
Electrical Engineering B.Sc., Computer Engineering or other relevant engineering department graduate, or equivalent experience.
2+ years of experience in RTL verification
Self-motivated, ability to work independently and drive tasks to completion
A team player with good communication and interpersonal skills.
Ways to stand out from the crowd:
Knowledge in Specman, Verilog
Background in Networking.

Requirements:
B.Sc. in Electrical Engineering or Computer Engineering with high scores or equivalent experience.
1+ years of experience in RTL design and/or dynamic verification.
Completion of programming and logic design courses.
A great teammate with good communication and interpersonal skills.