דרושים » חשמל ואלקטרוניקה » Chip Design Engineer

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27/03/2024
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נאספה מאתר אינטרנט
06/05/2024
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
We are looking for best-in-class Physical Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.

What you'll be doing:

Physical design of blocks according to specifications under challenging constraints targeting for the best power, area, and performance.

Be exposed and work on a variety of challenging designs (including high cell count and HS blocks). Resolving complex timing and congestion problems.

Daily work involves all aspects of physical design chip development (RTL2GDS) - synthesis, power and clock distribution, place and route, timing closure, power and noise analysis, and physical verification.

Taking part inflows development.
Requirements:
What we need to see:

B.SC./ M.SC. in Electrical Engineering/Computer Engineering or equivalent work experience.

5+ years of experience in physical design.

Proven experience in RTL2GDS flows and methodologies.

Knowledge in physical design flows and methodologies (PNR, STA, physical verification).

Deep understanding of all aspects of Physical construction and Integration.

Strong background of Physical Design Verification methodology LVS/DRC.

Familiarity with physical design EDA tools (such as Synopsys, Cadence, etc.).

Great teammate.
This position is open to all candidates.
 
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נאספה מאתר אינטרנט
16/04/2024
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
We are looking for best-in-class Physical Design Engineer to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.

What you will be doing:

Physical design of blocks/top-level according to specifications under challenging constraints targeting for the best power, area, and performance.

Be exposed and work on a variety of challenging designs (including high cell count and HS blocks). Resolving complex timing and congestion problems.

Daily work involves all aspects of physical design chip development (RTL2GDS) - synthesis, power and clock distribution, place and route, timing closure, power and noise analysis, and physical verification.

Taking part inflows development.

Act as Partition/Unit level physical design technical leader and focal point.
Requirements:
What we need to see:

B.SC./ M.SC. in Electrical Engineering/Computer Engineering.

2+ years of experience in physical design.

Proven experience in RTL2GDS flows and methodologies.

Knowledge in physical design flows and methodologies (PNR, STA, physical verification).

Familiarity with physical design EDA tools (such as Synopsys, Cadence, etc.).

Great teammate.
This position is open to all candidates.
 
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נאספה מאתר אינטרנט
06/05/2024
חברה חסויה
Location: Tel Aviv-Yafo
Job Type: Full Time
We are looking for best-in-class Chip integration Manager to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.

What you'll be doing:

Implement Chip level design through collaboration with cross-functional teams (Functional Design, DFT, Design Verification, System Verification, STA, and Physical Design) .

Be exposed and work on a variety of functional and structural challenges. Including functional debug, getting ready for physical design, emulation, resolve design quality issues.

Daily work involves aspects of chip level design, including partitioning, CDC, RDC, trial synthesis, design quality checks.

Taking part in flows development and deployment.

build ,coach and lead a team of chip integration for the networking products of us.

Plan and track execution of chip integration, meet the schedule and quality requirements.
Requirements:
What we need to see:

B.SC./ M.SC. in Electrical Engineering/Computer Engineering.

10+ overall years of actual design experience in chip design.

5+ years of hardware/VLSI design leadership position.

Solid hands-on RTL design skills in System-Verilog.

Passion for quality and readiness to physical design, emulation, firmware and other customers.

Proficiency in at least one scripting languages like python, bash, tcl.

Great teammate.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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נאספה מאתר אינטרנט
16/04/2024
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
We are looking for best-in-class Physical Design CAD Engineer to join our outstanding Networking Silicon engineering team, developing the industry's best high speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.

What you'll be doing:

You will be in charge of developing physical design, synthesis, STA and Logic eq methodologies for implementation of networking chips and SOCs.

Work closely with block owners. full Chip STA engineers and project managers to assure high quality and timely convergence.

Come up with unique and creative solutions to the state of the art physical design problems that are needed for Our chips.

Additional responsibilities include participating and developing flow and tool methodologies for chip floorplan, power and clock distribution, P&R, timing analysis and closure, power and noise analysis and back-end verification across multiple projects.
Requirements:
What we need to see:

B.SC./ M.SC. in Electrical Engineering/Computer Engineering (or equivalent experience).

At least 5 years of experience

Should be a power user of synthesis, place and route, STA EDA tools from Synopsys (DC/FC/PT), Cadence (Innovus/Tempus) with 5+ years of experience.

Proficiency using Python, Perl, Tcl, Make scripting.

Expertise in analyzing and converging crosstalk delay, noise glitch, and electrical/manufacturing rules in deep-sub micron processes.

Knowledge in physical design and optimization e.g. placement, routing, cell sizing, buffering, logic restructuring, etc. to improve timing and power required and implementing them through ECOs is required.

Knowledge in process variation effect modeling and experience in design convergence taking into account variations.

Successful track record of delivering designs to production is necessary.

Self-motivation, attention to detail, and good written, verbal, and presentation skills are critical to success in this role.

Great teammate, ownership, self-learning skills, and ability to work autonomously.

Ways to stand out from the crowd:

Experience in methodology definition / flow owner of synthesis / Place and Route/ STA steps is an advantage.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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נאספה מאתר אינטרנט
16/04/2024
Job Type: Full Time
We are seeking best-in-class ASIC Design Engineers to design and implement the worlds leading CPU's and SoC's. This position offers you the opportunity to have real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. We are a learning machine that constantly evolves by adapting to new opportunities that are hard to pursue, that only we can take on, and that matter to the world. We have crafted a team of excellent people stretching around the globe, whose mission is to push the frontiers of what is possible today and define the platform for the future of computing.

We are building a new group in Israel, this group will deliver security engines and risc-V processor IPs to all of our product lines working with all our groups around the world. We are looking for inquisitive, motivated engineers with experience to build this group from the ground up. As a senior member of our design team, you will be responsible for the design and implementation of high-performance, low-power security engines and risc-V processor modules. You will work closely with architects, design engineers, verification engineers, and physical design engineers to accomplish your tasks.

What you will be doing:
Participate in micro-architecture development and document specifications.

Implement in RTL and/or work on the verification team to ensure that the design is functional.

Apply logic design skills to optimize and meet performance and power goals.

Deliver a synthesis/timing clean design while working with the physical design team to ensure a routable and physically implementable design.
Requirements:
What we need to see:

A Bachelors degree in electrical engineering or computer engineering.

5+ years of relevant experience in chip design development of complex designs.

Highly proficient in logic design, Verilog, and/or System-Verilog, with a deep understanding of physical design and VLSI.

Good interpersonal skills. And team player.
This position is open to all candidates.
 
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נאספה מאתר אינטרנט
16/04/2024
Location: Tel Aviv-Yafo
Job Type: Full Time
We are seeking a highly motivated Software Modeling Engineer to join our team, and to ramp the activity of simulation and modeling in the architecture group. Our next-generation Infiniband and NVL switches will be at the forefront of connecting and powering the world's most advanced compute clusters, from supercomputers used in AI research to high-performance clusters used in industries such as finance and research labs.
As a modeling engineer in our company, you will have the opportunity to work on some of the most cutting-edge technology and help to drive the innovation of our next generation of switches that will be used by top researchers and engineers around the world. The products you'll develop will be integrated in many leading-edge compute clusters, and supercomputers, and you'll be part of a team with a strong track record of success.

What you'll be doing:

Develop from scratch the entire modeling environment and infrastructure with the architecture team.

Develop software-based switch architecture models.

Collaborate with cross-functional teams, including other architecture teams, logic design, system software, firmware, and research teams, to ensure the successful execution of the project.

Lead bringup and debug of new switch configurations in simulation.
Requirements:
What we need to see:

BSc or MSc in Electrical Engineering / Computer Science or equivalent experience.

5+ years of chip modeling / software engineering / chip design / design verification / validation experience.

Hands on experience in C/C++.

Experience with scripting languages (Python).

Excellent interpersonal skills and ability to collaborate with on-site and remote teams.

Deep understanding of how to build and integrate systems with various technology components.

Strong debugging and analytical skills.

Ways to stand out from the crowd:

Knowledge and understanding of networking and compute systems.

You're passionate about low level software .

Experience with HW/SW interactions.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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נאספה מאתר אינטרנט
16/04/2024
חברה חסויה
Location: Tel Aviv-Yafo
Job Type: Full Time
We are now looking for a motivated Chip Architecture Manager to use your creativity to work on the company`s Switch family with a highly inventive and knowledgeable team. We are looking for an experienced architect, with knowledge in design and micro-architecture, to lead a switch performance team, making our switches perform best on the relevant workloads, without compromising on ASIC area. The switch architecture performance team also works on tuning the company`s existing switches in-field to provide maximal performance.

Our technology has no boundaries! We are building the worlds most groundbreaking and state of the art compute platforms for the world to use. Its because of our work that scientists, researchers and engineers can advance their ideas. Its not just technology though! It is our people, some of the brightest in the world, and our company diverse culture make us one of the most fun, innovative and dynamic places to work in the world! At the center of our culture are our core values like innovation, excellence and determination and team, which guide us to be the best we can be.

What you'll be doing:

Be part of the team that define the company`s Switches chip architecture end to end from the market requirements through design and all product life cycles (post/pre-silicon, on deployments).

Work with related industry standards & customers on deploying your tech.

Collaborate with teams across teams (physical design, logic design, system software, firmware, applications).

Perform research and analysis for current and future architectures.

Develop Proof of Concepts using our technology, collaborating with our most sophisticated customers on state-of-the-art innovations.
Requirements:
What we need to see:

B.Sc. in Electrical or Computer Engineering.

5+ overall years of relevant experience

3+ years of managerial experience

ASIC architecture experience, area/power/complexity tradeoffs.

Ability to code performance simulations.

Knowledge and understanding of computing and networking systems.

Can-do attitude and high energy with leadership and excellent interpersonal skills and possess the ability to learn complex concepts in a fast pace environment.

You have the utmost passion for attention to detail on design and a high focus on design quality.

Ways to stand out from the crowd:

Experience and love for system architecture, CPU/GPU/Memory/Storage/Networking.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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נאספה מאתר אינטרנט
06/05/2024
חברה חסויה
Location: Tel Aviv-Yafo
Job Type: Full Time
We are looking for talented and experienced Chip Design Verification Engineers to join our Networking R&D team, developing the industry's most complex communication devices, delivering the highest throughput at lowest power and lowest latency.
Responsibilities:
Definition, architecture, and development of IP-based block-level verification environments in SystemVerilog, integrated and reused in full-chip environments.
Building reference models, verification and simulation of SOC modules according to specifications, including performance calculations.
Working in a combined design and verification team which develops the SOC silicon core units.
Working closely with multiple teams within the organization, such as Architecture, Software, and Hardware.
Requirements:
Required Qualifications:
BSc/MSc in Electrical Engineering or Computer Engineering.
At least 3 years experience in functional verification. Preferably with SystemVerilog/VMM/UVM.
Strong debugging, problem solving and analytical skills.
Team player and fast learner
Advantage for experience with design, synthesis and post-silicon validation flows.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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נאספה מאתר אינטרנט
2 ימים
חברה חסויה
Location: Tel Aviv-Yafo
Job Type: Full Time
Take part in the development of cutting-edge products within a disruptive system architecture. You will have the opportunity to work on the technologies that power the worlds largest cloud provider, in a dynamic, open, and fast-paced environment. AWS provides a highly reliable, scalable, low-cost infrastructure platform in the cloud, which powers hundreds of thousands of businesses in 190 countries around the world. As part of our Web Services, we are looking for talented engineers to help us develop a semiconductor platform based on a revolutionary architecture.

Looking for exceptional senior engineers to join the top-tier team that is developing the next generation semiconductor platform, based on a revolutionary architecture. Engineers will participate in design and verification activities, working on the next generation of our products.

You are invited to take part in developing, integrating and deploying cutting-edge technologies, starting with identification and definition of project requirements, architecture, feature development, and collaboration with the different groups.
Your design will be integrated into the nitro SoC, on millions of servers worldwide. This is an opportunity to have a large-scale impact.
As a VLSI engineer and a member of the Nitro project, you will have an impact over the device through its entire lifecycle, from the product definition stage to mass production. You will work in close collaboration with multiple groups, including Architecture, Software, Verification, Backend, and DFT.

Key job responsibilities:
*Full ownership of one or more IPs within the product:
-Micro-architecture.
-RTL coding and debug.
-Synthesis and timing closure.
-Sign-off.
* Supporting the Verification and Emulation teams: Test plan, Coverage review.
* Ensuring that the chip meets quality and reliability standards.
* Collaborating with cross-functional teams, including Product Definition, Verification, Software, and Physical design.
Requirements:
BASIC QUALIFICATIONS:
- BSc in Computer Engineering/Computer Science/Electrical Engineering.
- Excellent communication skills.
- Experience in chip design- an advantage.

PREFERRED QUALIFICATIONS:
- Verilog / System Verilog.
- Protocols: AXI, CHI, DDR, Networking, PCIe.
- Architecture of NOC, Coherent and non-Coherent fabrics.
- Experience with the entire SoC cycle Synthesis / STA / CDC / Lint.
- Experience with Design Automation.
- Higher degree in a related technical field is an advantage.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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נאספה מאתר אינטרנט
7 ימים
חברה חסויה
Location: Tel Aviv-Yafo
Job Type: Full Time
We are looking to hire a motivated and skilled core architect to join our system architecture group in Tel Aviv and take part in ramping up our deep learning HW & SW from the ground up. As a team member, you will be responsible for the architecture requirements and definitions of our deep learning processor, as part of our SoCs. You will work closely with the product, algorithms, HW and SW compiler teams to plan and execute the next chip products.
If youre a talented and motivated system architect who is excited about difficult architecture & system challenges, we want to meet you!
Responsibilities:
Define our deep learning processor architecture and SW stack enhancements for different markets and use cases incorporating our products.
Analyze AI pipelines derived by customer and product requirements for current and future products.
Evaluate our products power and performance by developing accurate architectural models and exploring HW & SW architectural changes to enhance product KPIs.
Requirements:
B.Sc./M.Sc. Electrical Engineering or Computer Engineering or related field from a leading university.
3+ years of experience as a system / SW / chip architect or architecture model engineer
5+ years of experience as one of the following:
Logic designer
Verification/system validation engineer
FW / compiler engineer
Advantages
Proficiency in Python or C++
Experience with Deep Neural Networks or other ML methods.
Experience with Deep Learning ASIC architecture.
Experience with graph and low-level compilers.
Experience with HW/SW co-design & partitioning.
Experience with functional safety and automotive qualifications.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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