דרושים » הנדסה » Senior Physical Design Backend Engineer

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נאספה מאתר אינטרנט
06/05/2024
Location: Yokne`am and Tel Aviv-Yafo
Job Type: Full Time
We are looking for best-in-class Physical Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.

What you'll be doing:

Physical design of blocks according to specifications under challenging constraints targeting for the best power, area, and performance.

Be exposed and work on a variety of challenging designs (including high cell count and HS blocks). Resolving complex timing and congestion problems.

Daily work involves all aspects of physical design chip development (RTL2GDS) - synthesis, power and clock distribution, place and route, timing closure, power and noise analysis, and physical verification.

Taking part inflows development.
Requirements:
What we need to see:

B.SC./ M.SC. in Electrical Engineering/Computer Engineering or equivalent work experience.

5+ years of experience in physical design.

Proven experience in RTL2GDS flows and methodologies.

Knowledge in physical design flows and methodologies (PNR, STA, physical verification).

Deep understanding of all aspects of Physical construction and Integration.

Strong background of Physical Design Verification methodology LVS/DRC.

Familiarity with physical design EDA tools (such as Synopsys, Cadence, etc.).

Great teammate.
This position is open to all candidates.
 
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נאספה מאתר אינטרנט
5 ימים
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
We are looking for best-in-class Physical Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.

What you'll be doing:

Physical design of blocks according to specifications under challenging constraints targeting for the best power, area, and performance.

Be exposed and work on a variety of challenging designs (including high cell count and HS blocks). Resolving complex timing and congestion problems.

Daily work involves all aspects of physical design chip development (RTL2GDS) - synthesis, power and clock distribution, place and route, timing closure, power and noise analysis, and physical verification.

Taking part inflows development.
Requirements:
What we need to see:
B.SC./ M.SC. in Electrical Engineering/Computer Engineering or equivalent work experience.

5+ years of experience in physical design.

Proven experience in RTL2GDS flows and methodologies.

Knowledge in physical design flows and methodologies (PNR, STA, physical verification).

Deep understanding of all aspects of Physical construction and Integration.

Strong background of Physical Design Verification methodology LVS/DRC.

Familiarity with physical design EDA tools (such as Synopsys, Cadence, etc.).

Great teammate.
This position is open to all candidates.
 
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נאספה מאתר אינטרנט
לפני 13 שעות
Location: More than one
Job Type: Full Time
We are looking for best-in-class Physical Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.

What you'll be doing:

Physical design of blocks according to specifications under challenging constraints targeting for the best power, area, and performance.

Be exposed and work on a variety of challenging designs (including high cell count and HS blocks). Resolving complex timing and congestion problems.

Daily work involves all aspects of physical design chip development (RTL2GDS) - synthesis, power and clock distribution, place and route, timing closure, power and noise analysis, and physical verification.

Taking part inflows development.
Requirements:
What we need to see:

B.SC./ M.SC. in Electrical Engineering/Computer Engineering or equivalent experience.

Knowledge in physical design flows and methodologies (PNR, STA, physical verification).

Deep understanding of all aspects of Physical construction and Integration.

Knowledge in Physical Design Verification methodology LVS/DRC.

Familiarity with physical design EDA tools (such as Synopsys, Cadence, etc.).

Great teammate.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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נאספה מאתר אינטרנט
1 ימים
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
We are looking for best-in-class Physical Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.

What you'll be doing:
Physical design of blocks according to specifications under challenging constraints targeting for the best power, area, and performance.
Be exposed and work on a variety of challenging designs (including high cell count and HS blocks). Resolving complex timing and congestion problems.
Daily work involves all aspects of physical design chip development (RTL2GDS) - synthesis, power and clock distribution, place and route, timing closure, power and noise analysis, and physical verification.
Taking part inflows development.
Requirements:
What we need to see:
B.SC./ M.SC. in Electrical Engineering/Computer Engineering or equivalent work experience.
8+ years of experience in physical design.
Proven experience in RTL2GDS flows and methodologies.
Knowledge in physical design flows and methodologies (PNR, STA, physical verification).
Deep understanding of all aspects of Physical construction and Integration.
Knowledge in Physical Design Verification methodology LVS/DRC.
Familiarity with physical design EDA tools (such as Synopsys, Cadence, etc.).
Great teammate.
This position is open to all candidates.
 
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נאספה מאתר אינטרנט
06/05/2024
חברה חסויה
Location: Tel Aviv-Yafo
Job Type: Full Time
We are looking for best-in-class Chip integration Manager to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.

What you'll be doing:

Implement Chip level design through collaboration with cross-functional teams (Functional Design, DFT, Design Verification, System Verification, STA, and Physical Design) .

Be exposed and work on a variety of functional and structural challenges. Including functional debug, getting ready for physical design, emulation, resolve design quality issues.

Daily work involves aspects of chip level design, including partitioning, CDC, RDC, trial synthesis, design quality checks.

Taking part in flows development and deployment.

build ,coach and lead a team of chip integration for the networking products of us.

Plan and track execution of chip integration, meet the schedule and quality requirements.
Requirements:
What we need to see:

B.SC./ M.SC. in Electrical Engineering/Computer Engineering.

10+ overall years of actual design experience in chip design.

5+ years of hardware/VLSI design leadership position.

Solid hands-on RTL design skills in System-Verilog.

Passion for quality and readiness to physical design, emulation, firmware and other customers.

Proficiency in at least one scripting languages like python, bash, tcl.

Great teammate.
This position is open to all candidates.
 
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נאספה מאתר אינטרנט
1 ימים
חברה חסויה
Job Type: Full Time
We are looking for best-in-class Chip Design Engineer to join our outstanding Networking Silicon engineering team. We are developing the industry's best high speed communication devices, delivering the highest throughput and lowest latency! Come and take a significant part in designing and verifying our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a huge impact in a technology-focused company.

What you will be doing:

Join accelerators IP group in Beer-Sheva/Tel-Aviv , working on RiscV platform unit.

design for chip blocks according to specifications under challenging constraints and with high orientation to power, area and performance.

Daily work might involve any or all aspects of chip development: Design, micro-arch.

Work closely with Firmware and other groups around the globe.
Requirements:
What we need to see:

University B.SC. in Electrical Engineering/Communication Engineering/Computer Engineering or equivalent experience.

2+ years experience in RTL design.

High Level of English.

Ways to stand out from the crowd:

Experienced in RTL design using VHDL/Verilog/SystemVerilog.

Experienced in CHI protocol or other cache coherence protocols.

4+ years experience in RTL design.

GPA of 85 and above.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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נאספה מאתר אינטרנט
08/05/2024
חברה חסויה
Location: Tel Aviv-Yafo
Job Type: Full Time
We are looking to hire a talented VLSI Physical Design engineer to join our VLSI group in Tel Aviv.
You will work alongside other talented engineers to develop our cutting-edge AI chips.
As part of our team you will be involved in all phases of physical design activities and you will take part in developing our special BE flows that enable us to tape out our technology-leading chips.
Responsibilities:
As part of our team, you will be involved in all phases of physical design activities, and you will take part in developing our special BE flows.
Requirements:
B.Sc./M.Sc. Electrical Engineering or Computer Engineering or related field from a leading university.
3+ years of experience as a VLSI physical design engineer.
Experience with advanced process nodes.
Deep understanding of VLSI Physical Design: Synthesis, Implementation, STA and PPA optimization methods.
Hands-on CAD tools, rtl2gds flows and signoff verification flows.
Advantages:
Experience in one or more of the following:
Experience in developing BE flows and scripts.
Experience with low power design.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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נאספה מאתר אינטרנט
לפני 13 שעות
Location: Tel Aviv-Yafo
Job Type: Full Time
We are looking to hire a Chip Design Verification Engineer to join NVIDIA Chip Design group. The work environment is versatile, educational, dynamic and challenging as our employees are currently working on innovative, next-generation networking devices at the forefront of technology in terms of performance and power efficiency. Daily work involves all aspects of chip development: Design, Micro- Architecture, Firmware, and Verification. Work with the best and become one of the best!

What you will be doing:

Work in a combined design and verification team which develops core units within the Networking silicon.

Build reference models, verify and simulate chip blocks/entities according to specifications and performance requirements.

Work closely with multiple teams within organizations such as Architecture, Micro- Architecture, FW and Post-Silicon validation.
Requirements:
What we need to see:

B.SC./ M.SC. in Computer Engineering /Electrical Engineering/Communication Engineering or equivalent experience.

4+ years of proven experience in RTL FrontEnd Asic Verification (Chip Design).

Deep and vast experience with System-Verilog UVM.

Ability to technically lead the verification of an IP block.

Familiarity with the different verification tools and methodologies.

Deep knowledge in HDL (Verilog/VHDL).

High Level English.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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נאספה מאתר אינטרנט
4 ימים
חברה חסויה
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
We are looking for an Asic Design Engineer to join the DFT design team and develop the next generation DFT technologies.

As a design engineer in the DFT design team, you will participate in definition and implementation of our DFT technologies in various projects. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting Switches, Nic and SoC product lines. We are working closely with a wide range of aspects - chip design, backend, verification and production testing. We are working on the most advanced technologies and sophisticated products, our DFT solutions are unique, innovative, and we are continuously improving and evolving the solutions to meet the challenging goals.

What you'll be doing:

In this position, you will be responsible for defining, coding and integrating sophisticated DFT components into various projects and using state-of-the-art technologies.

As a member of our DFT design team, you will participate in defining various DFT features and improvements, write micro-architecture documents, code design blocks, integrate them into various projects, bring your design to silicon tape-out and silicon testing and production.

Strong collaboration with architects, other design teams, verification, back-end and production testing to accomplish your tasks.
Requirements:
What we need to see:

B.Sc. in Electrical Engineering or Computer engineering or equivalent experience.

1+ years of practical experience.

Exposure to rtl implementation and coding.

Familiarity with verification tools.

Strong debugging, problem solving and analytical skills.

Strong communication and social skills are required.

Ability to work in a geographically diverse team environment.

Self motivated, independent and target oriented.

Ways to stand out from the crowd:

Prior Design or Verification experience.

Experience in developing sophisticated design blocks.

Integration of design elements to large cluster or full-chip.

Experience in working with back-end on area, power and timing closures.

Scripting ability.
This position is open to all candidates.
 
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נאספה מאתר אינטרנט
13/05/2024
חברה חסויה
Location: Tel Aviv-Yafo
Job Type: Full Time
Take part in the development of cutting-edge products within a disruptive system architecture. You will have the opportunity to work on the technologies that power the worlds largest cloud provider, in a dynamic, open, and fast-paced environment. AWS provides a highly reliable, scalable, low-cost infrastructure platform in the cloud, which powers hundreds of thousands of businesses in 190 countries around the world. As part of our Web Services, we are looking for talented engineers to help us develop a semiconductor platform based on a revolutionary architecture.

Looking for exceptional senior engineers to join the top-tier team that is developing the next generation semiconductor platform, based on a revolutionary architecture. Engineers will participate in design and verification activities, working on the next generation of our products.

You are invited to take part in developing, integrating and deploying cutting-edge technologies, starting with identification and definition of project requirements, architecture, feature development, and collaboration with the different groups.
Your design will be integrated into the nitro SoC, on millions of servers worldwide. This is an opportunity to have a large-scale impact.
As a VLSI engineer and a member of the Nitro project, you will have an impact over the device through its entire lifecycle, from the product definition stage to mass production. You will work in close collaboration with multiple groups, including Architecture, Software, Verification, Backend, and DFT.

Key job responsibilities:
*Full ownership of one or more IPs within the product:
-Micro-architecture.
-RTL coding and debug.
-Synthesis and timing closure.
-Sign-off.
* Supporting the Verification and Emulation teams: Test plan, Coverage review.
* Ensuring that the chip meets quality and reliability standards.
* Collaborating with cross-functional teams, including Product Definition, Verification, Software, and Physical design.
Requirements:
BASIC QUALIFICATIONS:
- BSc in Computer Engineering/Computer Science/Electrical Engineering.
- Excellent communication skills.
- Experience in chip design- an advantage.

PREFERRED QUALIFICATIONS:
- Verilog / System Verilog.
- Protocols: AXI, CHI, DDR, Networking, PCIe.
- Architecture of NOC, Coherent and non-Coherent fabrics.
- Experience with the entire SoC cycle Synthesis / STA / CDC / Lint.
- Experience with Design Automation.
- Higher degree in a related technical field is an advantage.
This position is open to all candidates.
 
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נאספה מאתר אינטרנט
06/05/2024
חברה חסויה
Location: Tel Aviv-Yafo
Job Type: Full Time
We are looking for talented and experienced Chip Design Verification Engineers to join our Networking R&D team, developing the industry's most complex communication devices, delivering the highest throughput at lowest power and lowest latency.
Responsibilities:
Definition, architecture, and development of IP-based block-level verification environments in SystemVerilog, integrated and reused in full-chip environments.
Building reference models, verification and simulation of SOC modules according to specifications, including performance calculations.
Working in a combined design and verification team which develops the SOC silicon core units.
Working closely with multiple teams within the organization, such as Architecture, Software, and Hardware.
Requirements:
Required Qualifications:
BSc/MSc in Electrical Engineering or Computer Engineering.
At least 3 years experience in functional verification. Preferably with SystemVerilog/VMM/UVM.
Strong debugging, problem solving and analytical skills.
Team player and fast learner
Advantage for experience with design, synthesis and post-silicon validation flows.
This position is open to all candidates.
 
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