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Required Experienced SoC Verification Engineer
Which team will you join?
Mobileye EyeC VLSI team - a group designing the chips for Radar systems for ADAS and autonomous cars. The group is responsible for all disciplines of VLSI development, including but not limited to Logic Design, Design Verification, Microarchitecture, Analog and circuit design and layout, Physical and structural design (backend), Product and test engineering.
What will your job look like:
You will take a central hands-on role in Design Verification.
Define Environment micro-Architect, Implement complex UVM environment, Build vPlan .
Execute coverage implementation.
Be part of external IP verification and Internal custom IP.
Be part of System definition and top-level activity.
Take part in Silicon bring-up.

A world leader in driver assistant systems and autonomous vehicles, is looking for talented silicon validation engineer for the range of its next generation SoCs supporting its radar systems
Our team is responsible for validating our radar SoCs, utilizing Pre-Silicon environments, as well as Post-Silicon platforms.
We are developing fully embedded C++ based validation environment for our needs.
You will be taking part in developing anything from environment and drivers through system modules such as file system, network stack, memory management and more, and up to complex automation tools in both C++ and python.
What will your job look like
Get a deep understanding of our chip hardware IP blocks, both analog and digital.
Develop our validation environment.
Develop, port, or add features to the product drivers using Technical Specs and existing modules.
Define, develop and execute various complex validation scenarios on the SoC.
Debug complex SoC problems using embedded GDB, JTAG probes, going down to signal level using scopes.
Take part in Next Gen SoC's Power-On's and platforms Bring-Up's.
Collaborate with other SW/Embedded and HW/Electrical Validation teams across the company.

Required Experienced RFIC/Analog CAD Engineer
The RFIC/Analog design groups in our Radar organization is responsible for developing the cutting edge Transceivers in mmW frequencies for the best Imaging Radar technology. The design process includes the entire process from specs to productization.
To support these challenging processes, we need a skilled CAD team that will work with the design teams on all design aspects and flows from design environment setups, through design tools implementations and support and to chip level verifications and validation enablement.
We're looking for an Experienced CAD or Design Automation Engineer to develop our RF/Analog design tools/flows and automation flows for the next-generation Imaging Radar chips.
What will your job look like:
Build and support RF/analog design environments
Implement, develop, and maintain design flows, tools and scripts.
Evaluate and explore new automation technologies and advocate for efficiency improvements
Evaluate multiple vendor solutions and guide execution, in the most optimal use, based on design needs
Effectively communicate and support a large number of designers, providing high-quality tools and flows, documentation, and presentations.

Were looking for a Experienced Physical Design Engineer to join the growing Physical Design Team, responsible for developing our next generation Imagining Radar SoC from definition to Tape-Out.
What will your job look like:
Hands-on physical design block owner from RTL to GDS with horizontal ownership.
Floorplan exploration and collaboration with front-end and architecture teams.
Synthesis exploration and final synthesis including: SDC definition, Scan insertion, Lint, LEC, UPF-LP & Spyglass verification.
Place & Route: from Synthesis to final layout and signoff verification on all tools and floors, with target to achieve best PPA.
STA: timing analysis, working with Sub System and Full Chip owners to manage block and top level constraints for synthesis, P&R and signoff.

Required Experienced Logic Design Engineer
The EyeC VLSI team specializes in designing advanced radar system chips for ADAS (Advanced Driver Assistance Systems) and autonomous vehicles. The group is responsible for all disciplines of VLSI development, including but not limited to Logic Design, Design Verification, Microarchitecture, Analog and circuit design and layout, Physical and structural design (backend), Product and test engineering.
What will your job look like:
Design ownership on major blocks/clusters from definition to implementation phase.
Participate in various ASIC activities and flow definition which includes CDC, DFT, Lint.
Design micro-architecture of custom blocks.

Our Autonomous Driving software group is looking for a Linux kernel developer who will be responsible for developing embedded SW products.
This is an exciting opportunity to work with highly talented engineers and be a part of product innovation on cutting edge technologies.
What will your job look like?
Researching, designing, and implementing new SW drivers and Operating System features, as well as, maintaining, and enhancing existing ones.
You will also be responsible for integrating the SW solutions in our Embedded automotive platforms including the necessary HW bring-up, debug and unit testing to achieve proper operation of the new SW and HW together.

We are looking for a Emulation Engineer to join the Radar VLSI team and drive the development of the next generation ASIC Sensors.
What will your job look like:
This role is all about making high-end Emulation environment base on new designs.
Building and integrating complex components, working with cross-functional engineering teams, and making systems that will change the way we drive.
This role requires an engineer who loves challenges and knows how to bring engineering excellence while considering complicated constraints.
You will work with members of a cross-functional talented,
You will lead the Emulation development for the VLSI team.
You will work closely with SW Engineers, Logic Engineers, Verification Engineers, and others.
You will serve as an expert matter for your domain, which has the full responsibility to drive & implement improvements and new ideas.

Required Experienced Embedded SW Application Layer Engineer
You will join the IMS core embedded development team, which is responsible for designing, building, and developing a Real-Time software application running within the unit.
You will have an opportunity to influence the design and implementation of our IMS products, which will improve the safety of thousands of vehicles worldwide.
What will your job look like:
Lead new features end-to-end from high and low-level design for a real-time complex system.
Participate in design review sessions.
Develop and integrate your designed modules in C++ and sometimes Python.
Improve existing modules.
Work with other team members.
Work closely with other development, product management, and support teams.

Power the Future with us! At SolarEdge (NASDAQ: SEDG), we're a global leader in smart energy technology, with over 3,000 employees, offices in 34 countries, and millions of installations worldwide. Our innovative solutions include solar inverters, battery storage, backup systems, EV charging, and AI-based energy management. We're committed to making clean, green energy the primary power source for homes, businesses, and beyond. With the growing demand for electricity, the need for smart, clean energy sources is constantly rising. SolarEdge offers amazing opportunities to develop your skills in a multidisciplinary environment, covering everything from research and development to production and customer supply. Work with talented colleagues, tackle exciting challenges, and help create a sustainable future in an industry that's always evolving and innovating. Join us and be part of a company that values creativity, agility, and impactful work. The IoE group specializes in making SolarEdge devices smarter and more connected. By joining us, you’ll have the chance to be involved from early stages of architecture & design planning, through development and testing phases up to integration within SolarEdge hardware products, infrastructures, and field deployment What you'll be doing in this position:
* Design, develop, test and maintain code for modern embedded Linux based IOT devices, both in low level and system level development.
* Participate in design reviews, architecture definition, test planning and integrations.
* Debug and troubleshoot software issues
* Keep up to date with the latest industry trends, IoT technologies, and development tools
* Work with adjacent teams such as software, integration, system, support and hardware.

Country:
Israel

City:
Herzliya

Required Experienced Physical Design Engineer
Which department will you join?
VLSI team - a group designing the EyeQ chips for ADAS and autonomous cars.
The group is responsible for all disciplines of VLSI development, including but not limited to Logic Design, Design Verification, Microarchitecture, Analog and circuit design and layout, Physical and structural design (backend), Product and test engineering.
Each Physical Design engineer has an end to end responsibility from definition, execution & full signoffs, working closely with design & architecture teams for constraints development, design review & RTL modifications to achieve converges
Were looking for a Backend Engineer to join the growing Physical Design Team, responsible for state of the art SoC design from definition to Tape-Out.
What will your job look like:
Hands-on physical design block owner from RTL to GDS.
Floorplan exploration with guidance and collaboration with front-end and architecture teams.
STA: work with FE and floor planner to manage block and top level constraints and 1st level of timing analysis.
Synthesis exploration and final synthesis netlist: Scan insertion @ synthesis, clean checks from Lint, UPF & Spyglass.
Place & Route: from Synthesis netlist to final layout and signoff verification with target to achieve best power performance and area.

Our Imaging Radar group develops innovative high-performance Imaging Radar solutions for ADAS and Autonomous Driving markets. We are looking for a Software Architect to join the development of state-of-the-art products in mmW frequencies.
You will be part of a winning team in a fast-paced startup-like environment, working on many different components of the entire system. You will have an opportunity to make an impact on the design and implementation of an innovative technology in its early stages.
What will your job look like:
Clearly define the requirements. Research the hardware, firmware, and software existing support and define the solution to match the requirements.
Resolve issues raised during implementation stages or feedback from customers.
Develop & communicate high-level designs and technical specifications
Define responsibilities of system components and interfaces
Identify risks and propose solutions in system designs
Define aspects of development; appropriate technology, workflow and standards
Evaluate existing system designs and propose improvements
Collaborate with other architects
Foster innovation through research, recommending the use of new technologies, processes or standards
Prepare, lead and participate in design reviews
Take part in all phases of the software development cycle.

We are looking for a senior DSP Algorithms Optimization Software Engineer to join the development of the next phase of a Software Defined Radar. Involves embedded code, ultra high speed real-time host application, and signal processing. You will be part of a winning team in a fast-paced startup-like environment, working on many different components of the entire system. You will have an opportunity to make an impact on the design and implementation of innovative technology in its early stages.
What will your job look like?
Design, build and optimize modules that compute very complex algorithms in real-time on embedded/DSP environment, with memory and bandwidth constraints
Work closely with algorithms teams to produce algorithms that better map to DSP environment.
Design, build and test a real-time application that manages and orchestrates several DSPs that run compute modules.
Plan memory arrangement, data transfers and pipelining of computation, to maximize DSP utilization.

Required Senior Software Engineer for Deep Learning Team
Join a team of deep learning specialists developing real-time solutions for cutting-edge automotive applications. We're looking for a hands-on software expert to lead all software-related aspects within the team from infrastructure and tooling to deployment and monitoring. Youll be embedded in a group of data scientists and work closely with DevOps and platform teams to bring deep learning models from concept to customer-ready solutions.
What will your job look like?
Lead the design, development, and maintenance of the teams deep learning software infrastructure.
Build and maintain tools for training, evaluation, deployment, and monitoring of DL models.
Develop and maintain CI/CD pipelines and improve automation across development workflows.
Collaborate with data scientists to streamline model experimentation and product ionization.
Coordinate with DevOps and platform teams to ensure scalability and integration into larger systems.
Develop internal visualization and monitoring tools to support interpretability and performance tracking.
Champion best practices in software development, including testing, code reviews, and maintainability.

Our AV (Autonomous Vehicle) Core Development group is looking for a Senior SW Engineer who will be responsible for developing Linux-based embedded products.
What will your job look like?
As part of our growing group, youll be leading the architecture, design & implementation of the next-generation AV systems
Build, Automate, and support critical infrastructure supporting applications used across multiple teams
You will develop SW drivers, OS features and tools for HW-SW systems, as well as optimizing existing ones.
You will be responsible for the implementation of SW solutions and supporting the system bring-up debug to accomplish a high-performance operational system.