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As a member of our Physical Design group, you will take an integral part in bringing large scale SoCs to life, helping us deliver the next generation of our ground-breaking products.
You will own the physical design cycle at the partition/IP/Chip levels, including netlist to GDS implementation and verification.
Are you ready to join some of the world's leading engineers and work with state of the art design flows and process technology?
If you possess the knowledge and experience in any of the physical design domains and practices with track record of tape-outs in sub-micron technology, come join our group!


As a member of our Physical Design team in this highly visible role, you will directly own implementation and verification of design partition(s) / IPs (netlist to delivery of our final GDS) for a highly complex SoC utilizing state of the art process technology.
* Implementation - Block level PnR, floor-planning, clock, power planning and distribution.
* Verification and Analysis - Static Timing closure using commercial tools, Physical Verification as well as Electrical/Power Analysis (EM / IR-Drop / Xtalk / noise ).

As a member of our Physical Design group, you will take an integral part in bringing large scale SoCs to life, helping us deliver the next generation of our ground-breaking products.
You will own the physical design cycle at the partition/IP/Chip levels, including netlist to GDS implementation and verification.
Are you ready to join some of the world's leading engineers and work with state of the art design flows and process technology?
If you possess the knowledge and experience in any of the physical design domains and practices with track record of tape-outs in sub-micron technology, come join our group!

As a member of our Physical Design team in this highly visible role, you will directly own implementation and verification of design partition(s) / IPs (netlist to delivery of our final GDS) for a highly complex SoC utilizing state of the art process technology.
* Implementation - Block level PnR, floor-planning, clock, power planning and distribution.
* Verification and Analysis - Static Timing closure using commercial tools, Physical Verification as well as Electrical/Power Analysis (EM / IR-Drop / Xtalk / noise )

This role is for a analog IP lead who will enable us to produce fully functional first silicon IP designs. The responsibilities include all phases of silicon development from definition to high quality production.


Specifying requirements and circuit architecture for analog blocks and sub-blocks of an IP, lab bring-up, characterization and debug, write specifications, test plans and characterization reports, work with chip design teams, system HW and SW design teams, ATE PE.

You will be responsible for:
Develop the circuit design of the IPs analog blocks following established design guidelines based on microarchitecture spec. Own all aspects of circuit design development.
Work and collaborate with other designers in the group to deliver results.
Work with FE & BE teams to ensure quality analog integration.
Work with power/performance and functional verification team to define and validate operation sequences.
Work with multi-disciplinary teams to make sure designs are delivered on time and with highest quality by incorporating proper checks at every stage of the design process.
Work with post silicon validation groups to ensure the design meets the power/performance targets.

we bring connectivity and intelligence to everyday products and packaging; things previously disconnected from the internet of things. our platform combines cloud services and iot pixels, computing elements that can power themselves by harvesting radiofrequency energy. this revolutionary mixture of cloud and semiconductor technology is used by some of the worlds largest brands, food, and pharmaceutical companies to change how we make, distribute, sell, use, and recycle products. our investors include amazon, verizon, ntt docomo, qualcomm, pepsico, and softbank vision fund 2. join us and help pave the way for the new iot.
our TEST & product team is responsible for keeping a target of a very aggressive cost limit of the production testing (wafer sort) while performing comprehensive testing of all the units functionalities. this involves:
development of the tests using the teradyne uf tester.
development of unique and advanced TEST hw.
monitoring and analyses the production data.
fa (failure analysis) when issues are discovered.
innovative dft (design for testability) with the design team.
responsibilities:
development of wafer sort TEST programs through a close relationship with the system team.
development of the future products dft and dfm through close collaboration with the design team.
improvement of the production data analysis and reports through close relationships with the cloud and data teams.
working with the external abroad TEST houses.
decision-making based on massive data analysis (pass criteria, improvements of the tests, identification of failures).
integrate new and innovative testing methods for a new technology sector.
specify and work with external vendors for the tester hw (probe-card and load-board).
specify and work with external vendors for the htol hw, TEST program.

the company was founded by the team that invented one of the technologies at the heart of 5g. their next vision was to develop an iot sticker, a computing element that can power itself by harvesting radio frequency energy, bringing connectivity and intelligence to everyday products and packaging, things previously disconnect from the iot. this revolutionary mixture of cloud and semiconductor technology is being used by some of the worlds largest consumer, retail, food and pharmaceutical companies to change the way we make, distribute, sell, use and recycle products.
our investors include softbank, amazon, alibaba, verizon, ntt docomo, qualcomm and pepsico.
we are looking for a talented and experienced engineer to take part in the verification efforts for the companys core product. this position involves building and maintaining a complex verification environment, and defining and executing a TEST plan. in this role, you will be leading all aspects of verification and will have a critical impact on the company's r&d path.

the company was founded by the team that invented one of the technologies at the heart of 5g. their next vision was to develop an iot sticker, a computing element that can power itself by harvesting radio frequency energy, bringing connectivity and intelligence to everyday products and packaging, things previously disconnect from the iot. this revolutionary mixture of cloud and semiconductor technology is being used by some of the worlds largest consumer, retail, food and pharmaceutical companies to change the way we make, distribute, sell, use and recycle products.
our investors include softbank, amazon, alibaba, verizon, ntt docomo, qualcomm and pepsico.
we are looking for a talented and experienced engineer to take part in the verification efforts for the companys core product. this position involves building and maintaining a complex verification environment, and defining and executing a TEST plan. in this role, you will be leading all aspects of verification and will have a critical impact on the company's r&d path.
responsibilities:
define and implement robust sv/uvm verification solutions, including TEST benches and methodologies, to drive efficient verification closure across block-level and full-chip designs, integrating mix-signals SOC simulation environment using verilog, matlab, hw/sw co-simulation and lab integration.
work closely with digital design, analog design, software, back-end, sw and system teams to understand the functional, power and performance goals of the product and ensure its quality.

For our site in Yokneam, we are looking for an Masters or PhD student to join the Innovation Group in a cutting-edge research role combining Physics, Artificial Intelligence, and Deep Learning. In this role, you will take part in the development of advanced sensing technologies inspired by cognitive mechanisms and brain-like information processing. If you are passionate about interdisciplinary innovation and eager to work at the intersection of Physics, AI, Signal Processing, and advanced sensing technologies - this opportunity is for you.


In this role you will Research and develop innovative sensing technologies based on advanced AI and Deep Learning approaches Design and implement algorithms for signal processing and intelligent data analysis Work on multidisciplinary projects combining Physics, Electro-Optics, Imaging Systems, and AI Collaborate with researchers and engineers in the development of next-generation technological solutions Take part in experimental work involving advanced hardware systems and sensing platforms
*Only relevant applications will be answered
#Yokneam Illit

We are looking for a highly experienced Quantum Control Systems Engineer (Application Validation Team) who embodies ambition and positivity. Someone who can passionately take ownership of their responsibilities, collaborating effectively with remote teams to not only meet but exceed our objectives and fulfill the evolving needs of our expanding customer base.
As a Quantum Control Systems Engineer on the Application Validation Team, you will be responsible for validating the software and hardware systems that drive quantum computing operations, ensuring that programs ranging from calibrations to error correction procedures perform as expected on all our quantum controller hardware. This includes designing, implementing, and testing scalable software and hardware frameworks across various qubit types, as well as developing tools that support the validation and execution of control software across different configurations and execution platforms.
Your role will also involve developing a robust software infrastructure that automates the validation process, integrates with real hardware systems, and supports continuous integration (CI) and continuous deployment (CD) pipelines.
This is an exciting opportunity to work at the forefront of quantum computing technology while ensuring the performance, reliability, and scalability of cutting-edge control systems.
Join us in this exciting journey to redefine the future of quantum computing.
Responsibilities:
Quantum Computing Routine Validation: Validate quantum computing programs on our quantum controllers, including calibration procedures, error correction routines, and other algorithms, ensuring they meet the required performance standards.
Scalable Routine Design: Design and implement scalable quantum routines in Qua and other quantum computing languages, optimizing various qubit types and quantum computing architectures.
Framework Development: Develop tools and frameworks that support validation, ensuring scalability and integration into our hardware and software development process.
Automated Testing and CI/CD Integration: Build and maintain automated testing systems, incorporating CI/CD processes to ensure seamless integration and validation of quantum control software on real hardware.
Data Analysis: Analyze measurement data from quantum controllers, using this data to improve implementations across the whole software stack.
Cross-Functional Collaboration: Work closely with quantum physicists, customers software engineers, and hardware engineers to troubleshoot issues, refine quantum routines, and ensure the overall system's performance.

Required Micro-Architect
Description:
A global leader in control systems for quantum computing, a field on the verge of exponential growth.
Our innovative hardware and software mark a groundbreaking approach in quantum computer control, scaling from individual qubits to expansive arrays of thousands.
At our core olies a passionate and ambitious team committed to reshaping the construction and operation of quantum computers.
Our work is fueled by a deep understanding of customer needs, driving us to deliver unparalleled solutions in this revolutionary field.
Join our cutting-edge hardware development team as Micro-Architect and play a key role in defining and implementing the micro-architecture of advanced digital logic components.
What You'll Do:
Define and develop micro-architecture for complex logic blocks - from concept through high-quality RTL implementation
Collaborate closely with architecture, verification, design and software design teams
Write clear and detailed design specifications and drive architectural trade-off analysis
Optimize for performance and area
Contribute to innovation, methodology improvements, and technical leadership within the team.

We are looking for an excellent design engineer to join our team and build our state-of-the-art control and orchestration platform. We are looking for a highly talented and motivated person, who is a real team player, and which can collaborate closely with engineers from other disciplines and quantum physicists
Responsibilities:
Designing a configurable and very low-latency challenging RTL
Bringing the state-of-the-art FPGA to its limits with regards to logic & timing optimization
End2end ownership of the entire coding process (Arch->uArch->Design->Implementation)
Learning system and SW requirements for proper implementation of HW-SW interface.

We are looking for a highly experienced Architecture Prototyping Engineer to join our R&D team and turn early-stage architectural concepts into working proof by creating or modifying any or many layers in a system (HW to Cloud).
You'll run bring-up on boards, set up lab benches, write FPGA RTL or embedded code, run simulations, and script measurement setups to take measurements and benchmarks.
You'll work across every electronics discipline, alongside algo, architects, logic designers, RF engineers, embedded developers, and physicists.
What You'll Do:
Build, bring up, and debug hardware prototype boards across analog, RF, power, digital, and mixed-signal domains.
Implement algorithms, write and simulate RTL, or embedded/Linux code
Lab measurements and benchmarks (scope, spectrum analyzer, network analyzer, power analysis)
Work directly with product and system architects to translate an early concept into a concrete, testable prototype.
Document findings.