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we have continuously reinvented ourselves over two decades. our invention of the gpu in 1999 sparked the growth of the pc gaming market, redefined modern computer graphics, and revolutionized parallel computing. more recently, gpu deep learning ignited modern ai - the next era of computing. we are a learning machine that constantly evolves by adapting to new opportunities that are hard to seek, that only we can pursue, and that matter to the world. this is our life's work, to amplify human creativity and intelligence. make the choice to join us today.
what you'll be doing:
working closely with product design engineers, you'll perform pcb layout of high speed/high-density value-conscious pcbs for all business units at the company (gpu desktop, notebook, automotive, professional, data center, deep learning, and ai), all using cadence pcb design tools.
focus will be on the complete development of cad layout from symbol creation, floor planning, and detailed component placement, constraints management, with a concept of topology and signal/trace integrity.
you will be responsible for the design releases required generation of artwork files, odb++, and electronic pcb documentation.
your designs will need to follow si constraints, emi/rfi control and fcc, ul and european regulations, ipc specifications and nrc regulations.

we are looking for a fuse configuration engineer to join the ic product organization and support fuse configuration across our networking products. in this hands-on engineering role, you will define, implement, validate, and maintain fuse configurations throughout the product lifecycle, from initial definition through mass production and end-of-life.
we are a leading supplier of innovative end-to-end infiniband and ethernet connectivity solutions and services. our portfolio includes adapter cards, switches, cables, and software that deliver industry-leading bandwidth, scalability, and data -center performance.
what you'll be doing:
develop, maintain, and validate fuse configuration files and parameters for multiple ic products.
translate technical requirements from chip design, architecture, q&r, icpe, TEST, and manufacturing teams into production-ready fuse configurations.
perform hands-on configuration updates, technical analysis, troubleshooting, and validation of fuse-related settings.
investigate configuration issues, identify root causes, and implement effective technical solutions.
review fuse change requests and support ccb activities by assessing technical impact, risks, and validation requirements.
develop and improve tools, scripts, checks, and engineering processes that increase configuration accuracy and efficiency.
integrate fuse configurations into product development, validation, TEST, and manufacturing flows while maintaining consistency, version control, and traceability.

we are seeking a physical Verification engineer to help ensure our asic and SOC designs are clean, correct, and ready for tapeout. this role focuses on physical verification quality across layout data, connectivity, and manufacturing rule compliance. you will work closely with physical design, custom layout, and methodology teams to run verification flows, debug issues, and improve signoff robustness. this is an excellent opportunity for an engineer who enjoys detailed analysis and high-impact signoff work.
what you'll be doing:
run and analyze physical verification checks such as drc, lvs, and other tapeout-quality signoff checks.
debug physical verification violations and partner with design teams to drive clean closure.
review layout, netlist, and runset interactions to identify root causes and recommend fixes.
support full-chip and block-level verification readiness across implementation milestones.
improve physical verification flow quality, turnaround time, and automation.
collaborate with methodology, cad, and foundry-facing teams on rule interpretation and signoff quality.

we are looking for a senior software system architect to join the team shaping networking management systems, aiops platforms, and applied ai solutions for ai cluster operations. you will work with customers, internal operational teams, fellow architects, product, and engineering teams to translate sophisticated operational challenges into clear requirements and scalable architectures, and carry these capabilities through implementation and delivery into products that deliver measurable value for customers.
we seek someone with deep technical judgment, a broad system perspective, and the persistence to move ideas into production-someone who asks sharp questions, catches consequential details, and builds alignment across teams.
what you'll be doing:
define architectures for management and intelligent automation capabilities spanning telemetry, observability, remediation, and operational automation.
engage customers, cluster operations teams, and compute authorities to understand their challenges and architect solutions that improve operational efficiency, reliability, and scalability.
partner with product and engineering to translate architectural recommendations into prioritized features and drive their inclusion in the plan of record (por), defining requirements, dependencies, and success criteria.
resolve system tradeoffs across hardware, firmware, software, and data platforms, with attention to scale, reliability, performance, and usability.
guide design decisions through implementation, with hands-on development of targeted proofs of concept (pocs) and technical investigations as needed to validate critical assumptions.
offer strategic direction and system -level leadership throughout teams, guiding engineering choices and promoting sophisticated, ai-centered operating practices.

as a physical layer firmware architecture engineer you will undertake an outstanding role to build the future of computer graphics, ai, and high-speed communication protocols. you will direct ambitious projects across teams and translate customer needs into flawless technical specifications for firmware architecture, system Embedded software, user interfaces, and high-level development.
what you will be doing:
lead projects across team, starting from processing requirements and definitions from customers and translating those into detailed technical specification for firmware architecture, system Embedded software, user interface and high-level design.
supervise the implementation of projects by team-leaders / developers / QA, participate in low level design reviews, QA TEST plans reviews, and keep track of changes and handle obstacles.
define the architecture of implementing physical layer standards into our asic devices.
involved in standard bodies activities and definition of next generation protocols.
define features for the phy layer, to exploit interoperability between different generations of communication.
be involved in product definition and the high-speed protocols that the networking devices will support.
work closely with multi-functional teams - design, backend, system, marketing, firmware, driver, etc. provide architecture definitions and as a result converge on key design decisions.
 
this role provides an opportunity to collaborate with top-tier talent and join a group committed to expanding the limits of what can be achieved. your efforts will have a direct impact on our capacity to compete and lead in the technology sector. join us and bring innovative solutions to life that shape the future of computing!

we are now looking for a senior hpc site reliability engineer to join our mission and continue improving our hpc infrastructure. a meaningful part of our strength is our unique and advanced development tools and environments that enable our incredible pace of innovation. we are looking for architects to help us evolve the way our private compute cloud is architected and optimized.
what you will be doing:
provide leadership in the design and implementation of our large-scale compute cloud that enables the world's top chip modelers, designers, and deep learning experts to invent groundbreaking technology.
identify architectural changes or completely innovative approaches in our cloud architecture and design.
help with strategic challenges we encounter, including: effective resource utilization in a heterogeneous compute environment, evolving our private/public cloud strategy, capacity modeling, and planning for multi-year growth and scaling across our global computing environment!

we pioneered accelerated computing to tackle challenges no one else can solve. our work in ai and digital twins is transforming the world's largest industries and profoundly impacting society. it's a unique legacy of innovation that's fueled by great technology-and amazing people. today, we're tapping into the unlimited potential of ai to define the next era of computing. doing what's never been done before takes vision, innovation, and the world's best talent. as a member of our team, you'll be immersed in a diverse, supportive environment where everyone is inspired to do their best work.
our networking is looking for a networking ai/hpc clusters infrastructure director to join ncs group. in this role, you will build, manage, and maintain the biggest cluster in our networking r&d to validate and TEST next-generation networking platform for ai technology and reference architecture that are being released to our customers. we are currently working on next generation vera rubin gpu platform ai clouds and factories with our xdr (800g infiniband) and spectrumx1600 next generation technology. come join the team and see how you can make a lasting impact on the world.
what you'll be doing:
lead a group that is responsible for building, managing, and maintaining networking engineering clusters composed of Linux, x86 and arm cpu, gpu, ethernet, and infiniband technologies.
work closely with the engineering and architecture teams to understand, plan and build new clusters for validating and testing new networking technology solutions.
drive the design and implementation of automatic systems to deploy, configure, maintain, and monitor these clusters.
drive the design and implementation of resource management systems for multiuser environments with different needs on these clusters.
manage r&d lab including inventory, power, space, and cooling.
build, expand, and mentor the team to address growing demands and requirements.
innovate! influence on our networking cluster management tools to shine in customer's view.

we are looking for an excellent firmware design team lead for our fw phy group. the person will closely work with our fw development, architecture, chip design teams and gain deep understanding of our networking products and technologies.
we have some of the most forward-thinking and hardworking people in the world working for us. are you a creative and autonomous engineer who loves a challenge? are you ready to become the engineer you always wanted to be? come and be part of the best chip design team in the industry!
what you'll be doing:
lead phy nic team
scrum planning and management
work closely with the architecture, hw, and sw design teams
define and plan release deliveries
debug and screen hw/fw/sw issues
take an active part in sw development phases
lead data -driven discussions about the product functionality and areas for improvement

we are looking for an excellent firmware design engineer for our fw phy group. the person will closely work with our fw development, architecture, chip design teams and gain deep understanding of our networking products and technologies.
we have some of the most forward-thinking and hardworking people in the world working for us. are you a creative and autonomous engineer who loves a challenge? are you ready to become the engineer you always wanted to be? come and be part of the best chip design team in the industry!
what you'll be doing:
enabling new serdes and optical technologies
implement fw functionality in signal processing units of our products
work closely with the architecture, hw, and sw design teams
define implement and maintain fw algorithm to control the silicon
develop and TEST fw on emulation & simulation environments during the pre-silicon phase
debug and screen hw/fw/sw issues
take an active part in silicon bring-up and sw development phases
lead data -driven discussions about the product functionality and areas for improvement
we are an equal opportunity employer and value diversity at our company. we do not discriminate on the basis of race, religion, color, national origin, gender, sexual orientation, age, marital status, veteran status, or disability status. we will ensure that individuals with disabilities are provided reasonable accommodation to participate in the job application or interview process, to perform essential job functions, and to receive other benefits and privileges of employment. please contact us to request accommodation.
#li-hybrid

we are looking for an firmware engineer to join the qos nic firmware team at the yokneam or tel-aviv site. you will take part in leading a major development team in our firmware group while taking part hands-on with development activities. the firmware team develops cutting edge networking features. we drive the data growth of the world's biggest companies. with talented engineers around the globe, the work environment is dynamic, meaningful, and fast-paced.
what you will be doing:
take part in research, design, and development of qos and fw algorithms, enhancing performance, reliability, and scalability.
provide hw-aware technical guidance for core fw development, prioritizing maintainability to ensure long-term code reliability and performance.
work closely with the architecture and different software design teams.
implement new features in the core of our nic firmware in pre and post silicon environment.
develop verification tests for advanced features in a highly complex and sophisticated firmware testing environment.
gain a deep understanding of system debug, networking technology and stacks, as well as the hw/fw/sw relationship.

we are looking for a best-in-class chip design Verification engineer to join our outstanding networking silicon engineering team, developing the industry's best high-speed communication devices and delivering the highest throughput and lowest latency! join us to play a key role in verifying our groundbreaking, innovative chips, and work in a meaningful, growing, highly professional environment where you can make a huge impact at a technology-focused company.
what you'll be doing:
work on a design and verification team developing the Front-End design for the switch silicon.
develop verification components and reference models, and verify and simulate chip blocks to specifications under challenging constraints, with a strong focus on power, area, and performance.
work closely with multiple teams within organizations such as architecture, micro- architecture and fw.

the hw pm team focuses on hw engineering development activities; managing multiple complex programs that support the development and ttm of new networking products for datacenter segment. the role of pm organization gives an individual the principal responsibility of overseeing and coordinating the program and rollout, the mission is to cover all stages of program development, including schedule planning, resource allocation, cohesive program execution, change management, and cycle closure with post-mortems.
what you'll be doing:
track milestones, manage resources, coordinate activities, assign tasks, and lead progress.
collaborate with cross-functional teams to address gaps and resolve issues.
run project meetings, share updates, coordinate objectives, review projects, generate reports, and escalate to management as needed.
identify threats, solve daily problems, and quickly implement mitigation strategies.
optimize scheduling, logistics, staffing, testing, communication, implementation, and execution.
assess risks, execute risk management plans, and ensure alignment with program milestones.
report project status to leadership regularly.

we are now looking for a chip design Verification engineer. we are seeking a Verification engineer to join the chip design methodologies team. the team is in charge of the verification methodologies, shared code, training, and embracing new technologies. one of our main goals is to make sure that the team works in an efficient manner, and provides high-quality deliveries. this position offers the opportunity to have real impact in a dynamic, technology-focused company.
what you'll be doing:
develop shared verification code and solutions to be widely used by the chip design team.
develop groundbreaking methodologies to create a flawless experience for Verification engineers to keep the focus on new problems.
collaborate with the design automation team to provide end-to-end solutions that combine verification, simulation, and automation.
get in touch with eda vendors to learn about cutting-edge tools/technology and apply them into our verification process.
understand the design, define the verification scope, develop the verification infrastructure and verify the correctness of the design.
collaborate with designers, verification specialists to accomplish your tasks.
develop training sessions.
we have some of the most forward-thinking and hardworking people in the world working for us. are you a creative and autonomous engineer who loves a challenge? come join our networking verification team and help us developing great products by raising the efficiency and the quality standard in our chip design team.

our networking division is looking for an excellent system Validation engineer! our networking division is a leading supplier of innovative end-to-end infiniband and ethernet connectivity solutions and services for servers and Storage. we offer market-leading solutions that include adapter cards, switches, cables, and software to support networking technologies. our products optimize data center performance and deliver industry-leading bandwidth and scalability. in addition, we serve a wide range of markets including high-performance computing, enterprise, data centers, cloud computing, Big Data, and web 2.0. we are constantly reinventing ourselves to stay ahead of the market and bring groundbreaking products and services to the industry.
what you'll be doing:
TEST verification and validation (both hw and sw).
maintain products' quality by improving TEST stability, coverage, design, and manufacturing process.
execute tests in different scopes such: regression, performance degradation, functional, and security; report the progress of testing and provide summary reports of the activity.
troubleshooting and streamlining/optimizing our testing procedures.
support production matters.