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We are looking for a creative and independent Senior Test Engineer. NVIDIA Networking unit has continuously reinvented itself over two decades. Our high-speed buses & network products are leading in the markets with innovative ways to improve speed and bandwidth from one generation to another. Today, NVIDIA is increasingly known as the place for getting End-to-End High-Speed Ethernet and InfiniBand Solutions We're looking to grow our company and build our teams with people who can join us at the forefront of technological advancement. We need a creative individual who will help transfer Network Silicon ICs products (Switch, NIC, SmartNic) from design engineering to mass production.

You will be exposed to various aspects of design, DFT and test of NVIDIA network IC products, and will be responsible for definition and development of tests from wafer level to final test of Network-ICs. In addition, your responsibilities will include working with overseas manufacturing teams to increase yields, test coverage and capacity, and reduce production costs. If you are passionate about enabling of the highest quality Network products that will change the world, we want to hear from you!

What you'll be doing:

IC Test definition & development.

Write, execute and debug FW code.

Manage Failure Analysis of field and production failures.

Provide DFT recommendations to the design teams.

Build expertise on production of network products.

We are now looking for an outstanding, creative & hardworking Firmware PHY/Algorithms Engineer to join our team. You will be responsible for firmware development, characterization & validation of state-of-the-art network devices. Work as part of a team with circuit design, algorithm, architects & HW design to ensure outstanding product development from concept to customer satisfaction. The qualified candidate should be comfortable working on different code environments and should demonstrate a passion for the creation, execution, and improvement of FW features to control mixed-signal circuits.

What youll be doing:

Implement FW functionality in signal processing units of our products.

Work closely with the architecture, HW, and SW design teams.

Define implement and maintain FW algorithm to control the Silicon.

Develop and test FW on emulation & simulation environments during the Pre-silicon phase.

Debug and screen HW/FW/SW issues.

Take an active part in silicon bring-up and SW development phases.

Lead data-driven discussions about the product functionality and areas for improvement.

We are looking for an outstanding Senior Technical instructor to join our Education Services team. In this role, you will provide advanced training on our data center, AI, and HPC platforms to customers and partners around the world. You will also contribute to developing training content, including presentation decks, hands-on manuals, and supporting materials. You will help engineers, architects, and operations teams build the skills needed to design, deploy, and operate our-powered AI data centers with confidence. As part of this, you will take part in the design of hands-on workshops and lab environments that simulate real systems and data center components, enabling learners to practice on realistic end-to-end scenarios.

What youll be doing:

Deliver in-person and remote technical training on our data center, AI, and HPC platforms for customers and partners, with up to 25% travel as needed.

Lead lab-based training sessions that walk learners through end-to-end workflows on our GPUs, DGX/GB200 systems, high-speed networking, and AI/HPC software stacks.

Collaborate with internal experts and content developers to build agendas, exercises, and demos that reflect real customer use cases and guidelines.

Serve as a subject-matter guide (SME) for a dedicated production team and learning developers. They build primary content. Partner with them on slideware, lab guides, videos, simulations, visual demos, and exercises. Ensure technical accuracy and realism.

Act as a technical ambassador for us in front of partner and customer audiences, answering inquiries, facilitating discussions, and guiding learners through fix and what-if scenarios.

Our Networking System Product Engineering group is looking for an excellent Software Engineer. The position requires an understanding of HW and SW to provide stable, efficient, smoothly running production tests, to enable high availability, while ensuring the quality of the products being shipped to customers. You will lead the development of our products and raise the bar of the software development quality in the group. We have crafted a team of extraordinary people, whose mission is to push the frontiers of what is possible today and define the platform of tomorrow.

What youll be doing: 

Design and develop automated tests for networking Switches and Adapters while working closely with the HW, ASIC, and SW Engineering teams to achieve a reliable test with high coverage.

Exposed to various aspects of design, DFT, and test of our next-generation network products.

Take a significant part in the definition and development of tests from the development level to the final test of Network-Systems.

Utilize test suites to find, debug and resolve problems with production process.

Ability to drive projects to full execution in time and working under pressure of schedule and multi project environment.

Supporting and fixing bugs of existing code. Supporting production lines for: deployments, patches, maintenance.

Test Verification and Validation (both HW and SW). Troubleshooting and streamlining/optimizing our testing procedures.

We are looking for best-in-class Physical Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.

What you'll be doing:

Physical design of blocks according to specifications under challenging constraints targeting for the best power, area, and performance.

Be exposed and work on a variety of challenging designs (including high cell count and HS blocks). Resolving complex timing and congestion problems.

Daily work involves all aspects of physical design chip development (RTL2GDS) - synthesis, power and clock distribution, place and route, timing closure, power and noise analysis, and physical verification.

Taking part inflows development.

Are you passionate about working on a team that is at the cutting and bleeding edge of hardware technology? Our Design-for-Test Engineering team works on groundbreaking innovations involving crafting creative solutions for DFT architecture, verification and post-silicon validation on some of the industry's most sophisticated semiconductor chips. We are looking for a DFT Engineer to join the ATPG team. The position includes taking part in development of the next generation DFT technologies and working closely with a wide range of our groups and aspects - chip design, backend, verification, and production testing.

Working on the most advanced technologies and complex products, our DFT solution are unique and innovative internal developments, and we are continuously improving and evolving the solution to meet the challenging goals. If you find groundbreaking Technologies, and next generation products interesting, then this is the team for you. Take opportunity to join our team for an exciting and educational environment, where every individual has significant contribution to our products and achievements!

What youll be doing:

You will be in charge of state of the art Design for Test/ATPG flows and implementation.

Take ATPG ownership on different DFT aspects of a project, Arch & planning, pattern generation, verification and post Silicon bring up and diagnosis.

Inventing and maintaining automation flows that provide the short test time to production.

Are you passionate about working on a team that is at the cutting and bleeding edge of hardware technology? Our Engineering team at NVIDIA works on groundbreaking innovations involving crafting creative solutions for DFT architecture, verification and post-silicon validation on some of the industry's most sophisticated semiconductor chips. We are looking for an experienced DFT Engineer to join the ATPG team. The position includes taking part in development of the next generation DFT technologies and working closely with a wide range of our groups and aspects - chip design, backend, verification, and production testing.



Working on the most advanced technologies and complex products, our DFT solution are unique and innovative internal developments, and we are continuously improving and evolving the solution to meet the challenging goals. If you find groundbreaking Technologies, and next generation products interesting, then this is the team for you. Take opportunity to join our team for an exciting and educational environment, where every individual has significant contribution to our products and achievements!

What youll be doing:

You will be in charge of state of the art Design for Test/ATPG flows and implementation.

Take full ATPG ownership end to end on a project, from Arch & planning to pattern generation, verification and post Silicon bring up and diagnosis.

Inventing and maintaining automation flows that provide the short test time to production.

We are looking for best-in-class Physical Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.

What you'll be doing:

Physical design of blocks according to specifications under challenging constraints targeting for the best power, area, and performance.

Be exposed and work on a variety of challenging designs (including high cell count and HS blocks). Resolving complex timing and congestion problems.

Daily work involves all aspects of physical design chip development (RTL2GDS) - synthesis, power and clock distribution, place and route, timing closure, power and noise analysis, and physical verification.

Taking part inflows development.

We are seeking a highly motivated High-Performance System Architect to join our team of experts and help shape the future of high-performance and ML / AI computing. Our next-generation NVL systems will be at the forefront of connecting and powering the world's most advanced compute clusters, which would be used to train the most advanced AI models such as GPT and DeepSeek. As a high-performance system architect, you will have the opportunity to work on some of the most cutting-edge technology and help to drive the innovation of our next generation networks that will be used by top researchers and engineers around the world.

What youll be doing:
Define the NVL system architecture end-to-end, by internal requirements and customers requirements through all product life cycles (post/pre silicon, on deployments).
Research various of solutions to enable the next large-scale-high-performance computing clusters. The position spans over various layers from algorithms, software, firmware, and HW.
Collaborate with cross-functional teams, including other architecture teams, logic design, system software, firmware, and research teams, to ensure the successful execution of the project.

We are seeking a dynamic and highly motivated Senior Software Manager to lead our software verification and automation for DOCA Networking SDK. We are looking for a candidate who can excel in a sophisticated, multidisciplinary environment, take ownership, and drive high-quality verification and automation processes. This position offers the opportunity to have a real impact on sophisticated, groundbreaking products, delivered by us and developed by our customers, empowering the most advanced data centers in the world. This role requires close collaboration with teams across various fields (SW, HW, QA) to elevate our product to the next level.

What you'll be doing:

Lead teams of software verification engineers, providing technical direction, career development, and performance mentorship.

Define and continuously refine our software testing methodology and processes.

Engage in a hands-on approach, actively participating in the design, coding, and debugging of verification tests and infrastructure alongside your team.

Lead the verification process, ensuring the functionality, stability, and performance of our DOCA networking SDK and the solutions on top of it.

Work closely with internal and external customers to understand system use cases.

Analyze coverage measures to identify verification gaps and provide data-driven insights into product development and release readiness.

We are looking for a phenomenal engineer to join the chip simulation team for networking chips and GPUs.

This simulation platform enables our engineers across firmware, SDK, and OS domains to develop and test their code without relying on physical hardware. If you're a creative, self-driven engineer passionate about systems-level design and eager to build technology that empowers internal teams, we want to hear from you.

What Youll Be Doing:
Develop and maintain simulation components for the physical layer of our high-performance networking chips (e.g., GPUs, switches, NVLink, Ethernet...).
Collaborate with chip architects, firmware developers, and hardware design teams to accurately simulate complex physical-layer behaviors in software.
Define, implement, and validate simulations of features such as link training, error injection, and transceiver behavior, making the simulation platform a go-to internal platform for development and debugging.
Extend and optimize the simulation infrastructure by contributing to CI pipelines, automated test frameworks, and regression tools.
Support internal users by debugging simulation flows and collaborating on bug resolution.
Take part in future-facing innovation by enabling simulation for next-generation devices and features.

We are looking for a System Test Engineer to join our System Test team, responsible for defining, developing and performing tests on a system level for our next-gen Wi-Fi products. Our team embraces modern development practices and tools to accelerate learning and delivery.

We seek a highly motivated Network Performance Exploration Engineer to join our team of experts and help shape the foundational infrastructure for the AI revolution. Our next-generation networking systems are at the forefront of connecting and powering the world's most advanced AI clusters. As a key member of our architecture team, you will be responsible for exploring and identifying critical network optimization opportunities across our entire hardware and software stack, analyzing how system-level changes impact application-level performance.

What Youll Be Doing:

Explore and validate end-to-end application performance, defining comprehensive test plans and critical metrics to identify optimization opportunities in both hardware and software.

Establish and maintain a comprehensive database of benchmark results, tracking performance across releases to drive data-informed decisions.

Conduct deep-dive analysis into communication libraries (like NCCL), system software, and hardware configurations to investigate performance characteristics, validate architectural theories, and identify bottlenecks.

Provide critical performance data to correlate and enhance simulation tools, ensuring our models accurately predict real-world hardware behavior.

Analyze application-level traffic patterns (e.g., LLMs) on our advanced networking fabrics to identify hardware and software optimization opportunities and tune system parameters.

Lead Proof-of-Concept (POC) projects to prototype and evaluate potential hardware and software optimizations and their impact on application performance.

We are seeking a dedicated NVLink Firmware Architect to join our esteemed engineering team in Israel. This is an outstanding opportunity to impact the future of data centers and networking technology. As a key member of our team, you will play a crucial role in developing and crafting our NVLink firmware stack and GPU scale-up networking. Our collaborative environment, combined with ambitious goals, will enable you to collaborate closely with ASIC and software architecture/design teams to pioneer innovative solutions.

What you'll be doing:

Lead design of new networking applications to craft new networking applications that address sophisticated problems in groundbreaking ways.

Identifying and evaluating new technologies, innovations, and partner relationships to align with our strategic technology roadmap and enhance business value.

Defining the architecture of NVLink firmware running on GPUs and switches, ensuring flawless integration and performance.

Helping to determine and implement the strategic vision for our networking alongside adjacent software and hardware architects.

We are looking for best-in-class Physical Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.

What you'll be doing:

Physical design of blocks according to specifications under challenging constraints targeting for the best power, area, and performance.

Be exposed and work on a variety of challenging designs (including high cell count and HS blocks). Resolving complex timing and congestion problems.

Daily work involves all aspects of physical design chip development (RTL2GDS) - synthesis, power and clock distribution, place and route, timing closure, power and noise analysis, and physical verification.

Taking part inflows development.