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we are seeking a hands-on engineer to join our Networking Insights team and generate the data-driven hardware insights that shape the backbone of the AI revolution. This position is for engineers who are motivated to explore beyond typical protocols, delving into the micro-architecture of our brand new switches to address intricate hardware challenges. You will investigate and resolve elusive hardware and software challenges at their root cause, ensuring our technology operates with maximum performance and reliability in the world's most demanding data centers.
What you'll be doing:
Investigate complex performance issues seen in real-world AI data centers.
Design and build targeted test cases from scratch to replicate and isolate hardware and software bottlenecks.
Write and debug diagnostic scripts (Python) to drive traffic generators (e.g., IXIA) and manipulate test environments.
Analyse test data to uncover the root cause of hardware-level behaviours, collaborating with architects to understand micro-architectural impacts.
Develop repeatable tests that will become part of our broader automation framework.

our company, a leader in high-performance computing and machine learning, seeks a Senior HW program manager with technical skills for the Networking HW team. This role involves program management of our Network adapters and our Switch products, contributing to next-gen data centers.
The HW Program management team within our company's Networking Business division is looking for an experienced Program Manager to join its team. The Program Manager will oversee the planning, execution, and end-to-end tracking of HW activities across various professional functions and organizations. This role will drive planning processes and drive execution of the programs, and will work with executives, managers and engineers within the organization and with all the interfacing organizations, while aligning with corporates Roadmap, priorities and targets.
What you'll be doing:
Build, manage, and implement comprehensive long-term programs, including setting timelines, allocating resources, and setting up progress milestones.
Work with project managers and engineers to ensure consistency with company strategy, commitments, and goals.
Facilitate teamwork and cooperation among team leaders to ensure accountability on their tasks and deadlines.
Capable of foreseeing and handling risks associated with constant change through proper prioritization. Come up with innovative solutions to difficult problems, and co-develop solutions and mitigation strategies.

our company has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. Its a unique legacy of innovation thats fueled by great technologyand amazing people. Today, were tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing whats never been done before takes vision, innovation, and the worlds best talent. As a worker, youll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. Come join the team and see how you can make a lasting impact on the world.
At our company Networking, we are driven by innovation and excellence. Our team in Israel is looking for a dedicated Chiplet STA owner to join us in defining the next era of AI's networking. This is an outstanding opportunity to work with innovative technology and collaborate with some of the most experienced minds in the industry. If you are ambitious, passionate about flawless design, and eager to make a lasting impact, this role is perfect for you!
What you'll be doing:
Perform advanced Static Timing Analysis (STA) for HSIO at chiplet and FC level.
Running Prime Time, review and debug timing paths, understand constraints, sdc generation, timing ecos generation.
Identify convergence risks and work closely with physical design, RTL and DFT teams, ensuring convergence throughout various project stages.
Responsible for a full timing closer and quality approval from pre-layout STA model through signoff.