לוח משרות דרושים הייטק חומרה

Requirements:
5 years of SoC System Verilog validation experience.
Hands on experience using UVM to verify ASICs.
Advanced knowledge of System Verilog test-bench language.
Experience with verification methodologies and tools such as simulators, waveform viewers, build/run automation, coverage collection, gate level simulations, formal validation.
Knowledge and experience in the following is advantage:
Experience with the full digital design verification cycle -- from spec through bring-up and prototyping and debug systems.
Experience with performance, power validation, digital design (RTL), and formal verification.
Experience with SOC design in DDR, USB, MIPI, ARM subsystem, AMBA, AXI, AHB, DSP, and ARC CPU
Experience with mixed signal verification methodology for IPs such as PHYs, A2D, PLLs etc.
Experience with software and C/C++ for reference model development. Developed drivers for ARM SoC IPs.

Requirements:
BSc. in Electrical Engineering (from known university)
Minimum 2 years of experience Must!
Knowledge and experience in the following is advantage:
Floor plan and Place & Route
Timing Closure & debug, STA
Clock Tree Synthesis
Power Grid Analysis
LVS/DRC debug
Experience with DFT - Advantage
Experience with ICC Advantage

Requirements:
3+ years of experience as a Backend Engineer (Java Spring is an advantage)
Experience working with Relational and No-SQL databases (e.g. Datastore, MongoDB, etc)
Experience with designing and architecting large and scalable cloud-based applications
Experience working with Microservice architecture and event-based systems
Outstanding drive and communication skills
Organizational and time-management skills


Bonus points for

Experience with Spring Framework
Experience with cloud platforms (e.g., Azure, GCP)
Experienced with Docker, Helm, Kubernetes technologies
BSc. in Computer Science or equivalent

Requirements:
BSC in Electronics Engineering with 3-4 years of experience or Practical Engineering diploma with more than 8 years of experience in multidisciplinary systems
Electronics schematics reading and analysis capabilities MUST
Proven familiarity with lab test equipment -MUST
Proven hands-on capabilities with electronics assembly, calibration and testing MUST
Ability to proactively solve and document board & system level failures.
Multitasking capabilities coordination capabilities to manage several resources.
Independent and self-learner ability to learn wide and in-depth technical information.
Interpersonal skills
Understanding the system wise of the multidisciplinary system as well as detailed design.

Requirements:
BSc in Computer Science - must
At least 8 years of proven experience as hands-on Java backend developer with a good knowledge of its ecosystems and a solid understanding of OOP - must
Experience with Linux administration, scripting, and shell must
Familiarity with software development flow and CI/CD concepts (Consul/Nomad/Evony) an advantage
Familiarity with Microservice architecture, dockers containers, and Kubernetes an advantage
Experience with multi-threaded application, knowledge of concurrency patterns
Experience with Cloud service providers such AWS/GCP/Azure
Familiarity with version control repository managers tools such Git and open source community such GitHub/GitLab

Requirements:
5+ years experience with the development or testing of multi-disciplinary products
Knowledge and experience in Python
Good documentation skills and ability to communicate effectively at all levels of the organization
Experience in a thorough understanding of the requirements and writing test designs for complete coverage of the requirements
Understanding of CI/CD tools, preferable Jenkins
Understanding of software Verification & Validation or QA methodologies, tools, and processes
Good organizational skills and strong written and verbal communication
Experience with PyTest framework
Experience with the automotive industry- advantage
Preferred, B.A. / B.Sc. in Computer Science or Electrical Engineering

Requirements:
REQIRED
BSC, MS or PHD in Electrical Engineering, Computer Engineering, or Computer Science.
Solid understanding of general purpose CPU micro-architecture, including load store unit, caches, cache coherence, memory hierarchy, multi-processor, multi-thread processor systems, memory technologies and memory controllers.
Ability to make trade-offs between power, performance and area to meet the requirements of the product.
Hand-on experience with high power-efficient CPU on chip interconnect, coherent fabric, memory controllers.
At least 8 years experience in architecture in one of the leading CPU companies
Experience modeling microprocessors using higher-level languages, like C/C++.
DESIRED
Co-operate and communicate well with the architecture and design teams.
Interact with the Product System architects, software teams and ASIC chip teams to define the overall architecture of the Processor ASIC including memory hierarchy.
Travel to Beijing and ShenZhen sites may be required.
Good presentation and internal customer interaction skills.

Requirements:
MINIMAL REQUIREMENTS
At least 15 years of hands on experience as RTL/Architect of complicated SoCs
Solid understanding in SoC parts (DDR, L3 cache, GPU .)
Proven experience of owning whole SoC units/architecture
Good understanding of SW (e.g. C, C++)
Ability to make tradeoffs between power size and performance
REQUIREMENTS
At least 15 years of hands on experience as RTL/Architect of complicated SoCs
Excellent Verbal and written communication skills
Co-operate and communicate well with different groups from different countries.
Advantage:
Familiar with Core Architecture
Familiar with CPU SoC Architecture
Familiar with Mobile devices
Familiarity with the ARM architecture and the micro-architecture for current ARM CPU cores.
Experience in modelling SoC using high-level language.

Requirements:
Bachelors degree (or equivalent) in EE
At least 5 years of experience as a system engineer. Proven record of system engineering of multi-disciplinary product including RF and antennas domain.
Deep understanding of Tx and Rx RF channels and DSP
MATLAB/Python hands-on knowledge
Advantage:
Background and experience in communication systems and algorithms advantage
Experience or knowledge in chip design and mixed-signal SOCs architecture advantage
Experience in a system full life cycle from product requirements to customer delivery
Lab experience system / module / component level advantage
Personal skills
Ability to work independently and as a team player
Creative, innovative, willing to learn and share knowledge and ideas
Languages High level of verbal writing in English is required

Requirements:
REQUIERD
BSC, MS or PHD in Electrical Engineering, Computer Engineering, or Computer Science.
Good understanding of general purpose CPU micro-architecture, including knowledge of areas such as processor pipelines, load store units, caches, cache coherence, memory hierarchy, multi-processor, multi-thread processor systems, memory controller.
Good understanding of high speed digital VLSI design flow and methodology
Understanding of trade-offs between power, performance and area appropriately to meet the requirements of the product.
At least 6 years of experience in one of the leading CPU companies
Familiarity with the ARM\IA architecture and the micro-architecture for current ARM\IA CPU cores.
Software development (C, assembly).
Hands on experience as a Front end ASIC designer
DESIRED
Co-operate and communicate well with the architecture team and other members of the development.
Excellent verbal and written communication skills.
Travel to Beijing and ShenZhen sites may be required.
Good presentation and internal customer interaction skills.

Requirements:
B.Sc. in Electrical Engineering (or equivalent academic degree)
10+ years in VLSI design (less can be accepted in case of a unique candidate).
At least 5 years as Architect.
Ability to make trade-offs between power, performance, and area appropriately to meet the requirements of the product.
Experience with AI - Mandatory.
Advantages:
Experience with High level design languages like System-c an advantage.
Hardware accelerator development.

Requirements:
MINIMAL REQUIREMENTS
Solid understanding of general purpose CPU micro-architecture, including knowledge of areas such as processor pipelines, load store unit, caches, cache coherence, memory hierarchy, multi-processor, multi-thread processor systems.
Good understanding of CPU design methodology
Excellent verbal and written communication skills.
CPU related Experience in one of the leading CPU companies or in academia.
Willing to relocate to China for extended period.
REQUIREMENTS
BSC, MS or PHD in Electrical Engineering, Computer Engineering, or Computer Science.
Familiarity with the ARM architecture and the micro-architecture for current ARM CPU cores.
Experience modeling microprocessors using higher-level languages, like C/C++.

Requirements:
B.Sc/M. Sc in Electrical/Computer Engineering or Computer Science, or related discipline.
4+ years of experience in low-level embedded programming and firmware architecture Mandatory
4+ years of Experience in wired/wireless physical communication layer Mandatory.
4+ years of Experience in C programming language Mandatory
2+ years of Experience in integration with HW blocks Mandatory
Experience with DSP processors architecture Advantage
Basic knowledge of Matlab and Python Advantage
Knowledge in communication protocols: Cellular, Wi-Fi, Satellite Advantage
Experience in RF lab work and testing equipment (Spectrum Analyzer, Signal Generator, etc.) Advantage.
Effective teamwork and collaboration skills.

Requirements:
MINIMAL REQUIREMENTS
Solid understanding of general purpose CPU micro-architecture, including knowledge of areas such as processor pipelines, load store unit, caches, cache coherence, memory hierarchy, multi-processor, multi-thread processor systems.
Ability to make trade-offs between power, performance and area appropriately to meet the requirements of the product.
Hand-on experience with high power-efficient CPU core successfully.
Understanding of CPU instruction set architecture and assembly language.
At least 20 years of experience in one of the leading CPU companies
REQUIREMENTS
BSC, MS or PHD in Electrical Engineering, Computer Engineering, or Computer Science.
Familiarity with the ARM architecture and the micro-architecture for current ARM CPU cores.
Software development (C, assembly).
Experience modeling microprocessors using higher-level languages, like C/C++.
Excellent verbal and written communication skills.
QUALIFICATIONS
Co-operate and communicate well with the architecture team and other members of development team.
Interact with the Product System architects, software teams and ASIC chip teams to define the overall architecture of the Processor ASIC including memory hierarchy.
Travel to Beijing and ShenZhen sites may be required.
Good presentation and internal customer interaction skills.

Requirements:
MINIMAL REQUIREMENTS:
Solid understanding of general purpose CPU micro-architecture, including knowledge of areas such as processor pipelines, load store unit, caches, cache coherence, memory hierarchy, multi-processor, multi-thread processor systems.
Ability to make trade-offs between power, performance and area appropriately to meet the requirements of the product.
Hand-on experience with high power-efficient CPU core successfully.
Understanding of CPU instruction set architecture and assembly language.
Ownership of the overall verification methodology for a CPU project.
REQUIREMENTS
MS or PHD in Electrical Engineering, Computer Engineering, or Computer Science.
Minimum of 10 years of proven design experience in complex processor projects.
Familiarity with the ARM architecture and the micro-architecture for current ARM CPU cores.
Software development (C, assembly).
Experience modeling microprocessors using higher-level languages, like C/C++.
Excellent verbal and written communication skills.
Co-operate and communicate well with the architecture team and other members of development team.
Interact with the Product System architects, software teams and ASIC chip teams to define the overall architecture of the Processor ASIC including memory hierarchy.
Travel to US, Beijing and ShenZhen sites may be required.
Good presentation and internal customer interaction skills.