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we are a global leader in quantum computing control systems. Through our pioneering hardware and software solutions based on instruction-based quantum control, we're revolutionizing how quantum computers are built and controlled. As we stand at the forefront of exponential growth in quantum computing, we're assembling an elite team that actively shapes the evolution of quantum technologies.
We are seeking an exceptional architect to join our Architecture team and help shape the future of quantum computing. As quantum computers near production scale, were uniquely positioned to define the system and software architecture that will power the next generation of computing.
In this role, you will be responsible for end-to-end definition of new capabilities, from the quantum programming languages through the compilation processes to the pulse processor. This position demands deep expertise in software architecture across all levels, an ability to work closely with logic design teams, a strong ability to learn and adapt, and a passion for becoming an expert in quantum computing. Youll collaborate closely with Product, R&D, and Research teams to transform ideas into technical reality.
Responsibilities
Define system-level architecture and features, and provide comprehensive specifications for R&D implementation
Design quantum control programming languages and representations optimized for our unique hardware and application requirements
Define architecture in our unique pulse processor end-to-end, from language and software interface to logic capabilities
Collaborate cross-functionally across Software, Compiler, Logic Design, and Quantum Software teams-from concept to production
Work hand-in-hand with Product and Research teams to translate high-level requirements into concrete architecture plans
Development of Proof-of-Concepts for new software capabilities and features.

we are looking for a AI architect/ microarchitecture.
Job Description:
Define the AI core architecture that will shape the next generation of AI chips, leading the global competition in AI computing power. As a key contributor to the competitiveness of AI core architecture, we drive chip architecture innovation starting from algorithm evolution, building a full-stack closed-loop capability of "algorithm-architecture-circuit-system," and creating a globally leading, independently controllable AI accelerator core to support the Ascend AI ecosystem and the implementation of large model strategies.
Responsibilities:
Lead next generation inference solution optimized for power, performance and area. Considering scalable solution for large scale systems with many resources. Covering efficient data delivery and workload map.

we are looking for a Computing Network & System Architecture Group Leader
In this role, you will be responsible for several teams of architects, engineers and software developers, all working together to conduct state-of-the-art R&D in system and network architecture.
As the group lead, you will guide and mentor the individual team leads, and also conduct hands-on work leading architecture, technology innovation and technical planning and of high-performance computing cluster network, which oriented at AI, HPC, and big data.

we are looking for a Senior Core Power Management Architect.
Job Description:
Will drive the implementation of autonomous core power management for best performance and power efficacy.
The Power expert will take charge in understanding business-units (customers) needs, and translate them to CPU core solution.
This expert will utilize his power management experience to deliver world-class power efficient HW-SW solutions for Huawei products.

we are seeking a Lead System Architect to join our system architecture team and help define the next generation of our AI-SuperNIC scale-out chip.
AI scale-out communication is a critical element in modern data centers, and emerging standards such as Ultra Ethernet aim to address this challenge. This role focuses on defining a high-performance Smart NIC architecture optimized for GPU-centric AI workloads, with emphasis on low-latency, high-bandwidth data movement.
You will work across hardware and software domains, collaborating closely with AI, platform, driver, and VLSI teams to design a competitive scale-out networking solution.
Responsibilities:
Define product requirements and architecture for next-generation ultra low-latency AI-SuperNIC
Design end-to-end data paths across NIC, host, and GPU memory, with focus on GPU connectivity (PCIe, NVLink, CXL)
Lead adoption of emerging standards such as UEC and UALink, while maintaining compatibility with existing ecosystems
Establish architecture guidelines and partitioning across hardware, firmware, and software
Drive performance modeling, analysis, and system-level optimization for AI workloads
Optimize scale-out communication patterns (e.g., collectives) for GenAI training and inference
Collaborate with software teams on drivers, runtimes, and integration with AI frameworks
Work with R&D, CTO, and peer architects on system definition and trade-offs
Engage with customers and partners to shape system requirements and use cases

As a Sr. Principal Architect, you will serve as the technical cornerstone for a high-impact engineering group that encompasses both our Email Security and Broker Platform teams. This is a unique dual-scope role: you will oversee the architecture of a brand-new, cutting-edge email security solution while simultaneously guiding the evolution of our high-scale Broker Platform - the backbone that enables seamless data integration and communication across the entire Cortex ecosystem. You will be responsible for the architectural synergy between multiple domains, ensuring that our security detection engines and our data orchestration layers are built for massive scale (billions of events per second), high availability, and ironclad security. Operating out of our TLV office, you will drive the long-term technical roadmap, navigate complex "cross-team" dependencies, and instill a culture of architectural rigor. You aren't just building a product; you are building the foundation upon which the worlds leading cyber-security products integrate and operate.
Key Responsibilities
Align the architectural goals of the Email Security and Broker Platform teams, ensuring unified standards for data ingestion, processing, and threat detection.
Take ownership of the Broker Platforms scalability, ensuring it can support the explosive growth and diverse data requirements of the Cortex suite.
Drive the "Zero to One" architecture for new email security offerings, ensuring they leverage the full power of our platform infrastructure.
Lead technical "RFC" (Request for Comments) reviews, making critical decisions on tech stacks, data modeling, and distributed system patterns.
Act as the bridge between engineering, product, and site reliability (SRE) to ensure that architectural designs translate into operational excellence.