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We are seeking a Physical Design Engineer.
Meet the Team:
The Physical Design team within Silicon One owns backend methodology and flow development from RTL to GDS. The team plays a critical role in developing high-quality VLSI designs for some of our most advanced silicon products.
We work with the latest silicon technologies and processes to build large-scale, complex devices that push the boundaries of feasibility. You will collaborate with experienced engineers across architecture, design, verification, and implementation to deliver high-performance silicon.
Your Impact:
You will be part of the Silicon One team, which is at the heart of our software and ASIC design efforts. As a Physical Design Engineer, you will contribute to backend implementation work across key stages of chip design, helping move complex designs from RTL toward GDS.
You will work on physical synthesis, place and route, optimization, timing closure, and floor planning activities. Success in this role means delivering high-quality implementation results, learning quickly from senior engineers, and helping improve the flow and methodology used by the team.
Contribute to physical synthesis, place and route, optimization, and timing closure for complex VLSI designs.
Support design floor planning and implementation planning in collaboration with senior physical design engineers.
Analyze timing, congestion, power, area, and design-rule issues and help drive them toward closure.
Work with physical design verification flows, including LVS and DRC, to support clean implementation handoff.
Partner with cross-functional teams to debug implementation issues and improve backend flow quality.

We are seeking a highly motivated and experienced Senior Software Engineer for a position focused on developing innovative network device monitoring and visualization solution.
Meet the Team:
This position is part of our Silicon One organization, based in Israel. Silicon One is the foundation of our industry-leading networking hardware products, pushing the boundaries of technology and driving the next generation of high-performance, scalable solutions.
Your Impact:
Design and develop visualization capabilities within our SDK environment
Lead the development of a brand-new comprehensive self-monitoring system for network devices from the ground up
Implement a comprehensive model for capturing and managing network state information
Drive cross-team collaboration and technical strategy
Work closely with senior technical leadership
Create and refine technical requirements and system designs
Build new systems and frameworks from the ground up.

Performance Architect
What You'll Do:
Join our Silicon One architecture team, the core of silicon development. Our architects manage all aspects of system chip development and provide specifications to various development teams. In this role you will:
Define the features and specifications of future devices.
Utilize a data-driven approach to model and analyze networks of tomorrow, providing optimal solutions for our customers.
Model, analyze, and present simulation results for cutting-edge networking solutions across various use cases.
Apply strong networking research skills and a robust theoretical background to your work.
Who You'll Work With
You will be part of our Silicon One architecture team, which is central to our ASIC group.
Our team, which operates with a startup mentality within a stable and leading corporation, drives the development of next-generation networking devices.
Our design center is unique, hosting all silicon hardware and software development disciplines at one site. We are revolutionizing the industry by building a new internet for AI networks and the 5G era, with a unified, programmable silicon architecture that will underpin all of our future routing and switching products.
Our devices are engineered to be adaptable across service providers and web-scale markets, designed for both fixed and modular platforms. They deliver high speed without sacrificing programmability, buffering, power efficiency, scale, or feature flexibility. We are set to be a transformative technology for decades to come.

Required C++ Software Engineer
Job Description:
We are excited to announce that the Silicon One team is undergoing rapid growth, and we are looking for a C++ Software Developer.
Meet the Team
Join the Silicon One team developing a unified silicon architecture for web-scale and service provider networks. Our silicon team provides an outstanding, unique experience for ASIC and Software engineers by combining the resources offered by a sizable multi-geography silicon organization with the startup culture and breadth of growth opportunities that working in a smaller team can provide.
Your Impact
Craft and develop software driving the world's most complex infrastructures
Gain intimate knowledge of world-class silicon and programming models
Work with architecture and design teams to define the next generation of ASIC products being developed.

Required Software Engineer Graduate - Israel- ETR
Job Description
Please note this posting is to advertise potential job opportunities. This exact role may not be open today but could open in the near future. When you apply, a representative may contact you directly if a relevant position opens.
Location: Caesarea or Tel-Aviv, Israel
Start Date: As soon as possible
Application will be received until further notice
What You'll Do:
You'll develop Core Software technologies at the heart of tomorrow's leading infrastructure solutions, tackling the entire range of challenges from user-facing API-s, through high-level algorithm
The silicon One team is leading the silicon development. We use the latest silicon technologies to build the largest scale and most complex devices at the edge of feasibility.
If you want to work with amazing people, developing the first iteration of world-class products, join us!
Who You'll Work With:
You'll be part of the Silicon One team - an amazing group driving our game changing next generation network devices. Our unique team works in a startup atmosphere inside a stable and leading corporate environment on the outside.
We are transforming the industry and building a new internet for the 5G era, providing a unified, programmable silicon architecture that is the foundation of all our future routing products.
Our design center is unique - hosting all silicon HW and SW development disciplines inside one site.
Our devices are designed to be universally adaptable across service providers and web-scale markets, designed for fixed and modular platforms. Our devices deliver high speed without sacrificing programmability, buffering, power efficiency, scale or feature flexibility.
We are a revolutionary, ground-breaking technology for our customers and end users for decades to come! The Internet now has a new faster, better, safer engine!

Required Junior Hardware Engineer - Signal & Power Integrity - Israel - ETR
Location:Caesarea, Israel
Job Description
Please note this posting is to advertise potential job opportunities. This exact role may not be open today but could open in the near future. When you apply, a representative may contact you directly if a relevant position opens.
What You Will Do:
You'll be joining our Silicon One Signal & power Integrity team, which is at the center of the silicon development. Our SIPI engineers deal with all system development aspects and deliver detailed specifications to other development team. As SIPI engineer youll be required to design and analyze high speed analog/digital signals for networking products, with emphasis on high speed signal and power analysis of ASIC, Package and PCB. Model/simulate/characterize high speed systems, including high speed I/Os, chip packages, printed circuit boards, and system interconnects. Overcome the challenges of ultra-high data rate and cutting-edge technology. We use the latest silicon technologies and processes to build largest scale and most complex devices at the edge of feasibility.

As a key member of our best-in-class CAD Group, you will be part of building innovative designs. We will apply your hands-on experience in power EM/IR analysis to develop, define and refine the methodologies and flows for gate-level, as well as transistor level designs. Major tasks will include functional static / dynamic IR analysis, scan mode IVD analysis, package and interposer model handling, 3DIC and multi die analysis, power EM analysis, SigEM, power switch modeling, design abstract and reuse for EM/IR purposes, IP / SoC level EMIR sign-off / ECO, and much more.

In this highly visible role, your primary responsibilities will include:
- Development of custom EM/IR solutions that scale with accuracy and capacity challenges.
- Streamline and automate EM/IR flow with ownership of the entire flow.
- Support and collaborate with design groups (Physical-design and integration, Circuit-design / Power / Package & System / Technology) on their EM/IR requirements for various post-layout flows.
- Work side by side with EDA vendors and foundries for tool qualification, debug, and enhancement.

We are seeking a HW Board Design Engineer.
Meet the Team:
Youll collaborate with top industry engineers within the fast-growing Silicon One group worldwide.
You will be part of a team driving our groundbreaking next-generation network devices. Our team operates in a startup-like atmosphere within a global, leading corporation.
Our design center is unique, hosting all silicon hardware and software development fields under one roof. Our Networking Chips deliver high speed without compromising programmability, buffering, power efficiency, scale, or feature flexibility. They are strategically placed in critical AI infrastructure, powering next-generation network devices and supporting advanced AI workloads. They deliver high speed without compromising programmability, buffering, power efficiency, scale, or feature flexibility.
Your Impact:
Spearhead innovative silicon architecture for AI infrastructure, guiding board design from concept through to mass production.
Act as the technical decision-maker for the project and collaborate with cross-functional teams in mechanics, thermal, PCB layout, and software/RTL.
Define product specifications, develop electrical schematics, and guide component selection.
Conduct hands-on testing in a lab environment and drive the PCB bring-up, characterization, and debugging stages.

Required ASIC Design & Verification Engineer
Meet the Team
We leverage cutting-edge silicon technologies and methodologies to develop the largest-scale and most advanced devices, pushing the boundaries of whats possible.
We are transforming the industry with a unified, programmable architecture powering our future routing portfolio and shaping the Internet for decades to come.
Your Impact:
Review micro-architecture specifications
Implement Verification environment UVM based
Collaborate with Design engineers to resolve bugs and achieve coverage closure
Work with the firmware/Lab teams to verify chip flows
Perform debug, root-cause analysis, and post-silicon validation in the lab.

Required ASIC Design Engineering Technical Leader
Meet the Team
We leverage cutting-edge silicon technologies and methodologies to develop the largest-scale and most advanced devices, pushing the boundaries of whats possible.
We are transforming the industry with a unified, programmable architecture powering our future routing portfolio and shaping the Internet for decades to come.
Your Impact:
Write and review micro-architecture specifications
Implement RTL (Verilog/SystemVerilog) to meet timing, performance, and power requirements
Contribute to full chip integration, timing methodology, and analysis
Collaborate with verification engineers to resolve bugs and achieve coverage closure
Work with the physical design team to close timing and PnR issues
Support design methodology evolution and best practices
Perform debug, root-cause analysis, and post-silicon validation in the lab.

Required PHY Post Silicon Validation Engineer
What You'll Do
Youll be joining the post silicon validation team in PHY system group at Silicon One group as part of the silicon development
Our team deals with PHY and system aspects of the SerDes communication IP: PHY FW, calibrations, system definitions and operations and post-silicon validation including developing the automation infrastructure and tools.
We use latest silicon technologies and processes to build the largest scale and most complex devices at the edge of feasibility.
Who You'll Work With:
You'll be part of our Group driving our game changing next generation network devices. Our unique team works in a startup atmosphere inside a stable and leading corporation. The position includes hands on work in our lab in Caesarea and Netanya.
Our design center is unique - hosting all silicon HW and SW development disciplines inside one site.
We are transforming the industry and building a new internet for the 5G era, providing a unified, programmable silicon architecture that is the foundation of all our future routing products.
Our devices are designed to be universally adaptable across service providers and web-scale markets, designed for fixed and modular platforms. Our devices deliver high speed without sacrificing programmability, buffering, power efficiency, scale or feature flexibility.
We are a revolutionary, ground-breaking technology for our customers and end users for decades to come! The Internet now has a new faster, better, safer engine!

We are seeking a Volunteering, Inclusion & Diversity Operations Student to join our Team and support the execution of volunteering, Inclusion & Diversity, and employee community initiatives across us.

In this role, you will help bring projects to life by supporting logistics, coordination, administration, and on-site execution, working closely with internal teams, employees, external vendors, and community partners.

Location: Herzliya (primary); travel to Haifa as needed.

Availability: Minimum 4 days per week.

Responsibilities:
Support planning and execution of volunteering projects, I&D initiatives, and employee community programs.
Manage logistics: scheduling, supplier coordination, materials procurement, registration, and event preparation.
Coordinate with internal stakeholders, external vendors, nonprofits, and community partners.
Provide on-site/external venues support during events and activities.
Handle multiple parallel projects with precision and attention to detail.
Help identify ways to improve processes, create efficiencies, and support scalable project execution.