לוח משרות דרושים מהנדס מחשבים משרה מלאה

We are looking for a skilled and experienced Engineer with a focus on System Electrical Validation to join our Engineering team in Yokneam, Israel. As part of this role, you will play a crucial role in ensuring the quality of our advanced products. You will collaborate closely with PHY design, system architecture and company wide system, validation, reliability, signal integrity and testing owners to devise and implement effective validation strategies, aligning with our high-quality standards.
What youll be doing:
Create and implement electrical validation plans for new products.
Analyze and interpret validation results to identify potential issues.
Collaborate with design and architecture teams to define required validation and optimize and solve electrical issues.
Design and develop test scripts and frameworks to automate validation processes.
Work closely with software and firmware teams to ensure seamless integration.
Provide technical expertise and guidance to junior team members.
Maintain accurate documentation of validation activities and results.

We seek a highly motivated Network Performance Exploration Engineer to join our team of experts and help shape the foundational infrastructure for the AI revolution. Our next-generation networking systems are at the forefront of connecting and powering the world's most advanced AI clusters. As a key member of our architecture team, you will be responsible for exploring and identifying critical network optimization opportunities across our entire hardware and software stack, analyzing how system-level changes impact application-level performance.
What Youll Be Doing:
Explore and validate end-to-end application performance, defining comprehensive test plans and critical metrics to identify optimization opportunities in both hardware and software.
Establish and maintain a comprehensive database of benchmark results, tracking performance across releases to drive data-informed decisions.
Conduct deep-dive analysis into communication libraries (like NCCL), system software, and hardware configurations to investigate performance characteristics, validate architectural theories, and identify bottlenecks.
Provide critical performance data to correlate and enhance simulation tools, ensuring our models accurately predict real-world hardware behavior.
Analyze application-level traffic patterns (e.g., LLMs) on our advanced networking fabrics to identify hardware and software optimization opportunities and tune system parameters.
Lead Proof-of-Concept (POC) projects to prototype and evaluate potential hardware and software optimizations and their impact on application performance.

We are now looking for a Chip Design Engineer to join our Switch Silicon team for Verification / Design roles. As a Chip Design Engineer at our company's Networking business unit, you'll join a group of passionate engineers to design, implement and verify the next generation state-of-the-art Switch Silicon chips. In this position, you'll make a real impact in a dynamic, technology-focused company while developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency!
What You'll Be Doing:
Work in a combined design and verification team which develops some of the switch silicon core units.
Micro-architecture for RTL and simulation environment planning for units and modules.
Design/Verify RTL units/blocks according to Arch. specifications under challenging constraints with high orientation to power, area, and performance.
Build reference models, verify, and simulate chip blocks/entities according to specifications.
RTL synthesis, timing, supporting verification, and silicon post TO activities.
Work closely with multiple teams within organizations such as Architecture, Full chip Micro-Architecture, BE, and FW.

We are now looking for a best-in-class Verification Engineer to join our outstanding GPU-Networking Silicon Engineering team. As a DV Engineer at our company's GPU-Networking group, you'll make a real impact in a dynamic, technology-focused company while being a part of the team that develops the flagship product of todays semiconductor industry our companys GPU Super-Chip.
What youll be doing:
Work in a DV (Design Verification) team that has a global responsibility over deliverable units and clusters to the silicon GPU
Integrations and Full-Chip models
Verification of chip blocks/entities according to specifications under challenging constraints
Ramp-up and run DV tasks on emulation platform.

We are looking for a visionary, hands-on leader who can take an idea from zero to product, work closely with Product and customers, run experiments fast, and inspire a small team of strong builders. You will contribute to both the technical and product direction of this new line.

This is a key founder-mindset role inside a scaling startup. A rare opportunity to define an entirely new capability within a company - one that can become a pillar of the business.



What Youll Do



Build & lead a new business unit

Establish and lead a small, competent, multidisciplinary team.
Recruit, mentor, and inspire top talent.
Define & build the agentic AI product

Design and develop an agentic workflow system.
Define system architecture, agent patterns, interaction models, orchestration, observability, and safety.
Balance experimentation with production-grade engineering and reliability.
Partner with Product & customers

Work nearly day-to-day with the Product team.
Engage directly with design partners and later with early adopters.
Translate vision into experiments, MVPs, and short-term roadmaps.
Help shape UX, system behavior, product packaging, and pricing logic.
Collaborate across the company

Integrate with our Data, App, and DevOps teams.
Leverage existing infrastructure while building new, independent components.
Influence the broader companys approach to agentic AI systems.

You will be responsible to create analysis tools to assist in architecture exploration. You will define and simulate CPU features and develop supporting tool chains including simulators, analysis tools, compiler, etc.. You will collaborate with SW and algorithm teams as well as implementation teams to define and build efficient CPUs that integrate seamlessly into various subsystems.
Responsibilities
Work with SW and algorithm teams for optimization and customization of ISAs, CPU architecture, and micro architecture features
Create and analyze benchmarks for CPU and SOC subsystem architectures
Develop architectural and performance simulators
Define and develop toolchain infrastructure

In this visible role, you will be responsible for defining DV methodologies, test-bench infrastructure, and for project execution for the next generation high-speed interfaces to enable groundbreaking I/O connectivity solutions for product lines.
You will have regular interaction with Architecture, Design and SW teams, and the opportunity to influence our future products.
The people who work here have reinvented entire industries with all hardware products. The same passion for innovation that goes into our products also applies to our practices - strengthening our dedication to leave the world better than we found it. Join us to help deliver the next groundbreaking products.
Description
You will develop verification test plans, tools, test benches, protocol monitors, and high-coverage stimulus vectors. Apply advanced techniques to achieve verification with the highest quality, productivity, and time-to-market. You will work closely with the design team to ensure timely delivery of quality designs. Working with methods to accelerate verification time. Involvement in Post-Silicon Validation.

We are looking for talented engineers to join the Pre-silicon Verification team and help us technically lead the challenges of the next decade, developing a semiconductor platform based on revolutionary architecture, and taking part in the development of cutting-edge products within a disruptive system architecture.
Youll have the opportunity to work on the technologies that power the worlds largest cloud provider, in a dynamic, open, and fast-paced environment.

Required DFT Engineer , Nitro Team
Join our innovative semiconductor engineering team and help shape the future of cloud computing infrastructure. As a DFT Engineer at Annapurna Labs, you'll be instrumental in developing groundbreaking chip technologies that power the world's largest cloud platform. Your expertise will directly contribute to creating revolutionary semiconductor solutions that drive technological advancement and transform how global businesses leverage cloud services.
Key job responsibilities
* Develop comprehensive Design-for-Testability (DFT) strategies for advanced semiconductor platforms
* Collaborate with cross-functional engineering teams to ensure robust chip design and verification
* Generate and optimize test patterns using advanced methodological approaches
* Conduct detailed chip bring-up and lifecycle management processes
* Contribute to architectural definition and logic design for revolutionary semiconductor technologies
A day in the life
Your day will be dynamic and collaborative, involving deep technical problem-solving across multiple engineering domains. You'll engage with chip design, verification, and testing teams, translating complex architectural concepts into tangible semiconductor innovations. Expect to dive into intricate design challenges, develop sophisticated test methodologies, and contribute to cutting-edge product development.

Required DFT Engineer, Graviton Team
Key job responsibilities
* Design and implement advanced Design-for-Test (DFT) architectures for complex semiconductor platforms
* Develop high-quality test and debug patterns ensuring robust performance
* Conduct comprehensive static timing analysis across multiple DFT modes
* Verify intricate DFT logic and components with precision and creativity
* Support silicon bring-up and device diagnostic processes
A day in the life
Your day will be filled with complex problem-solving and collaborative innovation. You'll work alongside world-class DFT engineers in a dynamic environment, developing semiconductor technologies that support global cloud infrastructure. Our team thrives on creativity, technical excellence, and continuous learning.

Required Electrical Engineering Graduate, Graviton Team
Description
We develop leading-edge semiconductor products that power our cloud infrastructure.
As a startup-like organization within AWS, we create technologies that drive the world's largest cloud provider. Our engineers work with cutting-edge technologies to innovate and shape the future of cloud computing. At Annapurna Labs, you'll experience a fast-paced environment that offers continuous learning opportunities and the chance to develop next-generation platforms.
Are you ready to join us?
Key job responsibilities
- Develop and design advanced semiconductor technologies for cloud infrastructure
- Collaborate on architecture definition and logic design for next-generation computing platforms
- Participate in comprehensive chip verification and bring-up processes
- Contribute to the entire product lifecycle from initial concept to mass production
- Support integration of new chip designs into AWS data center environments
A day in the life
Your day will be filled with challenging technical problems, collaborative problem-solving, and innovative engineering. You'll engage in complex chip design processes, work with advanced design tools, and contribute to projects that improve the next generation of cloud computing technology.

We operate in true startup mode: fast-paced, ambitious, and deeply technical. The project is complex and schedule-challenging across architecture, RTL, verification, and system design and we are looking for a Senior Verification Engineer who wants to work hard, move fast, and help build something truly new.

The Senior Verification Engineer will join a high-end team responsible for verifying a high-performance controller ASIC at the core of this new computational paradigm.

Your Day to Day:
Define, architect, and develop advanced verification environments and flows using SystemVerilog UVM.
Build block-level, subsystem-level, and full-chip verification environments with reusable methodology.
Develop coverage-driven verification strategies and automation infrastructure.
Work closely with design, architecture, algorithms, and software teams to define functionality and corner cases.
Drive testplan creation, functional coverage definition, and closure across multiple complex blocks.
Debug intricate logic interactions, multi-clock structures, and high-speed data paths.
Contribute to verification methodology, tooling, infrastructure, and continuous improvement.
Participate in a fast-moving, startup-style environment where deep technical ownership and rapid iteration are essential.

We operate in true startup mode: fast-paced, ambitious, and deeply technical. The project is challenging across architecture, RTL, verification, and schedule and we are looking for a Senior Design Engineer who wants to push boundaries, work hard, and help build something that has never been done before.

The Senior Design Engineer will join a team responsible for the architecture, design, and verification of a high-performance controller ASIC at the core of this new computational paradigm.

Your Day to Day
Own the design, micro-architecture, and implementation of digital logic for a high-performance ASIC
Translate system-level requirements into detailed micro-architecture and RTL designs
Develop high-quality RTL code in Verilog/SystemVerilog
Work closely with the algorithm, verification, analog, and software teams to define interfaces and ensure end-to-end functionality
Participate in design reviews, propose improvements, and ensure compliance with coding and design guidelines
Integrate and debug digital modules in simulation and lab environments
Support synthesis, timing closure, performance optimization, and power reduction activities
Collaborate with verification teams to define test plans and ensure thorough coverage
Contribute to a high-intensity startup environment where solving tough technical challenges and meeting ambitious schedules is part of the mission

Required DFT Engineer, Nitro Team
Description
AWS Utility Computing (UC) provides product innovations from foundational services such as our Simple Storage Service (S3) and our Elastic Compute Cloud (EC2), to consistently released new product innovations that continue to set AWSs services and features apart in the industry. As a member of the UC organization, youll support the development and management of Compute, Database, Storage, Internet of Things (Iot), Platform, and Productivity Apps services in AWS. Within AWS UC, our Dedicated Cloud (ADC) roles engage with AWS customers who require specialized security solutions for their cloud services.
Join a groundbreaking semiconductor team where your expertise will directly power the world's largest cloud infrastructure. At Annapurna Labs, you'll be instrumental in developing next-generation chip technologies that transform how global businesses leverage computing power, working at the intersection of innovative design and cutting-edge technological advancement.
Key job responsibilities
* Develop comprehensive Design-for-Testability (DFT) strategies for next-generation semiconductor platforms
* Collaborate across multiple engineering domains to ensure robust chip design and verification
* Generate and optimize test patterns using advanced methodological approaches
* Conduct detailed logic design and verification processes
* Support chip bring-up and contribute to the entire device lifecycle from definition to mass production
A day in the life
Your day will be dynamic and collaborative, diving deep into semiconductor design challenges. You'll engage with multiple engineering teams, crafting sophisticated test strategies, developing intricate logic designs, and contributing to the entire chip development lifecycle. Expect to transition seamlessly between technical problem-solving, collaborative design sessions, and strategic planning.

we are looking for a skilled and motivated SW Quality and Test Architect for the Platform OS Department. The Platform OS team of our company is leading a global effort of making the Linux OS as the Automotive Safety OS that will fuel the Autonomous Vehicle and the whole automotive industry. As the technical lead and architect for Quality and Test aspects of the OS teams, you will be contributing to the overall qualification effort of our company while collaborating with OS development teams and architects
What will your job look like:
Work with the system and SW architecture teams closely.
Review and analyze all functional SW requirements from OS features and write the relevant testing and quality requirements for development teams.
Define the key performance indicators and the methodology of measuring and tracking them.
High level design of test scenarios.
Review test design and implementation with development teams.
Define functional requirements from the CI/DevOps teams to satisfy the OS quality needs.
Track the integration between the CI and OS tests.
Manage quality indicators like code quality and coverage indicators.
Mentor OS teams for quality programing and proper testing.
Track and analyze bug escapes on a continuous basis to improve testing coverage and overall quality.
Daily tracking of test coverage, resource utilization and testing time.