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We are seeking a System Engineer for Precision Tracking to join its R&D team. This role is suited for an experienced engineer with a strong system-level perspective, combining technical leadership, multidisciplinary coordination, and active involvement in the development of advanced tracking systems.

Responsibilites
Overall responsibility for precision tracking technical project management at R&D including planning and monitoring of all R&D activities, planning and monitoring of project R&D budget (material and hours), lead of technical activities with the customer including design reviews, acceptance testing and system assimilation.
Overall responsibility of the system level architecture of complex systems.
Overall responsibility for System, Software and Hardware level specifications and requirements.
Overall responsibility and active participation in the Integration and Proof of Design phases.
Overall responsibility for electrical connectivity design between LR.

We are seeking a System Engineer for Precision Tracking to join its R&D team. This role is suited for an experienced engineer with a strong system-level perspective, combining technical leadership, multidisciplinary coordination, and active involvement in the development of advanced tracking systems.

Responsibilites
Overall responsibility for precision tracking technical project management at R&D including planning and monitoring of all R&D activities, planning and monitoring of project R&D budget (material and hours), lead of technical activities with the customer including design reviews, acceptance testing and system assimilation.
Overall responsibility of the system level architecture of complex systems.
Overall responsibility for System, Software and Hardware level specifications and requirements.
Overall responsibility and active participation in the Integration and Proof of Design phases.
Overall responsibility for electrical connectivity design between LR.

Join us as a Hardware Board Design Engineer, where you will contribute to complex design projects and the development of cutting-edge communication systems. In this role, you will design high-performance boards for advanced avionics systems, working as part of a professional hardware design team. Your expertise will drive innovation and ensure the highest standards of quality in our products.

Responsibilites
End to end boards design.
Starting from the component's selection and evaluation, schematic design, thermal considerations, mechanical constraints.
Layout design, production supervision, bring-up on lab.
Including all the relevant document writing and conducting the design reviews needed until the product is finished.
Leading products from the definition until their release.
Supporting production when needed.

We are hiring an Electronics Engineer for its R&D department.

Role Responsibilities:
Development and production of electronic systems for the defense sector.
Integration into a development team of approximately 10 engineers.
Leading tasks from the design phase through transfer to production.
Project management as part of ongoing work.

We are seeking an experienced System Engineer specializing in Satellite Communications and RF.

Responsibilities
Learn and become familiar with existing systems.
Define system requirements and write specification and detailed design documents.
Map and evaluate existing solutions (COTS systems or custom-developed solutions).
Provide engineering oversight and support throughout development processes
Work closely with subcontractors and suppliers.
Manage configuration control and engineering documentation.
Represent the systems from an engineering perspective מול internal and external stakeholders.
Participate in design reviews and technical discussions.

This is an opportunity to embark on an interesting and challenging adventure into the world of satellite communication which is undergoing a major disruptive revolution.

The LS includes Control and data processing HW, SW as well as Phy and Radio HW and FW, to construct a full communication system supporting DVB-S2X as well as other Radio and IP communication protocols.

Responsibilities
Landing station system validation activity including Phy, HW and SW validation.
Study system architecture and system requirements and take part in a test plan to address these requirements in collaboration with system engineering and other teams.
Define and write automatic test plans and test procedures for new systems and features.
Build test setups for fully automated regression as well as for manual tests.
Take active part, hands-on in team execution: integration and feature/product enabling, bring up and debug activities, regression automation test of satellite systems.
Record, investigate and analyze defects.
Investigation of root cause of test case failures and providing corrective action in conjunction with development teams.
Support Test Management tools and continuous integration methodologies
Data analysis and post processing of data collected.
Compilation of regular Test execution summary report with metrics.

you will define system and IP architectures, develop architectural models, and author technical specifications for a variety of high-performance, high-quality, low-power, world-class products.

You will

Define and drive architectures across multiple domains, spanning chip-level components, subsystems, and system-level workflows.

Translate product requirements into architectural specifications, features, and hardware/software execution models for implementation teams.

Lead cross-functional technical decisions, balancing functionality, performance, scalability, power, and implementation trade-offs.

We are seeking a seasoned Sr Staff Physical Design Engineer to provide technical leadership across full-chip and multi-die physical implementation on advanced TSMC FinFET nodes. You will define and own the backend design methodology, champion Agentic AI integration into the PD flow, and mentor engineers across the team while interfacing directly with foundry, EDA vendors, and executive stakeholders.

What You'll Do
Architect and own the full-chip physical design strategy: floorplanning, power delivery network (PDN), clock architecture, PnR, and timing closure
Define and drive backend methodology standards across the team for advanced node tapeouts (N5/N4P/N3)
Lead critical timing closure efforts - MCMM, OCV, advanced ECO strategies, and cross-corner sign-off
Oversee and guide signal integrity, power integrity, EM/IR, and reliability analysis for full-chip designs
Architect and lead the development of scalable PD flow infrastructure using Python and TCL - including automated regression, sign-off reporting, and run management systems
Champion the adoption of Agentic AI in the design flow - define use cases, evaluate tools, prototype autonomous agents for floorplan exploration, timing closure, and ECO automation
Lead cross-functional design reviews with DFT, verification, analog, and process engineering teams
Interface with TSMC, EDA vendors (Synopsys, Cadence, Siemens), and internal research teams to evaluate and adopt new methodologies
Mentor and technically guide junior and mid-level PD engineers across the organization

We are seeking a motivated FPGA Engineer with up to 3 years of experience to join our hardware development team. In this role, you will contribute to the design, implementation, verification, and debugging of FPGA-based solutions for advanced digital systems. You will collaborate with architects, ASIC/SoC designers, firmware engineers, and verification teams to develop high-performance products from concept through deployment.

This position offers an excellent opportunity to gain hands-on experience with modern FPGA technologies, digital design methodologies, and complex microcontrollers in a collaborative engineering environment.

Key Responsibilities
Design and implement FPGA logic using Verilog and SystemVerilog.

Develop and maintain FPGA subsystems, IP blocks, and reference designs.

Participate in FPGA architecture discussions and design reviews.

Perform RTL simulation, debugging, and functional verification.

Support synthesis, place-and-route, timing closure, and implementation activities.

Develop and execute test plans for FPGA validation and bring-up.

Debug hardware and system-level issues in laboratory environments.

Integrate interfaces such as JTAG, AHB, DDR, etc.

Collaborate with software, firmware, and hardware teams throughout product development.

Document designs, verification results, and development procedures.

Support prototype development and system integration activities.

Be part of a team responsible for designing the next generation of mobile devices. The position includes responsibility for system analysis and HW architecture design for high-speed and low-power interfaces, networking protocols, storage processing, including acceleration of protocols reducing overall power consumption. The job requires collaboration with multiple engineering functions and teams in various geographical locations. It includes identifying system use, requirements definitions, understanding of industry specification for interfaces, operating in industry Standards committees, SW and HW interaction, performance analysis, and more.

we are looking for a hands‑on Design Verification Lead to drive verification of next‑generation wired/wireless peripheral subsystems that power Snapdragon platforms.

As a DV Lead in the Peripheral group, you will own verification of complex IPs and subsystems, define and execute UVM‑based verification strategy, and lead a small team of talented engineers to first‑time‑right silicon.

This is a 5 days on site position in Haifa
What youll do

Define verification strategy, test plan, and coverage goals for complex peripheral IP and subsystem blocks

Architect, develop, and maintain UVM‑based constrained‑random verification environments

Lead day‑to‑day activities of a small DV team: task planning, code and testplan reviews, mentoring, and technical guidance

Drive debug of complex issues across RTL, testbench, and system level, working closely with design, emulation and validation teams

Analyze and close functional and code coverage, drive quality metrics to tape‑out criteria

Contribute to methodology and flow improvements across the Peripheral DV team

we are looking for skilled and motivated senior logic design engineers to join our next generation Snapdragon projects.

With this position you'll be joining the VLSI team of the Camera group working on cutting-edge image signal processor (ISP).

You will be working on innovative design implementing novel image processing and computer vision algorithms (traditional and ML based) that will further raise the bar of image capture for mobile, auto, connected smart camera application and much more.

Join us Camera Systems team and help develop next-generation imaging technologies for mobile and AR/XR devices.

What you'll do
Develop image processing, ISP (Image Signal Processing), video processing, and computational photography algorithms.

Design hardware-friendly imaging algorithms for implementation in dedicated ISP and imaging accelerators.

Define camera system flows that combine imaging and auxiliary sensors to achieve industry-leading image and video quality.

Drive the development of new imaging hardware architectures and processing pipelines.

Collaborate with architecture, hardware, software, and systems teams throughout the product lifecycle.

We are looking for a NPI Configuration Engineer to join our team. The NPI Configuration Engineer will be responsible for leading new product introduction projects and ensuring a successful transition from development to manufacturing.

Your Day to Day
Own all engineering documentation: drawings, BOMs, work instructions, PNs
Manage engineering change processes (ECOs, MCOs, product revisions) end-to-end
Maintain data integrity in PDM/PLM and ERP systems (Priority, SolidPDM- advantage)
Drive new product introduction (NPI) from design to small-scale and mass production (including DFM/DFA/DFT, vendor support, and configuration control)
Participate in design reviews and support risk mitigation during development
Identify opportunities and lead cost reduction initiatives