לוח משרות דרושים חשמל ואלקטרוניקה משרה חלקית, לחיפוש זה נמצאו 51 משרות

For DRS Rada Technologies, a defense company that manufactures life-saving radar systems, we are looking for a student for the Final Testing Department at the plant in Beit She'an. Responsibility for performing electrical tests on boards and finished products in the final testing department in production. The work is in shifts, morning and night, including weekends (and alternating Saturdays). Suitable and convenient for students, with good conditions for suitable candidates and opportunities for advancement.

We are looking for a Software Development Student to join us part-time alongside your studies. You will work on real firmware that ships on production ML servers, writing and testing code, debugging on real hardware, and learning how large-scale accelerator platforms are built from the ground up. You will be working closely with silicon, hardware, and cloud teams to bring new accelerator platforms from first power-on to production. You will be paired with experienced engineers who will mentor you, review your code, and help you grow.

This is a hands-on role for a student who is curious about how hardware and software meet, enjoys solving problems at a low level, and wants to make a real impact on systems used at massive scale.

Key job responsibilities
- Develop, test, and debug firmware components for ML accelerator servers.
- Write clean, well-tested code and participate in code reviews.
- Investigate and root-cause issues on real hardware in the lab.
- Build tools and automation that improve the team's development and validation flow.
- Collaborate with firmware, hardware, and platform engineers across the group.

The Camera Hardware Engineering group is responsible for all research, design, development, test and qualification of camera hardware for Apple products. The team in Israel is looking for a Design&Validation Student
who will join a team responsible for end-to-end design, production and testing of high quality micro-optic components. The team features a collaborative and hands-on environment that fosters engineering excellence, creativity, and innovation in the interdisciplinary areas of optical design, testing and device fabrication.

Description:

Involved with all phases of execution of high performance micro-optic elements, from prototype to mass-production.

Design and hands-on operation of optical setups in the lab, including understanding expected measurement errors and their causes.

Defining optical testing strategies (for prototypes and mass-produced components).

Interacting with a broad range of teams and subject areas.

Directly contributing to the success of our micro-optics components in numerous Apple products.

Join a team developing next-generation AI accelerators, working at the intersection of AI algorithms, software, and hardware.

*Part-Time or Full-Time Opportunity

Responsibilities:
The research focuses on designing next-generation rack and SuperPod architectures that combine elasticity through resource pooling with optimal performance enabled by holistic co-design across applications, parallel programming models, interconnect fabrics, and compute, memory, and switch chip architectures. On the communication side, the work architects scalable, high-bandwidth, and low-latency scale-up fabrics across multiple chips at rack and SuperPod scale. On the memory side, it explores richer protocol semantics beyond traditional load/store operations to reduce unnecessary data movement and rethinks memory hierarchies to expose large-scale capacity with near-local latency. On the compute side, it analyzes the requirements of General Compute and Generative AI workloads and their parallel programming models to fully leverage large-scale system resources.
Investigate and prototype new architectural features, including but not limited to:
o Tiered Memory: Explore advanced memory organizations, including hardware-managed caching, to enable software-transparent, fine-grained promotion and demotion of cache lines across the memory hierarchy.
o Prefetching/Speculation: Evaluate and design existing and next-generation hardware prefetching and speculation mechanisms to effectively hide local and remote memory latencies at rack and SuperPod scale.
o Near-Memory/Network Processing: Develop support for key primitives executed at the memory and network layers to minimize unnecessary data movement across sparse, dense, and pointer-based data structures.
o Workload-Centric Co-Design: Study optimal parallelization strategies at rack and SuperPod scale for both General Compute and Generative AI workloads, and design dedicated hardware support for widely used parallel programming primitives such as RPCs and collective communication.
Write reports and papers on the research results and present them.

*Part-Time or Full-Time Opportunity

In this job opening, we are seeking a highly motivated and visionary researcher to join our team focused on chiplet-based computing systems. This role involves research and development in chiplet-based architectures, aiming to overcome performance and scalability limits of traditional compute platforms.

Responsibilities:
Conduct cutting-edge research on the co-design of communication and computation for wafer-scale systems. On the communication side, the work focuses on architecting Networks-on-Chip, providing scalable, high-bandwidth, and ultra-low-latency interconnects that efficiently span multiple dies and support fine-grained data movement. On the computation side, the research emphasizes optimizing and mapping training and inference workloads to fully exploit wafer-scale resources, improving performance, scalability, and energy efficiency through intelligent task placement and scheduling.
Investigate various aspects of system design, including:
Network-on-Chip design, further including Topology exploration, routing algorithms, and protocol/flow-control design to support high-throughput collective communication, low-latency synchronization, and efficient model/data parallelism
Expressing and Mapping LLM Parallelism to Wafer-Scale System that simplify LLM parallelism (e.g., tensor, pipeline, and data parallelism) and efficiently map training and inference workloads onto wafer-scale system