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Were building the next Gen. AI Factory, at a leading AI Infrastructure technology company. Our products sit at the core of rack-scale computing and define the performance and scale of AI systems. If youre driven by solving problems, some dont yet have names, this is where you want to be.
In this role, you will:
Establish and lead a Back-End team with emphasis on RTL to GDS flow, Floorplan, Synthesis, Place and route, clock-tree, STA, layout, signoff (Timing, DRC, LVS) and Power
Be responsible for the Backend execution and methodologies
Be responsible to guide and lead contractors

As a Senior Technical Writer at SentinelOne, you will join our global Design & Docs organization and own end‑to‑end planning, authoring, and maintenance of customer‑facing product content. This role is based in our Tel‑Aviv, Israel office, in a hybrid model, working day‑to‑day with local R&D and product teams as well as team-members and distributed stakeholders worldwide.
Youll work closely with Product Management, Engineering, UX, Support, and other stakeholders to explain complex cybersecurity and AI‑driven capabilities in ways that are clear, accurate, and task‑focused. Your expertise and insight will enhance our documentation processes and standards. Each day will present new challenges and opportunities for growth and creativity, allowing you to leverage your skills to improve the clarity, accessibility, and usability of our documentation for both internal and external stakeholders. Join us in shaping the narrative of our products and empowering users to maximize the value of our AI solutions for their cybersecurity needs.
What will you do?
Support and collaborate with the product team, focusing on innovative cybersecurity solutions.
Own documentation for one or more product areas in the platform, while becoming knowledgeable in many areas. Documentation includes Release Notes, Admin Guides, Knowledge Base articles, and UI text.
Plan, research, and document features in a topic-based method. Research includes collaboration with Support, Development, QA, Product Management, and other teams, with a focus on self-learning through hands-on and independent study.
Write according to our style guidelines to create customer-focused guidance for our highly-technical cybersecurity and AI products.
Work with the product documentation team to create integrated, consistent information deliverables and to innovate for constant improvement.
Work with a dynamic, international team on high-impact deliverables.

Maytronics is a global company, a world leader in the pool cleaners industry. We are looking for a Hardware Engineer for design, development, implementation, verification, and validation Embedded electrical board and systems for the new generation of Maytronics robots and products. From the board design according to the system requirement thru the final product in the production line launching.

Define the AI core architecture that will shape the next generation of AI chips, leading the global competition in AI computing power. As a key contributor to the competitiveness of AI core architecture, we drive chip architecture innovation starting from algorithm evolution, building a full-stack closed-loop capability of "algorithm-architecture-circuit-system," and creating a globally leading, independently controllable AI accelerator core to support the Ascend AI ecosystem and the implementation of large model strategies.
Responsibilities:
Modeling of HW specification of new architecture and microarchitecture. Working closely with architect and microarchitecture on modeling the specification.

As HW Architect Team Leader, you will combine deep technical leadership with people leadership. You will shape next-generation networking silicon while building and mentoring a strong architecture team.
What Youll Be Doing
Lead, manage, and mentor a team of HW architects, fostering technical excellence and innovation.
Drive research, evaluation, and architectural definition of next-generation SoCs - from product requirements through production.
Define next-generation Packet Processor / Datapath / Congestion Management architectures for high-performance, complex SoC Ethernet and NIC switches.
Lead system architecture and detailed micro-architecture definition across major functional blocks.
Collaborate cross-functionally with design, verification, modeling, software, and other architecture teams to ensure end-to-end system alignment.
Identify and evaluate new technologies, methodologies, and architectural approaches for future products.
Provide technical direction, make key architectural trade-offs, and ensure execution excellence.

What will you be doing?
Lead research, evaluation, and architectural definition of next-generation chips - from requirements through production.
Define next-generation Packet Processor / Datapath / Congestion Management architectures for high-performance, complex SoC Ethernet Switches.
Design the system architecture and detailed micro-architecture definition across major functional blocks.
Collaborate closely with design, verification, and modeling teams to ensure architectural intent is fully realized.
Work cross-functionally with other architecture teams to shape cohesive system solutions.
Explore and evaluate new technologies and innovative approaches for future products.

we are looking for an architect to work on the invention and development of new SW visible CPU technologies to improve performance of SW scenarios related to memory ordering, memory coherency, multithreading, synchronization, memory safety, caching, etc.
The minimal tasks of this role are:
1. Modeling of new memory related architectural features in the existing CPU performance simulator
2. Development of performance tests or adaptation of existing workloads to be suitable for simulation
3. Conducting performance studies for the workloads of choice either in the performance simulator or on a real chip
4. Develop analysis, conclusions and recommendations based on the above activities
The role can comprehend much more than that depending on the skills, talent and experience of the candidate creating a career path over time. For example, to invent new instructions and mechanisms to overcome significant performance bottlenecks in these areas, refinement and further development of ideas provided by others. Possible participation in development in additional domains
If you want to be part of something bigger, if you are a team player with excellent communication skills and motivation to revolutionize data-center technology, youre welcome on board!

Will drive the implementation of autonomous core power management for best performance and power efficacy.
The Power expert will take charge in understanding business-units (customers) needs, and translate them to CPU core solution.
This expert will utilize his power management experience to deliver world-class power efficient HW-SW solutions for Huawei products.
Responsibilities
Responsible for bringing Huawei CPU to a leading position in Performance-Power efficiency.

The CPU Architect will take charge in defining a processor core that meets the requirement of high performance, high bandwidth, and scalable processing architecture. This architect will utilize his processor experience to deliver a world-class processor ASIC with many advanced features for Huawei products.

The CPU core Architect representative will be a member of the processor core architecture team. He will be responsible of the technical communication between the team in Israel and the team in China. He will be presenting and explaining Microarchitecture features developed by architects in Israel, collecting requirements, answering question. He will be responsible to hold deign reviews with the team in China. He will also be proposing new Micro architecture features based on his own ideas. take charge in defining a processor core that meets the requirement of high performance, high bandwidth, and scalable processing architecture. This architect will utilize his processor experience to deliver a world-class processor ASIC with many advanced features for Huawei products. The CPU core architect representative would be relocating to China for an extended period after getting familiar with the team in Israel.

The CPU Architect will take charge in defining a processor core that meets the requirement of high performance, high bandwidth, and scalable processing architecture. This architect will utilize his processor experience to deliver a world-class processor ASIC with many advanced features for Huawei products.

Our goal is to design cutting-edge CPUs for smartphones, servers, and desktops, and we need the very best talent to help us achieve it!
The CPU Architect will take charge of defining a processor on chip inter-connect and coherent fabric that meets the requirement of high performance, high bandwidth, and scalable processing architecture. This architect will utilize his processor experience to deliver a world-class processor ASIC with many advanced features for Huawei products.

At Infinidat, we help enterprises and service providers empower their data-driven competitive advantage at scale. We are a leading provider of enterprise-class storage solutions. The company’s software-focused architecture delivers sub-millisecond latency, full availability, and scalability with a significantly lower total cost of ownership than competing storage technologies. We are looking for a Senior Hardware Integration Engineer to join our expanding R&D team. In this role, you will collaborate with off-the-shelf component vendors to evaluate new technologies for integration into our products, qualify new hardware and firmware releases, and lead debugging efforts on complex technical issues. You will also provide hardware-focused support to internal teams, including Level 3 support, Manufacturing, R&D, QA, and IT.

Responsibilities:

* Demonstrate deep expertise in storage hardware products, including servers, drives, enclosures, and power components.
* Evaluate and qualify new hardware components, actively participating in their integration into the product.
* Collaborate with global vendors and cross-functional internal teams to enhance product quality and resolve complex technical issues.
* Lead failure analysis investigations—both internally and with suppliers—and drive corrective and preventive actions.
* Manage and lead new and existing hardware projects, continuously exploring technologies and methodologies.
* Maintain and update the hardware knowledge base using industry-standard tools (e.g., Jira, Google Sheets, etc.).

In this visible role, you will be responsible for defining DV methodologies, test-bench infrastructure and project execution for the next generation MSP (Memory Signal Processing) IPs to enable state of the art storage solutions for Apple products line.
Description
You will develop verification test plans, test benches, tools and infrastructure, protocol monitors and agents, and coverage driven stimulus in UVM.
Apply advanced techniques to achieve verification with the highest quality, productivity, and time-to-market.
Apply deep system level understanding to find system architecture bugs, verifying the DUT at multiple levels - from block level to the entire IP and subsystem, with additional emphasis on power (NLP) and performance.
You will work closely with the design, architecture, software, system and validation teams from the early stages of IP definition, to ensure timely delivery of quality designs.
Involvement with Post Silicon Validation and other verification teams.

Required Antenna system and RF Engineer
Overview:
Antenna system and RF engineer that will primarily lead antenna system design, testing and system verification from concept to production.
The position is part of the RF R&D team and will require in addition RF board design and testing.
Responsibilities will range from initial concept stage up to production including concept verifications, guiding mechanical design, final product approval including outdoor testing and transfer to production.
The designs require multi discipline knowledge in antennas, antenna arrays, mechanics, RF and system considerations
The job requires collaboration with the system, electrical, mechanical, software, manufacturing, and system test engineers to ensure successful product design and transition to production.