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We are looking for best-in-class Physical Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.

What you'll be doing:

Physical design of blocks according to specifications under challenging constraints targeting for the best power, area, and performance.

Be exposed and work on a variety of challenging designs (including high cell count and HS blocks). Resolving complex timing and congestion problems.

Daily work involves all aspects of physical design chip development (RTL2GDS) - synthesis, power and clock distribution, place and route, timing closure, power and noise analysis, and physical verification.

Taking part inflows development.

About us:
An Israeli research and development company that analyzes cyber and technological security threats and designs secure architectures and controls for complex systems. We provide our customers with cyber-resilient architecture design, research and development of innovative security controls, hardware security, and system security engineering, as well as expertise in protecting RF and Wireless channels, cryptography, quantum communication and more.
Job Description:
As a system Engineer in multidisciplinary projects focused on RF and communication systems you will lead the engineering aspects of the system, conduct system design surveys and participate in various design and testing stages of the system. You will also take part in cyber research and analysis, threat research, characterize protection and cyber products, and develop innovative cyber- RF solutions.
Option for full-time or part-time employment.

We are currently seeking an Antenna Engineer to join the RF Group within the Hardware Department.
This role focuses on the development of antennas and other RF devices, and offers dynamic, interesting, and innovative work opportunities within the department.
Responsibilities include:
Leading the development of internal antennas, from concept to mass production.
Conducting electromagnetic simulations in CST.
Building antenna prototypes in the lab.
Performing measurements in the RF lab, from card level to final products.
Conducting antenna measurements in an advanced spherical anechoic chamber.
Analyzing results and writing technical reports in English.
Improving processes and implementing new technologies.

We are looking for a HW Team Lead.
Leading and managing a team of experienced hardware engineers, developing products for the IoT field
Characterization and planning of future products in hardware development aspects Providing support for existing products.
Ongoing management of the department's tasks, while defining project schedules and costs in terms of hardware.
Control of the electronic design, accompanying the development team in all stages of the project from planning to mass production.
Working with other interfaces in the organization such as engineering, operation, mechanical development, radio, software, and system engineering.
Risk Management
Concern for constant improvement in the aspect of technical knowledge, work methods, quality, and control of the team's products.
Striving for achievements and innovation, and the ability to lead changes.
Main Responsibilities:
Develop new hardware-based products.
Provide support for existing products.
Mentor and manage a team.
Manage tasks and projects.

We are looking for best-in-class Physical Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.

What you'll be doing:
Physical design of blocks according to specifications under challenging constraints targeting for the best power, area, and performance.
Be exposed and work on a variety of challenging designs (including high cell count and HS blocks). Resolving complex timing and congestion problems.
Daily work involves all aspects of physical design chip development (RTL2GDS) - synthesis, power and clock distribution, place and route, timing closure, power and noise analysis, and physical verification.
Taking part inflows development.

We are looking for a Project Manager, R&D.
Leading R&D projects from concept to completion.
Creating complex products and innovative technological solutions. Working with multiple R&D disciplines, including hardware, firmware, mechanics, hydraulics, radio and software applications.
In charge of R&D activities, from initiation, work, and budgets planning, through execution, lab trials and field testing, to mass production
Building a multidisciplinary work plan that reflects the needs and dependencies between teams, regulations, project stages and testing execution as well as defining and ensuring milestones for implementing
Responsible for project execution and progress follow-up, meeting schedules and budgets, allocating resources, conveying periodical updates, raising flags in case of delays, managing risks, resolving problems as they arise and determining the timing of activities while continuously striving for excellence
Summarizing the project, drawing conclusions regarding the conduct of the project and proposing improvements and streamlining of organization and future projects
The position requires proactivity, transparency, good communication skills, the ability to work under massive pressure, decision making, conflict resolution and ability to work in an ever-changing multi-project environment

Imagine what you could do here. new ideas have a way of becoming great products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish.
The people who work here have reinvented entire industries with all Hardware products. The same passion for innovation that goes into our products also applies to our practices - strengthening our dedication to leave the world better than we found it. Join us to help deliver the next groundbreaking products.

In this visible role, you will be responsible for defining DV methodologies, test-bench infrastructure and project execution for the next generation MSP (Memory Signal Processing) IPs to enable state of the art storage solutions for products line.

You will develop verification test plans, test benches, tools and infrastructure, protocol monitors and agents, and coverage driven stimulus in UVM.
Apply advanced techniques to achieve verification with the highest quality, productivity, and time-to-market.
Apply deep system level understanding to find system architecture bugs, verifying the DUT at multiple levels - from block level to the entire IP and subsystem, with additional emphasis on power (NLP) and performance.
You will work closely with the design, architecture, software, system and validation teams from the early stages of IP definition, to ensure timely delivery of quality designs.
Involvement with Post Silicon Validation and other verification teams.

In this position, you will provide system-level software solutions for a new hardware
accelerator with an innovative architecture. You will be involved in and lead all
aspects of development, including architecture, design, and implementation stages.

An exciting semiconductor startup is seeking an outstanding Firmware engineer. This is a rare opportunity to influence the future of both processor architectures and database systems.

Take a part in the design and brainstorming of new complex features. Develop, test, debug and optimize low-level firmware layer on our SOC. Collaborate with chip design, software, verification, and architecture teams to define and design new low-level firmware flow. Improve our team methodologies, and automated process.

An exciting semiconductor startup is seeking an outstanding verification engineers to develop a new type of massively parallel architecture.

This is a rare and exciting opportunity to join an evolving team and company, allowing you to influence the future of both processor architectures and database systems.

Job Description
​​We are looking for highly motivated Engineers who love the challenge and the opportunity of a growing company. Join us and be a part of a small and dynamic team, which is revolutionizing the parallel processor architecture.

With the growing demand for traffic bandwidth in datacenters, efficient physical high-speed communication becomes a crucial part of the development of silicon ASCs that serve networking infrastructures. We are looking for a PHY (Physical Layer) Architect for our Architecture team. We are positioning you to a key role to face this challenge and become part of our team, so we can continue developing the best devices in the industry.

Our networking architecture group is seeking for a highly skilled, leading engineer to explore, and define the Physical layer of our products. As a lead engineer, you'll be responsible to define and drive features and have responsibility on the Physical layer architecture. The role will include definition of both the hardware circuitry and the firmware/software that is involved in operating the physical layer communication, with emphasis on the former. We are searching for hardworking, enthusiastic, engineer which has both highly technical skills as well as good personal skills, in order to be able to lead cross groups activities.

What you will be doing:

Lead projects across team, starting from processing requirements and definitions from customers and translating those into detailed technical specification for hardware architecture, system embedded software, user interface and high-level design.

Supervise the implementation of projects by team-leaders / developers / QA, participate in low level design reviews, QA test plans reviews, and keep track of changes and handle obstacles.

Define the architecture of implementing physical layer standards into our ASIC devices.

Involved in standard bodies activities and definition of next generation protocols.

Define features for the phy layer, to exploit interoperability between different generations of communication.

Be involved in product definition and the high-speed protocols that the company`s networking devices will support.

Work closely with multi-functional teams - design, backend, system, marketing, firmware, driver, etc. Provide architecture definitions and as a result converge on key design decisions.

Become focal point for our physical layer networking communication devices.

We are looking for an excellent Firmware Optics Verification Manager to join the Optical FW group. As the team manager, you will be leading a major development team responsible for the next-generation optical modules products while being hands-on with development activities. The verification team develops cutting-edge networking features for 1600GbE Data Centers and Networks of tomorrow. We drive the data growth of the worlds biggest companies. With talented engineers around the globe, the work environment is dynamic, meaningful, and fast-paced. Are you ready for the challenge?


What you will be doing:

As a Optic Firmware Verification Manager, you will lead a group of firmware verification engineers, using your expertise in C++ and Python in an Agile methodology to drive the verification strategy.

Manage the verification process, aligning with quality standards and project timelines.

Drive and facilitate the planning, scheduling, and execution of the project and activities of the team

Collaborate with architecture and different software design teams as part of the software development lifecycle.

Work in pre and post-silicon development environments of next-generation our Optics modules products.

Gain a deep understanding of networking technology, system debugging and stacks, as well as the HW/FW/SW relationship.

Innovate! Bring our FW Optics products to shine in customers view

We are seeking a dedicated and skilled team member to assist customers with integrating DDR/HBM PHY and/or Controller Intellectual Property.


Responsibilities:
In the Applications Engineering team, your main role will be to assist customers with integrating advanced DDR Interfaces into their System On a Chip. These systems are next generation products utilizing DDR5/4, LPDDR5x/5/4x or HBM3 IP.
The job gives you a chance to work with IP and the newest industry specifications and applications.

The Application Engineer provides:

Provide technical support and guidance to customers during their System on Chip (SoC) workflow to address and overcome any technical difficulties.
performs integration reviews at key milestones.
accompany customer's silicon/system bring-up preparation and execution.

Key Qualifications:
BSEE or equivalent background required, MSEE preferred.
Requires 8 years of related design or customer experience.
Experience in one or more steps on IP design or integration flow of System On a Chip design: Simulation, verification, RTL synthesis, physical design, timing closure, and silicon bring-up/characterization tasks within a system environment.

We are looking for best-in-class Physical Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.

What you'll be doing:

Physical design of blocks according to specifications under challenging constraints targeting for the best power, area, and performance.

Be exposed and work on a variety of challenging designs (including high cell count and HS blocks). Resolving complex timing and congestion problems.

Daily work involves all aspects of physical design chip development (RTL2GDS) - synthesis, power and clock distribution, place and route, timing closure, power and noise analysis, and physical verification.

Taking part inflows development.