לוח משרות דרושים ASIC / VLSI משרה מלאה, לחיפוש זה נמצאו 49 משרות

Required Senior Design Engineer-CPU
Description
We are a swiftly growing unicorn startup that is reimagining high-performance computing. Our pioneering RISC-V and accelerator coprocessor vastly accelerates supercomputers, driving them forward into a new generation. Our new software-defined hardware architecture enables HPC and AI to fulfill its promise of breakthroughs in all advanced research fields.
Everything we do is guided by three core values:
Professionalism: We strive for exceptional results through professionalism and unwavering dedication to quality and performance.
Unity: Collaboration is key to success. That's why we foster a work environment where every employee can feel valued and heard.
Impact: We're passionate about developing technologies that make a meaningful impact on industries, communities, and individuals worldwide.
We are looking for an experienced, talented CPU ASIC front-end design expert and technical lead. In this role, you will take part in developing cutting-edge high performance best in class RISC-V CPU, from definition stage through planning stage and the development of new features while solving challenging implementation problems and ending in successful tape-out and product bring-up .
Responsibilities
Learn high performance RISC-V Arch and algorithms
Define and drive the design of advanced and super complexed blocks from micro-architecture phase to tape out.
Work closely with various teams to drive execution (SW, Architecture, verification, BE, FPGA, postSi etc)
Devise execution indicators and monitor and report execution progress to enable prioritization and clear decision making.

Required Physical Design Team Leader
Description
We are reimagining high-performance computing (HPC & AI). Our accelerated compute solutions leverage intelligent adaptive algorithms to vastly accelerate supercomputers, driving them forward into a new generation. We have developed a novel software-defined hardware architecture that is achieving significant advancements in both the HPC and AI domains.
Everything we do is guided by three core values:
Professionalism: We strive for exceptional results through professionalism and unwavering dedication to quality and performance.
Unity: Collaboration is key to success. That's why we foster a work environment where every employee can feel valued and heard.
Impact: We're passionate about developing technologies that make a meaningful impact on industries, communities, and individuals worldwide.
Come help lead the design and development of one of the most ambitious products at the forefront of compute technology!
Responsibilities
Lead a physical design team responsible for all stages of the physical design process-floor planning, placement, clock tree synthesis, routing, timing, and power optimization at both block and subsystem levels.
Mentor and guide a team of physical design engineers through all stages of the design flow.
Collaborate closely with project managers and other technical leads to ensure timely delivery and successful completion of projects.
Drive the technical direction of the physical design process to ensure efficient, high-quality outcomes.
Develop and implement best practices for physical design and continuous improvements of design workflows.
Optimize designs for performance, power, and area (PPA) to meet project goals.
Ensure compliance with DRC (design rule checking) and LVS (layout versus schematic) requirements. .
Drive timing analysis and closure, working closely with the RTL design team to resolve timing violations.

Required Senior Verification Engineer (FPGA)
Were seeking passionate professionals who thrive in a fast-paced, creative, and collaborative environment - those who want to be part of the next generation of airspace security innovation.
Join us and help make the world a safer place.
Work with the worlds leading cyber-takeover counter-drone technology provider and shape the future of safe airspace.
Lead the functional sign-off for complex FPGA designs by architecting scalable, reusable UVM-based verification environments.
You will build the essential infrastructure that empowers FPGA designers to efficiently and accurately verify their own modules.
Key Responsibilities:
Architecture: Build and maintain advanced simulation environments from scratch using UVM and SystemVerilog.
Strategy & Coverage: Develop comprehensive verification plans to drive the team toward 100% functional and code coverage closure.
CI/CD & Automation: Architect robust automated regression testing environments and integrate them into CI/CD pipelines (e.g., Jenkins).
Tool Expertise: Serve as the internal authority for EDA tools (like Questa) and manage high-performance simulations.
Debugging: Perform deep root-cause analysis on complex failing tests and hardware logic.

We are seeking an exceptional architect to join our architecture team and shape the future of quantum control. We have a unique opportunity to shape the architecture of next-generation quantum computers toward utility-scale quantum computing.
In this role, you will define the logic architecture of the devices that are the heart of the next-generation quantum control platform. Designing the devices, including the pulse processor and their interfaces, requires a deep understanding of quantum computing, the system tradeoffs, and product requirements.
In this role, youll collaborate with Product and with the other members of the architecture team to define the requirements and the roles and responsibilities of each component. Youll identify system-level tradeoffs and identify solution alternatives. Youll work closely with the logic design and compiler teams to define a winning architecture.
Responsibilities: 
Architecture for the next-generation quantum control platform devices, ASIC, and logic components.
Define system-level architecture and features, providing detailed specifications to the various R&D teams.
Collaborate with the product and research teams to transform high-level requirements into architecture and spec definitions, and present tradeoffs.
Work with partners and vendors on requirements, integration architecture and joint development to optimize the product capabilities.

Join our elite team, where we transform modern technology and bring groundbreaking innovations to life. As a Senior Hardware Engineer, you'll be part of a visionary group driving the future of AI, robotics, and autonomous driving. Our Israel-based team thrives on solving complex challenges while promoting a collaborative and inclusive environment where bold ideas flourish. This is your chance to contribute to a legacy of excellence and make an indelible impact on the world!

What you'll be doing:

Crafting, developing, and implementing advanced hardware solutions that power next-generation AI and computing platforms.

Collaborating with cross-functional teams to ensure seamless integration of hardware components.

Conducting rigorous testing and validation to deliver flawless performance in our products.

Analyzing and optimizing system performance to meet strict quality standards.

Partnering with software engineers to determine hardware requirements and ensure successful implementation.

Leading and mentoring junior engineers, encouraging a culture of innovation and collaboration.

We are rebuilding the way chips get built, and were looking for a senior engineer to help lead that transformation.

This is a full-stack platform role on the team responsible for the development environment behind our silicon. You will help define how agentic orchestration and durable execution become first-class parts of the chip-design workflow.

Were looking for someone who has built complex systems before - across backend, frontend, and infrastructure - and is ready to set the technical direction for what comes next.

What You'll be doing:

Architect and lead full-stack EDA platforms end to end, from data models and backend services to the frontends engineers use every day - while making key technical and build-vs-buy decisions.

Own the infrastructure these platforms run on at scale, including CI/CD, containerization, observability, on-prem compute, and cloud-native Kubernetes environments.

Set engineering standards across the team by leading design reviews, improving reliability and developer experience, and mentoring engineers.

Act as a technical leader across silicon, backend, and design-automation teams, helping turn fragile manual flows into dependable automated systems used by many engineers.

Are you passionate about working on a team that is at the cutting and bleeding edge of hardware technology? Our Engineering team works on groundbreaking innovations involving crafting creative solutions for DFT architecture, verification and post-silicon validation on some of the industry's most sophisticated semiconductor chips. We are looking for an experienced DFT Engineer to join the ATPG team. The position includes taking part in development of the next generation DFT technologies and working closely with a wide range of our groups and aspects - chip design, backend, verification, and production testing.



Working on the most advanced technologies and complex products, our DFT solution are unique and innovative internal developments, and we are continuously improving and evolving the solution to meet the challenging goals. If you find groundbreaking Technologies, and next generation products interesting, then this is the team for you. Take opportunity to join our team for an exciting and educational environment, where every individual has significant contribution to our products and achievements!



What youll be doing:

You will be in charge of state of the art Design for Test/ATPG flows and implementation.

Take full ATPG ownership end to end on a project, from Arch & planning to pattern generation, verification and post Silicon bring up and diagnosis.

Inventing and maintaining automation flows that provide the short test time to production.

Our Chip Design team is growing! Join our high-end product design team and help shape the next generation of advanced semiconductor solutions.
About us
The company has been delivering tens of millions of chips annually to leading tier-1 customers in the Security, Cloud, and Computing domains. We specialize in semi-custom, high-quality solutions, going above and beyond to meet our customers needs. Our Israel Design Center is fully self-contained, covering everything from product definition and architecture to design, software, validation, and TEST - meaning real ownership and no daily late-night calls across time zones We also pride ourselves on a warm, open culture where everyone knows each other, and every engineer can clearly see the impact of their work on the final silicon. We are looking for experienced Chip Design Engineers to join our team and take a key role in RTL design, new IP development, and SOC integration As part of the design team, you will be deeply involved in architectural exploration, protocol evaluation, and hands-on design work across multiple chip blocks. Responsibilities
* RTL design and implementation of new IPs
*  SOC integration and design ownership of chip subsystems
* Exploration and evaluation of new protocols and architectural solutions
* Close collaboration with architecture, verification, validation, software, and back-end teams
* Delivering high-quality, best-in-class RTL that meets performance, power, and area goals Why Join Us?
* Work on advanced, high-volume silicon products
* Real impact on end-to-end chip development
* Collaborative environment with strong technical ownership
* A stable yet agile organization with a human, people-first culture

our company's Automated Driving group in Haifa is looking for an experienced DFT Engineer.
This is an exciting opportunity to join a team of highly talented engineers, working on one of the most cutting edge technologies - Autonomous Vehicle (AV) SoC.
At our company's Automated Driving group, we know that the idea of a fully autonomous car is no longer science fiction, but a reality that we are creating!
We have spent more than 15 years developing the world's most Advanced Driver Assistance Systems (ADAS) and we are now leading the computer vision and machine learning domain, reaching fully automated driving experience (AV).
What will your job look like:
Develop all the necessary HW / FW / SW for the different modules
Verify and Validate our design
Debug and analyze coverage and yield loss
As a cutting edge technology company, we are working only with the very advanced DFT tools and features, while developing our own methods and DFT concepts - as it required by the Automotive and Safety related products market (ISO26262).

Scd is Hiring Mixed-Signal Test & Validation Engineer (IR ROIC) Job Description: We are looking for a hands-on Test & Validation (post silicon) Engineer to join our VLSI design group, focusing on Infrared Readout Integrated Circuits (IR ROICs).
This role sits at the intersection of circuit design, silicon validation, and system-level characterization. You will work closely with analog and mixed-signal designers to ensure testability is built into the design from early stages, and later take ownership of silicon bring-up, validation, and electro-optical characterization.
Responsibilities: • Define and drive DfT for analog/mixed-signal: observability, controllability, test modes, and measurement access • Contribute in design/layout reviews to ensure testability; define validation strategy pre–tape-out • Lead first silicon bring-up; execute block and full-chip validation; debug with design teams • Plan and run characterization across PVT and modes; analyze noise, linearity, DR; correlate sim ? silicon • Collaborate with Physics/System teams on electro-optical and radiometric performance of the hybridized ROIC • Build and maintain lab setups; develop automation (Python) for data acquisition and analysis; document methods/results • Perform failure analysis and debug issues to identify root causes and implement corrective actions. • Document test results, methodologies, and procedures for future reference. • Stay updated with the latest advancements in VLSI testing technologies and methodologies.

Designs and develops integrated circuits. Oversees definition, design, verification, and documentation for ASIC development. Determines architecture design, logic design, and system simulation. Defines module interfaces/formats for simulation. Contributes to the development of multidimensional designs involving the layout of complex integrated circuits. Evaluates all aspects of the process flow from high-level design to synthesis, place and route, and timing and power use. Analyzes equipment to establish operation data, conducts experimental tests, and evaluates results. May also review vendor capability to support development.
- Knowledge: Having wide-ranging experience, uses professional concepts and company objectives to resolve complex issues in creative and effective ways.
Strong project management skills
Leads design and delivery of new
products/process
Functional breadth and depth, plus expert in complementary fields
Applies broad concepts and theories to achieve innovative and effective solutions to complex problems - Job Complexity / Contribution : Works on complex issues where analysis of situations or data requires an in-depth evaluation of variable factors. Exercises judgment in selecting methods, techniques and evaluation criteria for obtaining results. Networks with key contacts outside own area of expertise.
Will champion significant projects, programs and business initiatives using demonstrated creativity and ingenuity
Team leader
Leads major projects
Influences or impacts others'
priorities, decisions or activities
Escalation point for complex issues
Coaches and mentors other junior team members - Supervision : Incumbents provide a leadership role for the work group through knowledge in his/her area of specialization. Generally free to determine work priorities based on general direction from managers.
Determines methods and procedures on new assignments
Consults with management on long-range goals
Determines own priorities, both tactical and strategic

We are seeking a highly skilled and motivated VLSI Backend Team Leader to join and lead our dynamic team.
As part of this position, you will lead a team of experienced engineers working on parallel projects, and play a crucial role in the design and implementation of complex designs, flow development, and the latest technology node bring-up and integration.
The Backend team leader will be required to do 50% hands on work and 50% managerial work.

We are looking for highly motivated engineers who love the challenges and the opportunity of a small company.
Join us and be a part of a small and dynamic team, which revolutionizes the parallel processor architecture.

We are looking for highly motivated engineers who love the challenges and the opportunity of a small company.
Join us and be a part of a small and dynamic team, which revolutionizes the parallel processor architecture.

As an ASIC STA Engineer, you will have responsibilities spanning all aspects of SoC design in terms of timing.
Key responsibilities include timing sign-off, STA and sign-off flow development, ownership of Full chip, IP, and block level timing constraints both for regular and custom timing requirements from synthesis to sign-off to achieve sign-off quality timing constraints.
You will closely interact with RTL designer to understand design intent and clock structure, with CAD to understand and develop flow, and with Physical design team to close and sign-off timing. You will also come up with ideas and plans to verify your own timing constraints. You will innovate timing constraints and flow to facilitate timing closure and any potential pessimism or fall outs in timing analysis.