רובוט
היי א אי
stars

תגידו שלום לתפקיד הבא שלכם

לראשונה בישראל:
המלצות מבוססות AI שישפרו
את הסיכוי שלך למצוא עבודה

מהנדס וריפיקציה

מסמך
מילות מפתח בקורות חיים
סימן שאלה
שאלות הכנה לראיון עבודה
עדכון משתמש
מבחני קבלה לתפקיד
משרות על המפה
 
בדיקת קורות חיים
VIP
הפוך ללקוח VIP
רגע, משהו חסר!
נשאר לך להשלים רק עוד פרט אחד:
 
שירות זה פתוח ללקוחות VIP בלבד
AllJObs VIP

חברות מובילות
כל החברות
כל המידע למציאת עבודה
כל מה שרציתם לדעת על מבחני המיון ולא העזתם לשאול
זומנתם למבחני מיון ואין לכם מושג לקראת מה אתם ה...
קרא עוד >
לא מסתדרים עם הקולגות שלכם בעבודה?
תקשורת שעובדת בשבילך תמשיך לעבוד בשבילך לא רק ב...
קרא עוד >
טעויות נפוצות בניהול קריירה
הדרך לחיים של חוויות והזדמנויות עוברת דרך תכנון...
קרא עוד >
לימודים
עומדים לרשותכם
חברות מגייסות
מיין לפי: מיין לפי:
הכי חדש
הכי מתאים
הכי קרוב
טוען
סגור
לפי איזה ישוב תרצה שנמיין את התוצאות?
Geo Location Icon

לוח ללקוחות VIP בלבד
סגור
דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
סגור
v נשלח
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
3 ימים
Location: Yokne`am
Job Type: Full Time
We are looking for a strong hands-on verification manager to lead the growing SDK Verification team.
This role combines leadership with deep technical involvement, working closely with SDK design and architecture teams while building expertise in networking protocols and networking technologies.
What Youll Be Doing
Lead, mentor, and grow a team of verification engineers
Promote quality, automation, and scalability
​Oversee development and optimization of APIs, tools, and libraries, and Maintain OS verification infrastructure​
Improve automation workflows for fast and reliable SDK releases and Drive evolution of CI/CD pipelines
​Work closely with hardware, firmware, DevOps, and software teams
Align on verification methodologies and infrastructure improvements
​Stay hands-on while leading
Guide design reviews and architecture discussions and Define best practices for verification excellence.
Requirements:
B.Sc. or higher in Computer Science / Software / Electrical Engineering (or similar)
8+ years in software development or verification and 3+ years in technical leadership/management
​Strong Python and C/C++
Experience with large-scale verification or automation frameworks
Strong networking background (L2 / L3)
Solid Linux knowledge
CI/CD & DevOps tools (Jenkins, Git, Gerrit, Docker)
Strong communication and organization and ability to align multiple teams and deliver results
Ways to Stand Out from the Crowd:
Experience managing verification teams in HW/SW environments
Background in scalable or distributed systems
Experience with multi-node testing or performance validation
Strong debugging skills (especially concurrency issues)
Deep understanding of networking and system architecture.
This position is open to all candidates.
 
Show more...
הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8644435
סגור
שירות זה פתוח ללקוחות VIP בלבד
סגור
דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
סגור
v נשלח
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
3 ימים
Location: Yokne`am
Job Type: Full Time
Required Senior Manager, DPU Performance and System Validation
Join us as a DPU Performance and SV Manager and play a pivotal role in inventing the future of innovative computing technology! This is an outstanding opportunity to lead a dynamic team in Israel, boosting the performance of the entire DPU Chip Develop department to new heights.
What you'll be doing:
Lead and manage a group of 25+ engineers, coordinating two key teams: Performance in DV and Simulation Model, and System Validation.
Collaborate with the ARCH team to define and implement the Performance Verification (PV) Plan, ensuring comprehensive test coverage and platform integration.
Coordinate the performance emulation and functional validation processes, ensuring seamless readiness for TapeOut from a performance perspective.
Participate in post-silicon performance debugging, contributing to the flawless execution of performance improvements.
Develop and unify performance debug processes across all platforms, ensuring consistency and efficiency.
Requirements:
Proven experience in performance management within the chip build industry.
Outstanding leadership skills with the ability to manage and encourage a diverse team of engineers.
Solid technical expertise in DPU performance and system validation, accompanied by a history of effective implementation, or equivalent experience.
Strong collaboration abilities, with the capability to engage effectively with cross-functional teams to identify and achieve performance objectives.
Ambitious approach and the drive to achieve world-class performance standards.
B.Sc. in Electrical Engineering, Computer Engineering, or equivalent
15+ years of overall experience in ASIC development/validation, including 5+ years of management experience.
This position is open to all candidates.
 
Show more...
הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8644412
סגור
שירות זה פתוח ללקוחות VIP בלבד
סגור
דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
סגור
v נשלח
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
Location: Giv'atayim
Job Type: Full Time
We are seeking a highly skilled and experienced PCIe Validation Engineer to join our Silicon and System Validation team, playing a key role in the companys core products. This position involves building a complex validation environment from scratch for pre and post silicon, defining test plan execution and debugging failures while collaborating with cross-functional teams. In this role, you will take ownership of the validation from Emulation thru bring-up to product release in quality that meets our standards.

Responsibilities
Develop and debug PCIe initialization and reset flows.
Develop and execute test plans for pre-silicon and post-silicon validation, including targeted tests for validating specific PCIe functionality.
Take part in Silicon bring-up and power-on stage on Silicon arrival.
Collect and analyze validation data to identify trends and root causes and to uncover opportunities for improving silicon quality, reliability and performance.
Drive the debugging and resolution of complex silicon issues, collaborating with cross-functional teams across design, architecture, software and firmware.
Requirements:
B.Sc. or M.Sc. in Electrical Engineering or Computer Engineering, or equivalent.
At least 3 years of experience in implementing PCIe initialization code and PCIe subsystem, PHYs training, and calibration software.
Experience in Physical Layer (PHY) design and debug.
Experience in HW-SW integrations.
Strong debugging skills using high-end lab equipment (Analizer, Scope, BERT).
Experience in Silicon power-on - advantage.
Strong knowledge of Python, C and C++ - advantage.
This position is open to all candidates.
 
Show more...
הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8644114
סגור
שירות זה פתוח ללקוחות VIP בלבד
סגור
דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
סגור
v נשלח
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
3 ימים
Location: Yokne`am
Job Type: Full Time
Our DOCA Verification team is seeking a highly motivated and hardworking Software Engineer with hands-on capability technical experience, to verify the design and implementation of the next generation Data Processing Unit Software, with wide range of features related to cyber security and embedded systems. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting data centers across the world. We're united in our quest to transform the way Smart Adapters are used.
What you'll be doing:
Collaboration & Communication: Work closely with software, architecture, product and DevOps teams to define test requirements, coordinate releases, and ensure high-quality product delivery.
End-to-End Feature Ownership: Deep dive into feature sets, taking responsibility from test plan development to final implementation and full automation
Develop and Automate Testing: Design, implement, and maintain automated test scripts and frameworks (primarily in Python) to verify the correct functionality of our software products
System & Integration Validation: Validate software functionality and performance through system-level and integration testing, utilizing Linux-based environments and virtualization tools.
Defect Analysis: Analyze test results, open bugs and track issues to closure, ensuring robust and scalable solutions.
Continuous Improvement: Drive design verification flows, contribute to methodology improvements, and leverage planning/tracking systems to manage release progress and build release indicators.
Test Environment Management: Set up, maintain, and optimize test environments using Linux, Docker, virtual machines, and other modern tools.
Regression Monitoring: Operate, monitor, and analyze failures in the nightly regression system, providing methodical root-cause analysis across hardware, OS, and software layers.
Requirements:
Bachelors Degree in EE, CS or CE or equivalent work experience
5+ years of experience in software testing or software engineering
Strong programming skills in C/C++
Solid experience with Linux-based environments, including system tools and command-line utilities.
Methodical troubleshooting skills in Linux environments with a disciplined approach to evidence-based failure analysis.
Detail oriented and comfortable multitasking in a dynamic environment with shifting priorities and changing requirements.
Ability to work with various teams and have strong analytical, debugging and problem-solving skills with attention to details.
Excellent communications skills, self-motivated and well organized.
Knowledge in operating systems and specifically with Linux.
Ways to stand out from the crowd
Prior software testing experience, with an understanding of Software Testing Tools and Methodologies.
Python or other scripting languages (such as Shell)-advantage.
Experience in CI methodology & servers (e.g. Gerrit, Jenkins etc.).
Knowledge of our DPU products.
This position is open to all candidates.
 
Show more...
הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8643881
סגור
שירות זה פתוח ללקוחות VIP בלבד
סגור
דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
סגור
v נשלח
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
3 ימים
Location: More than one
Job Type: Full Time
We are looking for best-in-class Physical Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.
What you'll be doing:
You will be responsible for chip floorplan and pin placement, ensuring integration within our innovative builds.
We expect you to run, debug, and approve Physical Verification flows across multiple projects, ensuring strict adherence to our high standards.
You will perform physical layout implementation, planning and optimization, contributing to the development of our groundbreaking chips.
Requirements:
What we need to see:
B.SC./ M.SC. in Electrical Engineering
You should have at least 5+ years of hands-on layout experience, demonstrating your proven expertise.
A strong background in Physical Verification methodology, including ERC, LVS and DRC, is necessary.
In-depth knowledge of advanced silicon process technologies.
Familiarity with physical build EDA tools, including Synopsys and Cadence.
A great teammate who thrives in a collaborative environment.
AI tools orientation or alternatively a desire to learn.
Ways to stand out from the crowd:
Experience in Linux environments.
TCL, Python, shell scripting abilities.
Experience with data collection and analysis
Understanding of the chip and die verification process.
This position is open to all candidates.
 
Show more...
הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8643787
סגור
שירות זה פתוח ללקוחות VIP בלבד
סגור
דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
סגור
v נשלח
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
3 ימים
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
Our Chip Design group is looking for best-in-class Verification Engineers to join our outstanding Silicon Engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a significant part in designing and verifying our groundbreaking and innovative chips, and enjoy working in a meaningful, growing, and highly professional environment where you make a huge impact in a technology-focused company.
What youll be doing:
Verification for chip blocks/entities according to specifications under challenging constraints and with high orientation to performance.
Daily work involves acquaintance with all aspects of chip development: Design, Micro- Architecture, Firmware, Production, and Verification.
Engage in cutting-edge PCIe generation working on latest PCIe gen7.
Requirements:
What we need to see:
B.SC./ M.SC. in Computer Engineering/Electrical Engineering/Communication Engineering or equivalent experience.
2+ years of experience in Verification.
High Level of English.
High motivation to grow and excel.
Ways to stand out from the crowd:
Knowledge in PCI Express standard.
Validated experience in Verification or RTL Frontend ASIC Design (Chip Design).
Background in Specman/ UVM.
Background in RTL uArch & coding.
This position is open to all candidates.
 
Show more...
הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8643761
סגור
שירות זה פתוח ללקוחות VIP בלבד
סגור
דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
סגור
v נשלח
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
3 ימים
Location: Tel Aviv-Yafo
Job Type: Full Time
Required Senior Chip Design Verification Engineer
job requisition id
We have been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. Its a unique legacy of innovation thats fueled by great technology-and amazing people. Today, were tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing whats never been done before takes vision, innovation, and the worlds best talent. As an employee, youll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. Come join the team and see how you can make a lasting impact on the world.
Join us and become a pivotal part of our Networking Silicon engineering team in Tel Aviv, Israel. We are renowned for developing the industry's top high-speed communication devices, known for their outstanding efficiency and minimal latency. This role offers an outstanding opportunity to be involved in groundbreaking projects, collaborating with versatile experts to foster innovation and excellence. As a Senior Chip Design Verification Engineer, you will be immersed in a dynamic and encouraging environment where your efforts will have a meaningful impact.
What you'll be doing:
Play a crucial role in developing our next-generation chip controller.
Engage in building and verification tasks within a challenging, multi-disciplinary context.
Collaborate closely with cross-functional teams to advance our networking and GPU networking chips and systems.
Drive the implementation of sophisticated verification environments to ensure flawless functionality.
Mentor and guide junior engineers, encouraging a collaborative and inclusive team atmosphere.
Requirements:
What we need to see:
B.Sc. or M.Sc. in Computer Engineering, Electrical Engineering, or Communication Engineering, or equivalent experience.
A minimum of 5 years of proven experience in ASIC Verification.
High proficiency in English.
Demonstrated ability to work well within a team, exhibiting strong communication and interpersonal skills.
A proactive and ambitious approach, with strong attention to detail and a dedication to excellence.
Background in Specman - advantage
Knowledge in industry Standard Protocol such as I2C, SPI, AMBA and RMII - advantage.
Knowledge in HDL (Verilog/VHDL) - advantage.
This position is open to all candidates.
 
Show more...
הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8643732
סגור
שירות זה פתוח ללקוחות VIP בלבד
סגור
דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
סגור
v נשלח
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
3 ימים
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
We are looking for best-in-class Chip Verification Engineers to join our outstanding Networking Silicon Engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a significant part in verifying our ground-breaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a huge impact in a technology-focused company.
What youll be doing:
Verification for chip blocks/entities according to specifications
Integrations and Full-Chip models
Interaction with organization-wide groups.
Requirements:
What we need to see:
B.SC./ M.SC. in Computer Engineering/ Electrical Engineering/ Communication Engineering or equivalent experience
2+ years experience in verification or similar position
High Level of English
Ability to work as part of a team
Ways to stand out from the crowd:
Validated experience in Verification
Experience in Specman
Background in UVM/SV
Knowledge in HDL (Verilog/VHDL).
This position is open to all candidates.
 
Show more...
הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8643694
סגור
שירות זה פתוח ללקוחות VIP בלבד
סגור
דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
סגור
v נשלח
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Required Senior Emulation Verification Engineer, Cloud
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
Responsibilities
Plan and execute the verification of digital design blocks by understanding specifications and working with design engineers to define key verification scenarios.
Develop, execute, and debug full-chip/system on a chip (SoC) tests on emulation platforms.
Collaborate with design engineers to debug tests and ensure functional correctness of design blocks.
Define and implement various coverage measures to capture stimulus and corner-case scenarios. Work with software and post-silicon validation teams to reproduce failures on emulation.
Drive coverage analysis to identify verification gaps and demonstrate progress towards tape-out. Explore new verification and emulation methodologies and implement them.
Requirements:
Minimum qualifications:
Bachelor's degree in Computer Science, Electrical Engineering, or equivalent practical experience.
8 years of experience with full-chip/SoC verification (e.g., test definition, creation, execution, and debug).
Experience developing full-chip/SoC tests using these environments/tools: ASM, C, C++, Perspec, Threadmill, OS, or drivers.
Experience with execution and RTL/firmware/software debug on hardware emulation (e.g., ZeBu Server, Palladium, Veloce) or FPGA (e.g., EP, HAPS, Protium).
Experience with design debug tools (e.g., Verdi, Verisium).
Experience with coding and scripting in C, C++, Perl, TCL, or Python.
Preferred qualifications:
Experience in embedded software and firmware (e.g., Linux drivers, firmware validation).
Experience with associated electronic design automation (EDA) tools, automation, and flow enhancements.
Experience with coding in Verilog/SystemVerilog for design.
Understanding of SoC architecture and interfaces (e.g., CPU, DDR, PCIe, interconnect, Ethernet, etc.).
Understanding of register transfer level (RTL) to emulation/field-programmable gate array (FPGA) flows including emulation test benches (e.g., transactors/accelerated verification intellectual properties (VIPs), hybrid, in-circuit emulation).
This position is open to all candidates.
 
Show more...
הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8643592
סגור
שירות זה פתוח ללקוחות VIP בלבד
סגור
דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
סגור
v נשלח
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Required Senior Design Verification Engineer, Networking, Cloud
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As a Senior Design Verification Engineer, you will be a part of Research and Development team to verify digital designs, develop constrained-random test environments and drive system testing to closure. You will collaborate with design and verification teams, manage the verification life-cycle and uncover bugs through corner-case testing.
Responsibilities
Plan and execute the verification of digital design blocks by understanding specifications and working with design engineers to define key verification scenarios.
Develop and refine random verification environments using SystemVerilog/UVM or Specman to ensure effective test coverage.
Define and implement various coverage measures to capture stimulus and corner-case scenarios.
Collaborate with design engineers to debug tests and ensure functional correctness of design blocks.
Drive coverage analysis to identify verification gaps and demonstrate progress towards tape-out.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering or equivalent practical experience.
8 years of experience verifying digital logic at Register-Transfer Level (RTL) using SystemVerilog or Specman/E for Field Programmable Gate Arrays (FPGAs) or Application-specific integrated circuit (ASICs).
Experience with Central Processing Unit (CPU ) implementation, assembly language, or compute System on a Chip (SOC).
Experience verifying digital systems using standard IP components/interconnects (e.g., microprocessor cores, hierarchical memory subsystems).
Experience creating and using verification components and environments in standard verification methodology.
Preferred qualifications:
Masters degree in Electrical Engineering or Computer Science.
2 years of experience verifying digital logic at Register-Transfer Level (RTL) using SystemVerilog or Specman/E for Field Programmable Gate Arrays (FPGAs) or Application-specific integrated circuit (ASICs).
Experience with UVM, SystemVerilog, or other scripting languages (e.g., Python, Perl, Shell, Bash, etc.).
This position is open to all candidates.
 
Show more...
הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8643584
סגור
שירות זה פתוח ללקוחות VIP בלבד
סגור
דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
סגור
v נשלח
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Required Senior Post-Silicon Validation Engineer, Networking
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
We are building a new team to lead the post-silicon validation efforts for our cutting-edge product. We're looking for highly motivated and talented engineers to join us in ensuring the quality and functionality of our next-generation networking silicon. This is a unique opportunity to be part of a foundational team and make a significant impact.
As a Silicon Validation Engineer, you'll play a pivotal role in the validation of our custom silicon solutions that power our cloud infrastructure bringing it to the highest quality level. Your expertise in post-silicon validation will be essential in identifying and resolving issues before they impact our customers, ensuring a seamless and high-performance cloud experience.
We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including our Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.
Responsibilities
Conduct in-depth analysis into the architecture and microarchitecture of complex hardware units and features, such as packet processing pipelines and advanced networking capabilities.
Develop comprehensive post-silicon validation test plans based on a thorough understanding of the design and specifications.
Write, execute, and debug validation tests using Python or C/C++, running on Pre-Silicon (Pre-Si) emulation platforms and primarily on the silicon.
Lead the bring-up, troubleshooting, and debug efforts on silicon, identifying root causes of hardware and software issues.
Contribute to the development of test infrastructure and methodologies to improve validation efficiency and coverage.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical/Computer Engineering, Computer Science, related fields, or equivalent practical experience.
8 years of experience with functional tests for silicon validation (i.e., writing in C or C++ or Python or similar).
8 years of experience in silicon bring-up, functional validation, characterizing, and qualifying silicon.
Preferred qualifications:
Ability to learn new systems quickly and work on their own in a changing environment.
Excellent communication and collaboration skills.
Excellent problem-solving skills.
Passion for technical issues with and a strong sense of ownership.
Interest in hardware and a passion for transitioning into silicon validation.
This position is open to all candidates.
 
Show more...
הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8643529
סגור
שירות זה פתוח ללקוחות VIP בלבד
סגור
דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
סגור
v נשלח
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Required Silicon Validation Engineer, Networking
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
Responsibilities
Define, develop and execute post-silicon validation content on both pre-silicon setups and real silicon platforms in the lab.
Drive silicon from being a chip towards becoming a product.
Debug and investigate issues along cross-functional teams such as Firmware (FW), Software (SW), Design, Design Verification (DV), Architecture (ARCH) and multiple production teams.
Provide a quality functional coverage for our designs.
Test development and automation, design, implement, and maintain validation tests using scripting and programming languages (e.g., Python, C/C++).
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical/Computer Engineering, Computer Science, related fields, or equivalent practical experience.
Experience with functional tests for silicon validation using C or C++.
Experience in silicon bring-up, functional validation, characterizing, and qualifying silicon.
Preferred qualifications:
Experience in packet processing, data path, packet buffering, scheduler, networking protocols offload engine.
Experience in PCIe interface, PCIe Internal Switch, PCIe components RP/EP, and link establishment.
Experience with hardware prototyping, including hardware/software integration (i.e., pre-silicon use of emulation, software-based test, and diagnostics development).
Knowledge of L1/L2 layers, Ethernet SerDes (Serializer/Deserializer), Media Access Control+Physical Coding Sublayer (MAC+PCS).
This position is open to all candidates.
 
Show more...
הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8642066
סגור
שירות זה פתוח ללקוחות VIP בלבד
סגור
דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
סגור
v נשלח
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Required Senior SoC Design Verification Engineer, Cloud
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
In this role, you will work as part of a Research and Development team. You will build verification components, constrained-random testing, system testing, and drive verification closure. You will verify digital designs, collaborate closely with design and verification engineers on projects, and perform direct verification. You will build constrained-random verification environments that exercise designs through their corner-cases and expose all types of bugs. You will manage the full life-cycle of verification, which can range from verification planning, test execution, to collecting and closing coverage.
Responsibilities
Plan the verification of digital design blocks by fully understanding the design specification and interacting with design engineers to identify important verification scenarios.
Create and enhance constrained-random verification environments using SystemVerilog and UVM, or formally verify designs with SVA and industry leading formal tools.
Identify and write all types of coverage measures for corner-cases.
Debug tests with design engineers to deliver functionally correct design blocks.
Close coverage measures to identify verification holes and to show progress towards tape-out.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering or equivalent practical experience.
8 years of experience with creating and using verification components and environments in standard verification methodology.
Experience verifying digital logic at RTL level using SystemVerilog or Specman/E for FPGAs or ASICs.
Preferred qualifications:
Master's degree or PhD in Electrical Engineering, or a related field.
3 years of experience with creating and using verification components and environments in standard verification methodology.
Experience with verification techniques, and the full verification life cycle.
Experience with performance verification of ASICs and ASIC components.
Experience with Application-Specific Integrated Circuit (ASIC) standard interfaces and memory system architecture.
Experience in four or more System on a chip (SOC) cycles.
This position is open to all candidates.
 
Show more...
הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8642040
סגור
שירות זה פתוח ללקוחות VIP בלבד
סגור
דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
סגור
v נשלח
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Required Silicon Validation and Automation Engineer
Responsibilities
Run, monitor, and analyze nightly Continuous Integration (CI) regression results.
Design and implement new regression methods and supporting infrastructure/Graphical User Interface (GUI).
Identify, debug, and report issues while performing initial root cause analysis and routing to IP owners.
Develop and maintain tools for silicon validation and debug.
Maintain and enhance automation infrastructure for various regression cadences.
Requirements:
Minimum qualifications:
Bachelors degree in Electrical Engineering, Computer Engineering, Physics, a related field, or equivalent practical experience.
1 year of experience in post-silicon validation, SoC debug, or a similar role.
Experience with Continuous Integration (CI) systems and regression management.
Experience with lab equipment and platform bring-up.
Experience in scripting languages such as Python for test automation, tool development, and data analysis.
Preferred qualifications:
Experience developing software tools, including command-line interfaces and graphical user interfaces (GUIs).
Experience with version control systems (e.g., Git).
Experience with silicon screening or characterization processes.
Familiarity with various Linux distributions and embedded environments like NERF, OVSS, EDK2, etc.
Understanding of computer architecture, SoC design, and IP interfaces.
Ability to debug hardware/software issues and perform root cause analysis in a silicon environment.
This position is open to all candidates.
 
Show more...
הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8642021
סגור
שירות זה פתוח ללקוחות VIP בלבד
סגור
דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
סגור
v נשלח
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Required Senior Formal Verification Engineer, Cloud
About the job
In this role, you will perform formal verification of design properties of complex ASIC designs. You will collaborate closely with design and verification engineers to define meaningful properties that capture the design intent of a logic block and constraints on its input stimulus. You will also help define and improve design and verification methodologies that allow you to achieve formal verification closure.
Our mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of our AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.
Responsibilities
Plan the formal verification strategy and create the properties and constraints for complex digital design blocks.
Utilize formal property verification tools combined with formal verification closure techniques to verify properties.
Resolve difficult to verify properties. Contribute improvements to methodologies to enhance formal verification results.
Architect and implement reusable formal verification components.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering, Computer Science, or equivalent practical experience.
8 years of experience working on main interconnects, Direct Memory Access (DMA), controllers, and power management.
Experience capturing design specification in a temporal assertion language such as SVA or PSL.
Preferred qualifications:
Master's degree or PhD in Electrical Engineering or Computer Science.
2 years of experience working on main interconnects, Direct Memory Access (DMA), controllers, and power management.
Experience working with one or more formal verification tools, such as JasperGold, VC Formal, Questa Formal, or 360-DV.
Understanding of formal verification algorithms.
Proficiency with scripting languages, such as Python.
This position is open to all candidates.
 
Show more...
הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8642015
סגור
שירות זה פתוח ללקוחות VIP בלבד
משרות שנמחקו