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The complexity of the chip has greatly increased over the years. We are now packing tens of billions of transistors in a chip to meet the growing computing demand in a footprint that is responsible to our environment. The System-On-Chip (SOC) group is looking for a top ASIC Engineer with a curiosity about SOC design automation, RTL integration, chip build and assembly, and padring design and verification. You should have real passion for methodologies and automation solutions that enable SOC creation in the most optimized way.

In this position, you will get the opportunity to build complex networking chips and interact directly with unit-level ASIC, Physical Design, CAD, Package Design, Software, DFT and other teams.


What you'll be doing:

Implement chip level design through collaboration with cross-functional teams (Functional Design, DFT, Design Verification, System Verification, STA, and Physical Design).

Be exposed and work on a variety of functional and structural challenges. Including functional debug, physical design readiness, emulation, resolve design quality issues.

Daily work involves aspects of chip level design, including partitioning, CDC, RDC, trial synthesis, design quality checks.

Taking part in flows development and deployment.

Our Networking System Validation Group is growing, and we are hiring a Senior Switch System Validation Engineer. As a member of the team, you will take part in our core network projects which drive the growth of the company, tech and business wise. You'll gain networking and Switch u-arch knowledge while helping validate, optimize, and debug devices in different areas like Quality-of-Service, performance, logic correctness, and AI features. You will work closely with logic design, circuit design, and architects to ensure successful product development with aggressive product cycles, in both pre and post silicon stages.

You should have a good grasp of software development in different fields, such as Python Scripting, embedded software, and device firmware. It's important to have experience in a complex emulation environment and show a strong interest in creating, doing, and improving silicon validation plans.
 

What you will be doing:

Work in a combined design and verification team specializing in Switch Full Chip works.

Understand the Switch architecture and build on test plan accordingly.

Develop Full Chip test collaterals/suites, maintain regressions, debug failures and sign-off coverages.

Maintain test suites to facility Emulation and/or Silicon platforms checkout as well.

We are looking for a Senior verification engineer to join our FullChip Switch Silicon team. As a FullChip verification engineer in our Networking business unit, you'll join a group of passionate and talented engineers to design and implement the next generation state-of-the-art Switch Silicon chips. In this position, you'll make a real impact in a dynamic, technology-focused company while developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency!

What you'll be doing:

Work in a Full Chip verification team that is responsible to integrate and verify our Switch products at system level.

Work closely with multiple teams within organizations such as Architecture, u-arch, Firmware and all units inside the switch.

Responsible to drive the FullChip verification execution, including staging plan of the projects and deliveries.

We are seeking for an expert in SOC Design Integration Engineer with strong design fundamentals, to work in Switch Silicon group. You'll join a group of hardworking engineers to craft and implement the next generation innovative Switch Silicon chips. In this position, you'll make a real impact in a dynamic, technology-focused company while developing best high-speed communication devices, delivering the highest throughput and lowest latency!

What you'll be doing:

Work in a design integration team which responsible for all the switch design integration.

Work closely with multiple teams within organizations such as Architecture, u-arch, designers, BackEnd and FW.

Work on FullChip Assembly and drive cross-functional teams towards FullChip milestone execution.

Be responsible for all the switch chip design architecture focusing on timing, area and power.

We are now looking for a Senior verification technical lead for our FC Switch Silicon team. As a FullChip verification technical lead Engineer at NVIDIA's Networking business unit, you'll join a group of passionate engineers to design and implement the next generation state-of-the-art Switch Silicon chips. In this position, you'll make a real impact in a dynamic, technology-focused company while developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency!

What you'll be doing:

Work in a FC verification team within the Switch silicon.

Dynamic verification environments planning for units infrastructures and system level.

Work closely with multiple teams within organizations such as Architecture, u-arch, Full chip Micro-Architecture, BE, and FW.

Responsible to drive the FullChip verification execution, including staging plan of the projects and deliveries.

We are seeking a highly skilled and modern software engineer to develop and prototype brand new advancements in distributed training and inference using our Spectrum-X AI fabric. This role offers a rare chance to pioneer AI and networking technology, contributing to ground-breaking projects that will define the landscape of large-scale AI systems. Improve AI app-networking connection by refining communication, crafting congestion control, coding NIC firmware, and expanding switch SDK features for enhanced AI factory efficiency. Your work impacts large AI system development, scaling, and speed.

What youll be doing:

Prototype end-to-end solutions to improve distributed training and disaggregated inference performance.

Analyze and optimize communication flows across application, transport, and network layers.

Develop system software spanning communication libraries, drivers, and firmware integrations.

Collaborate with hardware, firmware, and SDK teams to co-design network features.

Validate and integrate prototypes into our AI infrastructure and products.

We are now looking for a Senior Chip Design Engineer for the Switch Silicon group.

As a Chip Design Engineer at NVIDIA's Networking business unit, you'll join a group of passionate engineers to design and implement the next generation pioneering Switch Silicon chips. In this position, you'll make a real impact in a dynamic, technology-focused company while developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency!

What you'll be doing:
Work in a combined design and verification team which develops some of the switch silicon core units.
Build reference models, verify and simulate chip blocks/entities according to specifications.
Work closely with multiple teams within organizations such as Architecture, Micro- Architecture, and FW.

Our Network Architecture, Modeling and Performance Insights group is seeking a skilled and driven hands-on Network Modeling Architect to conduct advanced network research and optimization while utilizing and enhancing our advanced simulation tools.

In this role, you will be a key contributor to defining the architecture and improving network performance for AI and High Performance Computing (HPC) workloads. You will be responsible for modeling advanced network topologies, configurations, logic and traffic patterns, and analyzing their effect on end-to-end performance. You will develop expertise in our simulation tools and write code daily to contribute directly to their development road map and prioritization, develop core features in the simulator, and expose the capabilities to additional users. You will take part in complex architecture decisions, define and verify the modeling assumptions, and put them to the test vs. real HW and SW performance. If you're passionate about tackling intricate challenges and contributing to comprehensive systems and working on innovative solutions, we want to hear from you.

 

What you'll be doing:

Analyze and model our AI and High Performance Computing offerings, deep dive into network behavior for training and inference and generate insights to directly impact the architecture of next-generation of AI systems. Conduct advanced network modeling, research and optimization using innovative simulation tools.

Write production-quality C++ and Python code daily. Hands-on modeling of advanced network topologies, configurations and traffic patterns representing real life AI workloads, and analyze their effect on the system's performance. Actively develop the simulator software solution while contributing modular and scalable code.

Actively support the HW and SW development life cycles, map existing and candidate features into the simulation domain to enable their analysis, impact assessment and optimization.

Take full independent ownership of the performance modeling roadmap for a defined set of features. Interface directly with internal clients, communicate the analysis conclusions effectively and iterate on them. Drive projects from concept to completion.

Improve the quality of the simulation as a software product, ensuring robustness and reliability.

We are looking for a Full-Chip verification & Integration Engineer to join our FullChip Switch Silicon team. As part of NVIDIAs Networking business unit, you will work alongside passionate and highly skilled engineers building the next generation of state-of-the-art switch silicon chips. This is a unique opportunity to grow in a technically rich environment and gain broad system-level exposure, and contribute to cutting-edge devices that deliver world-class bandwidth, throughput, and latency.

In this role, you will help integrate and validate complex full-chip flows at the system level, working across multiple engineering domains and learning how advanced silicon products come together from architecture to execution.

What you'll be doing:

Work in a Full Chip verification team that is responsible to integrate and verify our Switch products at system level.

Work closely with multiple teams within the organizations such as Architecture, u-arch, Firmware and all switch units and Ips.

Play a key role in validating the most complex end-to-end chip flows, gaining hands-on experience with system behavior, cross-block interactions, and real product-level scenarios.

Use modern AI-powered engineering tools and automation techniques as part of your day-to-day development and debug workflow.

Learn from experienced engineers in a collaborative environment that encourages technical growth, ownership, and continuous improvement.

The CPU team is a world-class, global organization united by a mission to push the boundaries of whats possible and shape the future of computing. We are looking for a talented, fast-learning and highly motivated Logic Design Engineer to join our team. As part of the core design team, youll take ownership of parts of the design and work closely with architecture, verification, and physical design teams, contributing to a fast-moving, technology-focused environment and helping shape future products.

What you'll be doing:

As part of the CPU core team, youll take ownership of a unit.

Contributing to the micro-architecture, writing RTL and documentation.

Working closely with verification and implementation teams to meet timing, area, performance, and power goals.

We are a global pioneer of RADAR systems for active military protection, counter-drone applications, critical infrastructure protection, and border surveillance. We are looking for ATE software engineer As a Software Automatic TEST Equipment Engineer, you will play a vital role in developing and maintaining advanced Automatic TEST Equipment (ATE) software for electronic cards and calibration systems used in our cutting-edge Active Electronically Scanned Array (AESA) radar technology. You will collaborate closely with a multidisciplinary team to ensure the functionality, accuracy, and performance of our ATE systems. Key Responsibilities:
* ATE Software Development: Design, develop, TEST, and maintain software for Automatic TEST Equipment used in electronic card testing and AESA radar calibration.
* Integration: Collaborate with hardware engineers to integrate ATE software with testing equipment and devices, ensuring seamless operation.
* Debugging and Troubleshooting: Identify and resolve software issues, system failures, and compatibility problems to ensure optimal ATE performance.
* Documentation: Maintain accurate and up-to-date documentation.
*  Quality Assurance : Implement quality control measures to ensure that ATE software meets industry standards and complies with project requirements.
* Team Collaboration: Work closely with cross-functional teams, including hardware engineers, software developers, and project managers, to meet project milestones and objectives.
* Continuous Improvement: Stay up-to-date with industry trends and emerging technologies, and contribute to the ongoing improvement of ATE software and testing methodologies.

In this role, you will tackle one of the most critical challenges in high-performance networking: Power.

This is an opportunity to join a high-impact team at the ground floor of a subject that is becoming a top priority. You won't be writing RTL; instead, you will have a holistic impact on our next-generation switches by estimating, measuring, and debugging power across the entire chip. This is a role for an engineer who wants to grow into a power expert within the world's most innovative silicon environment.

What youll be doing:

Working with the design team to define power-aware architectural methodologies and drive power-conscious design decisions across the Switch architecture.

Leading the research, development, and implementation of Switch micro-architecture power optimizations.

Participating in silicon validation to debug power-related issues and define the chip power profile.

Our team in Yokneam, Israel is looking for a Senior Power Integrity Engineer to join the Hardware Board Design team and lead PI development of next-generation Network Adapters for high-speed communication products. Our Networking division delivers end-to-end InfiniBand and Ethernet connectivity for servers and storage, including adapter cards, switches, cables and software that power data centers, cloud, big data, Web 2.0 and high-performance computing workloads.

What you'll be doing:

Lead PI definition and implementation for board-level designs, from concept and architecture through validation, qualification and release to production.

Define the power core architecture and requirements and serve as the technical lead for all power-related performance and debug activities

Work closely with power supply vendors to align solutions with our product needs, and build and optimize configuration files for programmable regulators.

Own power delivery network (PDN) design for complex network adapter boards, including rail partitioning, decoupling strategy, VR selection and dynamic load support.

Perform system-level power integrity simulations (frequency and time domain) and co-simulation of circuits and PDN models to predict noise.

Create and maintain board PI design guidelines: stackup, materials, breakout, routing, decoupling and placement rules for layout teams and external partners.

Use advanced 2D/3D EM tools to model and optimize vias, planes, connectors, sockets and other interconnect elements for power integrity.

Perform lab characterization and correlation using VNA, TDR and high‑bandwidth oscilloscopes; refine models and design rules based on measurement data.