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As part of your role, you will design, implement, and deploy products and infrastructures that will directly increase our stability and quality while reducing our time to market. You will have end-to-end ownership from individual development environments and SCM/Build/CI servers to our production system on AWS.
Your Impact:
Design and manage Continuous Integration/Deployment Services, including build, packaging, and deployment.
Design, document, implement, and maintain scripts to enhance current and future build and release processes.
Incorporate new development projects into existing build structures.
Continually evaluate tools and technologies to improve the overall release process.

we are looking for a Senior Product Owner to join our CORA (Generative) AI group. We build AI agents, frameworks and shared infrastructure that power GenAI capabilities across the company, enabling our companys product lines to adopt agentic workflows safely, reliably, and at scale.
As the groups Senior Product Owner, you will bridge the gap between emerging AI technologies and production-grade reality. You will own the roadmap for embedding agentic AI solutions across the company, balancing product impact with long-term architectural excellence. Collaborating closely with Product Managers and Engineering, you will define how agent-based intelligence can best serve our diverse product lines, while driving the development of both shared infrastructure and bespoke agentic solutions throughout the entire lifecycle - from ideation and implementation to deployment and evaluation. Your goal is to gradually build a platform that empowers every company product to adopt AI safely, reliably, and at scale.
Enable the Ecosystem:Treat other company product teams as your customers. Deeply understand their product landscapes to ensure our AI platform is flexible enough to support their unique functional needs while maintaining its robustness and architectural integrity.
Architect the Agentic Roadmap:Translate high-level product and engineering vision (the Why & How) into a concrete plan (the What & When) - forming a prioritized backlog of actionable epics, user stories, and functional specifications that guide the R&D team towards building the platform.
Strategic Liaison:Serve as the primary authority for stakeholders outside the development group, providing deep clarity on platform capabilities, framework logic, and how architectural changes will impact the broader product ecosystem.
Tactical Orchestration:Partner daily with R&D to steer the development process - supporting sprint planning, refinement, and high-quality delivery, resolving functional ambiguities, adapting the plan to real-time technical/product insights, and ensuring the team maintains high velocity while staying aligned with the strategic vision.
Champion Iterative Value:Foster continuous feedback loops between stakeholders and technical teams to enable rapid iteration and deliver meaningful value.

Required PHY System
Job Description
Join the PHY system team at a pivotal part of our silicon development. Our team focuses on the PHY and system aspects of our devices, including PHY firmware, calibrations, system definitions, operations, and post-silicon validation.
Key responsibilities include:
Working with the latest silicon technologies and processes to build large-scale, complex devices at the forefront of feasibility.
Contributing to the development of PHY firmware and system calibrations.
Participating in system definitions, operations, and post-silicon validation activities.
What Youll Do:
Youll be part of the group driving next-generation network devices within a startup-like atmosphere inside a well-established, leading corporation.
Our unique design center integrates all silicon hardware and software development disciplines under one roof. We are revolutionizing the industry by building a new internet for the 5G era, with a unified, programmable silicon architecture that will underpin our future routing products. Our devices are designed for adaptability across service providers and web-scale markets, delivering high speed without compromising programmability, buffering, power efficiency, scale, or feature flexibility.

We are looking for a Senior Security Researcher to join our specialized Red Team. In this role, you will focus on the complex boundary where hardware meets software. You will hunt for vulnerabilities in the microarchitecture, memory management, and execution pipelines of modern CPUs and GPUs, as well as in the low-level code which runs on it. If you enjoy bridging the gap between hardware primitives and kernel-level exploits, and have a passion for uncovering side-channels or architectural logic flaws, this is the team for you.

Responsibilities:
Architectural Red Teaming: Design and execute targeted adversarial campaigns against the hardware/software interface of modern SoCs, specifically focusing on CPU and GPU.
Vulnerability Discovery: Conduct deep-dive vulnerability research into microarchitectural behaviors, side-channels, and hardware-assisted security features.
Exploit Development: Develop proof-of-concept exploit chains that bridge hardware vulnerabilities into kernel space, demonstrating real-world impact.
GPU & Compute Security: Analyze GPU driver interfaces, command processors, and execution units, particularly in the context of modern compute workloads and hardware acceleration.
Mitigation Bypass & Analysis: Evaluate and attempt to bypass modern hardware mitigations (e.g., Pointer Authentication, Memory Tagging, virtualization boundaries).
Cross-Functional Collaboration: Partner with hardware engineering and software kernel teams to translate your red team findings into robust, architectural-level mitigations.

we are looking for a Senior Product Owner to join our CORA (Generative) AI group. We build AI agents, frameworks and shared infrastructure that power GenAI capabilities across the company, enabling our companys product lines to adopt agentic workflows safely, reliably, and at scale.
As the groups Senior Product Owner, you will bridge the gap between emerging AI technologies and production-grade reality. You will own the roadmap for embedding agentic AI solutions across the company, balancing product impact with long-term architectural excellence. Collaborating closely with Product Managers and Engineering, you will define how agent-based intelligence can best serve our diverse product lines, while driving the development of both shared infrastructure and bespoke agentic solutions throughout the entire lifecycle - from ideation and implementation to deployment and evaluation. Your goal is to gradually build a platform that empowers every company product to adopt AI safely, reliably, and at scale.
Enable the Ecosystem:Treat other company product teams as your customers. Deeply understand their product landscapes to ensure our AI platform is flexible enough to support their unique functional needs while maintaining its robustness and architectural integrity.
Architect the Agentic Roadmap:Translate high-level product and engineering vision (the Why & How) into a concrete plan (the What & When) - forming a prioritized backlog of actionable epics, user stories, and functional specifications that guide the R&D team towards building the platform.
Strategic Liaison:Serve as the primary authority for stakeholders outside the development group, providing deep clarity on platform capabilities, framework logic, and how architectural changes will impact the broader product ecosystem.
Tactical Orchestration:Partner daily with R&D to steer the development process - supporting sprint planning, refinement, and high-quality delivery, resolving functional ambiguities, adapting the plan to real-time technical/product insights, and ensuring the team maintains high velocity while staying aligned with the strategic vision.
Champion Iterative Value:Foster continuous feedback loops between stakeholders and technical teams to enable rapid iteration and deliver meaningful value.

Required Senior Asic Design - Silicon One
Job Description
Meet the Team
Join the Silicon One Front-End Design team, at the core of our silicon development. Our engineers cover the full spectrum of chip design: definition, architecture, micro-architecture, RTL design, verification, signoff, and validation.
We leverage cutting-edge silicon technologies and methodologies to develop the largest-scale and most advanced devices, pushing the boundaries of whats possible.
We are transforming the industry with a unified, programmable architecture powering our future routing portfolio and shaping the Internet for decades to come.
Your Impact:
Write and review micro-architecture specifications
Implement RTL (Verilog/SystemVerilog) to meet timing, performance, and power requirements
Contribute to full chip integration, timing methodology, and analysis
Collaborate with verification engineers to resolve bugs and achieve coverage closure
Work with the physical design team to close timing and PnR issues
Support design methodology evolution and best practices
Perform debug, root-cause analysis, and post-silicon validation in the lab.

Required Senior Verification Engineer - Silicon One
Job Description
Meet the Team
Join the Silicon One Front-End Design Verification team, responsible for validating the most advanced networking silicon in the world. Our team ensures functional correctness, quality, and reliability across the entire design flow. We combine state-of-the-art methodologies with a collaborative, startup-like culture, while being backed by our stability and resources.
Your Impact:
Develop advanced verification environments using SystemVerilog and UVM
Write, run, and debug testbenches to ensure complete functional coverage
Drive pre-silicon and in-lab debug activities to resolve complex issues
Collaborate with RTL, architecture, and physical design teams to achieve design closure
Support methodology development, scripting, and automation to enhance productivity
Contribute to the success, powering the next generation of Internet infrastructure.

As our Principal Architect for Identity Governance and Administration (IGA), you will be the visionary lead for our identity lifecycle management, compliance, and access control strategies. You will design the integration approach between company services and IGA, as well as between on-prem applications and the IGA cloud service, strengthening overall IGA capabilities and improving scalability.
Your Impact
Lead the architectural vision and strategy for the Identity Governance and Administration (IGA) platform.
Design and oversee the integration architecture between internal services, on-prem applications, and the IGA cloud service.
Drive the enhancement and scalability of IGA capabilities across the enterprise.
Lead proof-of-concept (POC) projects and hands-on technical exploration to introduce new technologies and advance the product architecture.
Act as a collaborative technical leader, mentoring team members and working constructively with peer architects to advance shared goals.
Anticipate, assess, and mitigate technical risks while balancing architectural excellence and business priorities.
Work with product and business stakeholders to align the architectural roadmap with company objectives.

Required DFT Engineer
Job Description
Meet the Team
We are a leading Design for Test (DFT) group, delivering End-to-End solutions for our flagship products, including CiscoSilicon One!. Our chips are strategically placed in critical AI infrastructure, powering next-generation network devices and supporting advanced AI workloads. We push the boundaries of technology, developing innovative DFT solutions that drive industry-leading programmability, scalability, and performance.
Our team operates in a hybrid model, with three days a week in the office in Azrieli Tower Tel Aviv or Caesarea, fostering collaboration and technical excellence in a startup-like atmosphere within a stable, global corporation!.
Your Impact
Expand Your Scope- we provide engineers from different backgrounds the environment to master, standardize and evolve across different features.
Lead hands-on execution from pre-silicon design to silicon bring-up and production.
Collaborate with architects and verification teams to define the DFT roadmap for our next-gen Silicon One chips.