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we are a leader in cloud-native networking software for Hyperscalers and service providers who are building the largest infrastructures in the world for network services and AI platforms. Founded in December 2015, our company disrupted some of the most challenging high-scale markets, transforming the way Networks are built, scaled, and consumed. We also built the largest network in the world, with more than half of AT&Ts backbone running on our companys Network Cloud. our company has raised $587 million in three funding rounds which enable us to dream big and bring on the most talented people.
The Role
We are looking for a hands-on Architect and to own the end-to-end architecture and technical direction of our multi-tenant, cloud-native network automation platform.
responsibilities
Defining reusable microservices, YANG/SID-based data models, REST/gRPC APIs, and event-driven workflows
Translating complex business and operational requirements into intent-based automation and closed-loop operations
Leading design reviews and mentoring cross-functional squads (Dev, DevOps, QA)
Delivering reference implementations, PoCs, and reusable design blueprints
Embedding industry standards such as TM Forum ODA, OpenAPI, OpenConfig, NetConf/gNMI
Promoting best practices around security-by-design, observability, and reliability (SRE principles)
Engaging directly with customers in early-stage discussions and architecture deep-dives
Capturing customer requirements and feeding them into the product roadmap
Defining policy-driven workflows for provisioning, drift remediation, and zero-touch operations
Building analytics pipelines using streaming telemetry, AI/ML, and rules engines
Working with product managers to break epics into stories and overseeing delivery through CI/CD and test automation.

Join the Silicon One PHY System Team, a key part of silicon development. You'll be at the forefront of defining, implementing, and validating advanced PHY and system solutions for next-generation network devices.

Your responsibilities will include:
Defining features for future devices utilizing cutting-edge silicon technologies.
Developing and optimizing PHY firmware and calibration processes.
Driving system-level definitions, operations, and post-silicon validation.
Collaborating with cross-functional teams to ensure high-quality deliverables.

As a Signal/Power Integrity Engineer, you will play a key role in ensuring the performance and reliability of our high-speed SerDes IP, covering silicon, package, and board-level analysis. You will collaborate across multiple fields, including analog design, silicon integration, PCB & package design, and mechanical engineering.

Provide implementation guidelines and feedback to silicon, package, board, and system design teams.
Design and simulate high-speed SerDes signals and perform co-simulation of package and PCB in HFSS.
Conduct feasibility studies, design verification, and sign-off processes, including lab correlation.
Perform Power Distribution Network (PDN) analyses, including model generation and time-domain simulation.
Work closely with backend, package, and board design teams for bump-out and ball-out optimization.
Drive chip-package-PCB co-design of SerDes at 112Gbps and beyond, ensuring signal and power integrity best practices.

we are a leader in cloud-native networking software for Hyperscalers and service providers who are building the largest infrastructures in the world for network services, AI platforms and SaaS offerings. Founded in December 2015, our company disrupted some of the most challenging high-scale markets, transforming the way Networks are built, scaled, and consumed. We also built the largest network in the world, with more than half of AT&Ts backbone running on our companys Network Cloud. our company has raised $587 million in three funding rounds which enable us to dream big and bring on the most talented people. We are seeking smart doers who would like to make an impact and are experienced in SaaS, networking or AI infrastructure solutions.
The Role
We are looking for the best of the best data Networking QA engineers with an ability to think out of the box, execute, and turn the out of the box thinking into real value for our customers.
Responsibilities:
As a data-networking QA engineer, you will:
Be part of R&D scrum team
Work closely with RnD, Product and Architecture to define, develop and test Network features.
Drive quality improvement efforts focusing on networking aspects of newly developed features
Run manual and automated tests on complex environments
Work on linux based platforms and use automation on python environment.

we are a leader in cloud-native networking software for Hyperscalers and service providers who are building the largest infrastructures in the world for network services and AI platforms. Founded in December 2015, our company disrupted some of the most challenging high-scale markets, transforming the way Networks are built, scaled, and consumed. We also built the largest network in the world, with more than half of AT&Ts backbone running on our companys Network Cloud. our company has raised $587 million in three funding rounds which enable us to dream big and bring on the most talented people
The Role
We are looking for a UI Platform Team Lead to join our Network Orchestration group. Our group is responsible for developing scalable, high-performance distributed systems that support complex network infrastructures.
As a Team Leader, you will drive the architecture, design, and development of core UI infrastructures and component libraries that support multiple development teams. You will lead a team of 4+ frontend engineers, define best practices, and ensure the scalability and maintainability of the UI architecture. This role requires a combination of technical expertise, leadership, and strategic vision.
Our group is growing, and you will play a key role in building and expanding the team. You'll have the opportunity to optimize and enhance key parts of our system, leveraging the latest tools and infrastructure to drive innovation and efficiency.
We embrace an agile mindset you should be comfortable with context switching, handling multiple priorities, and adapting quickly to changing requirements.
Responsibilities
Managing a team of 3 developers reporting to him.
Lead & mentor a high-performing development team in building advanced, scalable software solutions.
Lead the development and maintenance of reusable UI components, design systems, and frontend tooling.
Architect and optimize UI frameworks to ensure high performance, scalability, and maintainability.
Collaborate closely with development teams to provide seamless integration across applications.
Work closely with QA to implement best practices for testing and automation, ensuring high software quality and reliability.
Coordinate with Product Managers to align development with business priorities and roadmap planning.
Engage with UI/UX Designers to ensure an intuitive and high-quality user experience.
Work alongside the Project Manager to track progress, mitigate risks, and ensure timely delivery of features.
Define and enforce best practices, coding standards, and architectural guidelines for frontend development.
Stay updated with industry trends and emerging technologies to drive innovation in UI infrastructures.
Ensure cross-browser compatibility for all UI components.
Identify bottlenecks and optimize the frontend build process for improved developer experience.
Work with CI/CD pipelines to automate testing, deployment, and monitoring of UI libraries.

we are driving and leading the next generation networks with our solution. Founded to solve the data explosion challenge, our cutting-edge technology and solution have created a paradigm shift in the economy of networks. Through smart and high-performance bit processing on merchant silicon and commodity hardware, we enable new revenue opportunities and sustainable growth for our customers, even as Internet usage explodes. Our system is a cornerstone of this mission, and we are looking for a talented developer to take it to the next level.
About the Role
We are looking for an experienced Security Architect to lead the design and implementation of secure development practices across our product architecture and engineering workflows. This is a hybrid role combining deep technical security expertise with product-style ownership of internal security initiatives.
As a core member of our Platform and Security group You will also play a key role in ensuring our product is robust and resilient against modern security threats. You will help define security policies, integrate tools such as SCA, SAST, and other security platforms, lead POCs, and work closely with R&D teams to translate security strategy into concrete workflows and automations.
Key Responsibilities
Security Architecture: Define and enforce security policies across the development lifecycle; guide secure integration of security tooling and practices.
Internal Product Ownership: Act as the product manager for internal security automation define architecture, requirements, and priorities for workflows spanning vulnerability ingestion, risk analysis, validation, and patch integration. Collaborate closely with R&D and platform engineers to drive delivery.
Third-Party Dependency Analysis: Map and assess third-party software usage across product components; identify critical dependencies and their security posture.
Toolchain Strategy & POCs: Lead proof-of-concept evaluations for new security technologies; define onboarding criteria, evaluation metrics, and rollout plans.
DevSecOps Enablement: Partner with CI/CD and platform teams to embed security controls into build/test/release flows (Jenkins, GitHub), including validation gates and audit logging.

You'll be joining our Physical Design team within Silicon One, which is responsible for the entire backend methodology and flow development from RTL to GDS. This is a critical part of the group leading the development of high-quality VLSI designs.

You'll be part of the Silicon One team, which is at the heart of our software and ASIC design efforts.

As part of our team, youll contribute to the development of our next-generation network devicesSilicon One. Our team operates in a startup-like environment within a stable and leading corporation.

we are a leader in cloud-native networking software for Hyperscalers and service providers who are building the largest infrastructures in the world for network services and AI platforms. Founded in December 2015, our company disrupted some of the most challenging high-scale markets, transforming the way Networks are built, scaled, and consumed. We also built the largest network in the world, with more than half of AT&Ts backbone running on our companys Network Cloud. our company has raised $587 million in three funding rounds which enable us to dream big and bring on the most talented people.
The Role
As a Senior Product Designer, you will own the end-to-end design lifecycle, transforming complex networking and cloud concepts into intuitive, user-centric experiences. From research and wireframing to interactive prototyping and final UI, youll craft compelling designs that balance user needs with business goals. You will work closely with the Lead Product Designer and cross-functional teams to shape the future of network cloud solutions, ensuring scalability, usability, and visual excellence.
Responsibilities
Lead the design of new features from concept to final execution.
Conduct user research and translate insights into intuitive experiences.
Develop wireframes, prototypes, and high-fidelity UI designs.
Maintain and evolve the design system for consistency and scalability.
Advocate for design best practices, accessibility, and usability.
Present design concepts and gather feedback for iteration.

Your Impact:
Craft and develop software driving the world's most complex infrastructures.
Gain intimate knowledge of world-class silicon and programming models.
Work with architecture and design teams to define the next generation of ASIC products being developed.

As a Design for Test (DFT) Engineer, you will:
Develop and implement DFT features to ensure high-quality, testable, and manufacturable designs.
Contribute to the full product cycle, from pre-silicon design to post-silicon debug and production qualification.
Work closely with chip architects, design engineers, and verification teams to define and optimize DFT strategies.
Implement ATPG, scan compression, and memory BIST techniques to improve test coverage and efficiency.
Lead debugging and root-cause analysis of silicon failures to improve yield and reliability.
Establish DFT methodologies and best practices to enhance the efficiency of future designs.

we are a leader in high-scale disaggregated networking solutions. Founded in 2015, our company modernizes the way service providers, cloud providers and hyperscalers build networks. Supporting the largest network in the world, more than half of AT&Ts backbone traffic is running on our companys Network Cloud open disaggregated architecture. Raising $587 million in three funding rounds, we are disrupting the networking market from high-scale architecture to AI platforms, and is bringing onboard the most talented people. We are seeking people that want to make an impact on the worlds leading communication networks and are experienced in networking architecture or AI infrastructure solutions.
The Role
We are looking for the best of the best talent that is capable of dreaming out of the box and can execute on the dream and turn it into real value for our customers.
Were looking for a software engineer with a passion for software development, excellent design/coding/debugging skills and the ability to mentor and guide junior engineers.
The data-path group provides core components for our products. We design and develop the data plane features for a large-scale distributed system. For example, we own features related to forwarding information base, quality of service, security and telemetry.

What You'll Do:
You'll be joining our Physical Design team within Cisco Silicon One, which is responsible for the entire backend methodology and flow development from RTL to GDS. This is a critical part of the group leading the development of high-quality VLSI designs.

Our Backend Engineers handle all aspects of chip design, including Definition, Physical Synthesis, Place and Route, Optimization, Timing Closure, Design Floor Planning.

we are a leader in cloud-native networking software for hyperscalers and service providers building the worlds largest infrastructures. Founded in 2015, our company has transformed how networks are built and scaled including powering over half of AT&Ts backbone. With $587 million raised to date, we continue to grow and innovate with bold ideas and top-tier talent.
About the Role
We are building a large-scale backend platform for orchestrating and managing critical infrastructure state at massive scale.
As a backend engineer, you'll help design and develop high-concurrency, race-free backend services using Go (Golang), ensuring strong consistency, reliability, and performance.
You will:
Build highly concurrent backend services capable of safely handling tens of thousands of parallel operations.
Design and implement scalable APIs (REST, WebSocket, or gRPC).
Ensure consistent state management for critical infrastructure data.
Optimize system performance, reliability, and observability.
Write production-grade, maintainable, and well-tested code.
Collaborate with frontend engineers, architects, and product managers.
While initial development is focused on Go, future projects may involve other languages or stacks.
We're looking for engineers who are either experienced in Go or highly motivated to master it, and who are comfortable adapting to different technologies as needed.
Key Responsibilities
Design, develop, and maintain high-concurrency, race-free backend services using Go (Golang).
Implement scalable APIs for resource operations (REST, WebSocket, gRPC).
Ensure system consistency, performance, and reliability under high load.
Write clean, production-quality code with proper testing and observability.
Participate in system design reviews, code reviews, and team knowledge sharing.
Work closely with product managers, architects, and frontend developers.
Troubleshoot and maintain backend systems to meet SLA and performance targets.

we are a leader in disaggregated high-scale networking solutions for service providers and AI infrastructures. Founded in December 2015, our company created a radical new way to build networks by adapting the architectural model of the cloud to telco-grade networking. This solution accelerates network deployment, improves the networks economic model, and radically simplifies network operations. With customers including Comcast, Orange, and KDDI - over 80% of AT&Ts network traffic now runs through a disaggregated core powered by our company's software. our company's Network Cloud-AI solution, based on the same technology, was introduced to the market in 2023, providing the highest-performance Ethernet-based AI networking solution, and is already deployed by Hyperscalers, NeoClouds and Enterprises. Raising over $587 million in three funding rounds, our company continues to deploy the most innovative network infrastructure and is looking for the most talented people to be part of this journey.
The Role
we are seeking a highly motivated and skilled Software Engineer to join our Hardware Software team. In this role, you will be responsible for the development and integration of Board Support Packages (BSP) and low-level firmware components for our carrier-grade networking solutions. Carrier-grade routers/switches designed for service providers or data center networks. The systems integrate ASICs and high-throughput backplanes supporting multi-terabit line rates. You will work closely with hardware, platform, and system architects to bring up new hardware platforms and support advanced network functionalities in high-performance environments.
Key Responsibilities:
Develop, integrate, and maintain BSP components, including bootloaders (e.g., U-Boot), device trees, and hardware abstraction layers.
Design and implement firmware and low-level drivers for network-centric hardware platforms (e.g., ASICs, NICs, SoCs, CPLDs, FPGAs).
Support hardware bring-up and board validation, collaborating with hardware engineers and system integrators.
Work on performance optimization, debugging, and stability improvements of system software on embedded Linux platforms.
Interface with third-party SDKs and adapt them to fit within our companys software infrastructure.
Ensure compliance with industry standards and best practices for networking and embedded systems.