לוח משרות דרושים ראש צוות אלקטרוניקה משרה מלאה, לחיפוש זה נמצאו 20 משרות

Lead verification for advanced ASIC/FPGA designs in a top-tier R&D team developing high-performance network interface solutions and customer-focused hardware.
Location: Tel Aviv office or our Beer Sheva office, which is located next to the train station
Responsibilities:
Drive verification of complex, high-speed ASIC/FPGA designs
Define and implement advanced verification methodologies
Collaborate with architecture, software, and validation teams
Mentor engineers and promote technical excellence
Work with technologies like high-speed interfaces, network processors, and SoCs.

SolarEdge (NASDAQ: SEDG) is a global leader in high-performance smart energy technology, with over 3000 employees, offices in 34 countries, and millions of products installed in over 133 countries. Our diverse product offering comprises intelligent solar inverters, battery storage, backup systems, EV charging, and complete home energy management ecosystems. By leveraging world-class engineering capabilities and with a relentless focus on innovation, we strive to create a world where clean, green energy from the sun is the primary source of power for our homes, businesses, and just about everywhere we thrive. We are looking for an experienced PCB Layout Designer to join our Layout Design team within the SolarEdge Hardware division. The Layout Design team is responsible for the layout of all core Hardware products, including High-Voltage power boards, optimizers, communication circuits, and complex battery management systems (BMS). This is a highly challenging role where you will work in a dynamic, fast-paced environment, handling multiple priority projects under tight schedules while working closely with Hardware, Q&R, and Mechanical engineers. What you will do:
* Design and develop multi-layer PCB layouts from concept to production, including placement, routing, and final manufacturing outputs.
* Translate schematics into optimized layouts considering Signal Integrity (SI), Power Integrity (PI), EMI/EMC mitigation, thermal, and manufacturability constraints.
* Work in a Cadence Allegro and OrCAD Capture environment, including the use of parallel layout tools like Symphony to accelerate delivery.
* Collaborate closely with Mechanical engineers (handling 3D IDF/IDX transfers), R&D teams, and Reliability (Q&R) teams to meet strict mechanical constraints.
* Strictly adhere to our internal "Design Considerations" guidelines and the team's layout "Cookbook" methodologies to ensure standardized execution.

Country:
Israel

City:
Herzliya

We are looking for highly motivated engineers who love the challenges and the opportunity of a small company. Join us and be a part of a small and dynamic team, which revolutionizes the parallel processor architecture.