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Our Formal Verification (FV) team is seeking a visionary AI Verification Engineer to join our elite Networking Chip Design group. Our team is unique: we define the infrastructure and drive the methodologies for proving the correctness of the worlds most advanced AI and networking architectures. We operate at the cutting edge, leveraging a sophisticated ecosystem of proprietary in-house formal tools and industry-leading vendor EDA solutions.

In this role, you will be a key architect in our "AI-for-FV" evolution. You will work in close collaboration with our internal CAD and Design Technology AI teams to enhance our in-house toolset with artificial intelligence. You won't just be using tools; you will be building the "brains" that sit on top of them-utilizing LLMs and Machine Learning to automate intent-to-proof workflows and debug complex chips with unprecedented speed.

What Youll Be Doing:

In-House Tool Evolution: Partner closely with internal CAD teams to integrate AI capabilities directly into our proprietary FV infrastructure.

Methodology Architecture: Define and evolve the FV teams specialized methodologies, moving from manual property writing to AI-automated assertions.

Next-Gen Orchestration: Develop and integrate AI agents and ML models that interface with our toolchain to automate "intent-to-assertion" workflows and optimize coverage and convergence.

Intelligent Debugging: Create AI-based debug assistants that analyze formal counter-examples, categorize failures, and autonomously suggest fixes for complex logic problems.

Collaborative Intelligence: Act as the bridge between the FV team, Design Technology AI, and CAD groups to ensure our AI solutions provide end-to-end efficiency from RTL to A0 tapeout.

Leadership & Training: Act as the authority on AI integration, training the broader team on how to leverage "human-in-the-loop" AI tools and automated methodologies.

We are seeking a Principal verification engineer to be a technical lead in the chip design methodologies team. The team is in charge of the verification methodologies, shared code, training, and adopting new technologies. One of our main goals is to define, build and use best in class technologies make sure that the chip design team works in an efficient manner and provides high-quality deliveries at scale. This position offers the opportunity to drive foundational flows and have a profound impact in a dynamic, technology-focused company.

What you'll be doing:

Define groundbreaking methodologies to create a flawless experience for verification engineers.

Mentor and guide designers and verification specialists to tackle complex technical challenges.

Identify design risks, define the verification scope, and lead infrastructure development to ensure design correctness.

Technically guide the development process of shared verification code and infrastructure to be widely used by the global chip design team.

Partner with the design automation team to provide end-to-end solutions that unify verification, simulation, and automation.

Collaborate with EDA vendors to learn about innovative tools/technology and integrate them into our long-term verification strategy.

Lead verification strategies, training sessions.

We are looking for a Formal Verification Engineer for our Networking team!

This is an exciting opportunity to join a hardworking Pre-Silicon design and verification team, working on groundbreaking Switch technologies. We deploy state-of-the art formal verification tools and methodologies to prove design correctness. Working in our formal verification team will expose you to a wide range of cutting edge design and technologies. Our Switch team delivers world class Bridge and router solutions for HPC, data-center, network, and storage markets. We micro-architect, verify, and deliver smart and high bandwidth multi port switches. We have the most sophisticated formal tools and methodologies in the industry, which help us achieve A0 design tapeouts. As part of this team, you'll enjoy a versatile work environment, which is educational, dynamic and ambitious.

What you'll be doing:

In this position you will use formal verification algorithms to formally prove the correctness of complicated logic problems.

You will work on ambitious designs along with our Pre-Silicon team and take part in developing the next generation of our core technology.

You will work on developing new formal verification methodologies and tactics.

We are now looking for a best-in-class Chip Design Verification Engineer to join our outstanding GPU-Networking Silicon Engineering team. As a DV Engineer in our GPU-Networking group, you'll make a real impact in a dynamic, technology-focused company while being a part of the team that develops the flagship product of todays semiconductor industry - our GPU Super-Chip.

What youll be doing:

Work in a DV (Design Verification) team that has a global responsibility over deliverable units and clusters to the silicon GPU.

Integrations and Full-Chip models.

Verification of chip blocks/entities according to specifications under challenging constraints.

Your daily work will involve all aspects of Design Verification : Planning, Coding, Coverage and Integration.

Our Networking Software Group is rapidly growing, and we are hiring software engineers for the networking Switch Software Verification team. Come and join a diverse group of engineers spread across the globe who come together in small close knit teams to innovative and develop groundbreaking solutions.

As a member of the team, you will be a part of cutting edge Python-based SW project using advanced techniques such as white box testing, multi-thread environment and more. You will gain unique knowledge of how switch operating system works and how large scale networks are constructed. Teams utilize the latest software engineering methodologies and tools in an agile fashion to release on time. Are you ready for this challenge?

What you will be doing:

Design, develop, optimize and maintain APIs, tools and libraries for Verification networking infrastructure.

Collaborate with team members, Architects, design, QA teams, and customers (both external and internal).

Design, develop, execute and maintain tests automation for release features.

Join our DOCA Verification team as a Senior Software Verification Engineer and help shape the future of Data Processing Unit (DPU) and network interface cards software. We are seeking a highly motivated and skilled engineer with hands-on technical experience to verify the design and implementation of next-generation software features, with a focus on solving modern hyper scaler advanced networking aspect like congestion control and optimized network usage.

What you'll be doing:

Collaborate with software, architecture, product, and DevOps teams to define test requirements, coordinate releases, and deliver high-quality products.

Take end-to-end ownership of features: develop test plans, implement, and fully automate testing (primarily in Python).

Design, build, and maintain automated test scripts and frameworks.

Validate software functionality and performance through system-level and integration testing in Linux-based and virtualized environments.

Analyze test results, file bugs, track issues to closure, and ensure robust solutions.

Drive continuous improvement in verification flows and contribute to process and methodology enhancements.

Set up, maintain, and optimize test environments using Linux, Docker, and virtual machines.

Monitor nightly regression systems, analyze failures, and provide thorough root-cause analysis across hardware, OS, and software layers.

We are seeking a Signal Processing Lab and Development Validation Lead to establish a new team in a classified, cutting-edge technological environment. This is a key role in projects that directly contribute to national security.
Position Description:
Manage and operate four advanced laboratories specializing in RF and signal processing
Design, set up, and execute complex test environments and validation processes
Analyze test results and identify issues in collaboration with development teams
Oversee lab infrastructure including equipment, computing systems, and procurement
Work closely with suppliers, internal systems, and external partners
Operate diverse test and measurement equipment (oscilloscope, spectrum analyzer, etc.).

our eyeq platform group (epg) is seeking a motivated formal Verification engineer to join our team and contribute to development of hardware verification environments.
this position offers an opportunity to apply formal methods to verify the correctness of various complex digital systems.
this is an exciting opportunity to join a team of talented engineers, working cutting edge technologies in the field of autonomous vehicle. what will your job look like:
be the owner of formal verification environment from first draft to sign-off stage
apply formal methods to verify the correctness of various complex digital systems
work with hw architects/designers to define assumptions, rules and cover properties
help define the formal verification methodology and environment to be applied by the team
explore new formal methods and tools
work with tools like cadence jaspergold, verisium manager, xcelium, indago
analyze verification results, identify bugs, and collaborate with engineers to resolve design issues
develop generic formal blocks/functions of commonly used logic, to be later used off the shelf

we are seeking a highly skilled systems integration and Validation engineer to join our dynamic team in the automotive industry. the ideal candidate will have a strong background in system development, integration, and testing, with at least 5 years of relevant experience. as an integration engineer, you will play a key role in integrating and validating a complex automotive system, ensuring they meet the highest standards of quality, performance, and reliability. what will your job look like:
system integration: collaborate with cross-functional teams to integrate various subsystems and components into a cohesive automotive system, ensuring compatibility and functionality.
risk management: identify potential risks and issues related to system design and implementation, and develop mitigation strategies to ensure project success.
documentation and reporting: create comprehensive documentation, including system designs, TEST reports, and technical specifications. provide regular progress updates and reports to management and stakeholders.
testing and validation: develop and execute TEST plans and procedures to validate system performance, reliability, and safety according to industry standards and regulations.

Our SOC verification group owns the important and challenging job of verifying mobileye's chip. it is involved from product specification to final SOC delivery, and involves all the system components. the group is made up of few of the best Verification engineers, so besides contributing to making our roads safer, youll get the chance to work at one of the most professional verification teams.
what will your job look like:
you'll be responsible for pre-silicon system -level verification of the most cutting-edge ai accelerators and technologies in the automotive field.
define the testplan, develop and run tests on simulation/emulation environments, develop TEST environment and verification collaterals.
you'll have a broad effect on our unique product from the very beginning of the process.

our SOC verification group owns the important and challenging job of verifying mobileye's chip. it is involved from product specification to final SOC delivery, and involves all the system components. the group is made up of few of the best Verification engineers, so besides contributing to making our roads safer, youll get the chance to work at one of the most professional verification teams. what will your job look like:
you'll be responsible for pre-silicon system -level verification of the most cutting-edge ai accelerators and technologies in the automotive field.
define the testplan, develop and run tests on simulation/emulation environments, develop TEST environment and verification collaterals.
you'll have a broad effect on our unique product from the very beginning of the process.

We are looking for a Verification Team Leader for our team in Haifa to drive verification for next-generation PHY IPs . The PHY DV team operates at the intersection of verification, research, and innovation, continuously improving techniques, models, and flows to increase the efficiency and quality of PHY verification. This is a hands-on technical leadership role, combining deep verification expertise with team leadership and close collaboration with design, architecture, firmware, and system teams.
Description
Lead the verification team, including hiring, planning, and communication with management.
Strong teamwork and communication skills.
Responsibilities
Lead the verification team, including hiring, planning, and communication with management.
Define verification architecture and lead for execution
Own verification methodologies, standards, and best practices across the team

Were hiring an experienced verification engineer to join our team developing advanced telecommunications ASIC/FPGA products. You will join RADs family, as part of our team in Beer-Sheva.



Responsibilities:
Build and maintain verification environments (SystemVerilog/UVM or Specman)
Develop test plans and run constrained-random & directed tests
Debug, analyze coverage, and work closely with design teams
Contribute to methodology and process improvements

We are looking for a Senior Verification Engineer to be a significant part in developing a complex and innovative SoC chip in a start-up company.

Taking full ownership of entire domain, defining the verification strategy, writing, and executing verification plan in system Verilog UVM.