לוח משרות דרושים מהנדס וריפיקציה | ולידציה

We have been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. Its a unique legacy of innovation thats fueled by great technologyand amazing people. Our Networking Software Group is rapidly growing, and we are hiring software engineers for the networking Switch Software Verification team. Come and join a diverse group of engineers spread across the globe who come together in small close knit teams to innovative and develop groundbreaking solutions.

As a member of the team, you will be a part of cutting edge Python-based SW project using advanced techniques such as white box testing, multi-thread environment and more. You will gain unique knowledge of how switch operating system works and how large scale networks are constructed. Teams utilize the latest software engineering methodologies and tools in an agile fashion to release on time. Are you ready for this challenge?

What you will be doing:

Design, develop, optimize and maintain APIs, tools and libraries for Verification networking infrastructure

Collaborate with team members, Architects, design, QA teams, and customers (both external and internal)

Design, develop, execute and maintain tests automation for release features.

We are looking for a Chip-Design Verification Engineer to join our Network Adapter Silicon group. As a Chip-Design Verification Engineer in our Networking Silicon team, you will join a group of passionate engineers to design and implement the next generation state-of-the-art Networking Silicon chips. In this position, you will make a real impact in a dynamic, technology-focused company while developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency!

What you'll be doing:

Work in a combined design and verification team which develops core units within the Networking silicon.
Build reference models, verify and simulate chip blocks/entities according to specifications and performance requirements.
Work closely with multiple teams within organizations such as Architecture, Micro- Architecture, FW and Post-Silicon validation.

We are looking for a skilled and experienced Engineer with a focus on System Electrical Validation to join our Engineering team in Yokneam, Israel. As part of this role, you will play a crucial role in ensuring the quality of our advanced products. You will collaborate closely with PHY design, system architecture and company wide system, validation, reliability, signal integrity and testing owners to devise and implement effective validation strategies, aligning with our high-quality standards.

What youll be doing:

Create and implement electrical validation plans for new products.

Analyze and interpret validation results to identify potential issues.

Collaborate with design and architecture teams to define required validation and optimize and solve electrical issues.

Design and develop test scripts and frameworks to automate validation processes.

Work closely with software and firmware teams to ensure seamless integration.

Provide technical expertise and guidance to junior team members.

Maintain accurate documentation of validation activities and results.

Our Networking HW Qual team is looking for a System Electrical Characterization and Validation engineer, to take part of Networking system validation and characterization efforts of different platforms and products. You will be a part of a team working on groundbreaking technology. We are in need of hardworking and motivated engineers ready to define and lead validation activities. Do you have analog approach, have passion for lab work, data analysis and post-Si hands on problem solving? We will be happy to have you on our team!

We are looking for a skilled and experienced Engineer with a focus on System Electrical Validation to join our Engineering team in Yokneam, Israel. As part of this role, you will play a crucial role in ensuring the quality of our advanced products. You will collaborate closely with PHY design, system architecture and company wide system, validation, reliability, signal integrity and testing owners to devise and implement effective validation strategies, aligning with our high-quality standards.

What youll be doing:

Create and implement electrical validation plans for new products.

Analyze and interpret validation results to identify potential issues.

Collaborate with design and architecture teams to define required validation and optimize and solve electrical issues.

Design and develop test scripts and frameworks to automate validation processes.

Work closely with software and firmware teams to ensure seamless integration.

Provide technical expertise and guidance to junior team members.

Maintain accurate documentation of validation activities and results.

The DOCA Verification team is seeking a highly motivated and hardworking Senior Software Verification Engineer. This role requires hands-on technical experience to verify the design and implementation of the next generation Data Processing Unit (DPU) Software. The position involves working with a wide range of features related to networking, hardware accelerators, cybersecurity, and embedded systems.

This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting data centres across the world.
We are united in our quest to transform the way Smart Network Adapters are used.

What you'll be doing:

Define and implement comprehensive verification strategies, including functional, integration, system, and regression testing.

Collaborate closely with cross-functional teams, including software development, product management, and project stakeholders, to ensure requirements are clearly understood and tested.

Spearhead improvements to optimize the performance, quality, and reliability of software acceleration solutions.

We are looking for a Formal Verification Engineer for our NVIDIA Networking team!

This is an exciting opportunity to join a hardworking Pre-Silicon design and verification team, working on groundbreaking Switch technologies. We deploy state-of-the art formal verification tools and methodologies to prove design correctness. Working in our formal verification team will expose you to a wide range of cutting edge design and technologies. Our Switch team delivers world class Bridge and router solutions for HPC, data-center, network, and storage markets. We micro-architect, verify, and deliver smart and high bandwidth multi port switches. NVIDIA has the most sophisticated formal tools and methodologies in the industry, which help us achieve A0 design tapeouts. As part of this team, you'll enjoy a versatile work environment, which is educational, dynamic and ambitious.

What you'll be doing:

In this position you will use formal verification algorithms to formally prove the correctness of complicated logic problems.

You will work on ambitious designs along with our Pre-Silicon team and take part in developing the next generation of NVIDIA's core technology.

You will work on developing new formal verification methodologies and tactics.

We are looking for a skilled Block-Level Verification engineer with 2=3 years of experience to join our team. The role involves developing spec-based verification environments, including building and maintaining simulation setups, writing tests, and conducting functional verification processes. A full-time hybrid position, based in central of Israel.
?Key Responsibilities:
* Analyze functional specifications and translate them into a complete verification plan.
* Develop and build verification environments using SystemVerilog/UVM
* Write testbenches and automated tests
* Perform simulation result analysis, debugging, and bug fixing.
* Work with coverage metrics (functional and code coverage) to ensure full TEST coverage.
* Collaborate closely with design teams to identify and resolve issues.

Power the Future with us! At SolarEdge (NASDAQ: SEDG), we're a global leader in smart energy technology, with over 3,000 employees, offices in 34 countries, and millions of installations worldwide. Our innovative solutions include solar inverters, battery storage, backup systems, EV charging, and AI-based energy management. We're committed to making clean, green energy the primary power source for homes, businesses, and beyond. With the growing demand for electricity, the need for smart, clean energy sources is constantly rising. SolarEdge offers amazing opportunities to develop your skills in a multidisciplinary environment, covering everything from research and development to production and customer supply. Work with talented colleagues, tackle exciting challenges, and help create a sustainable future in an industry that's always evolving and innovating. Join us and be part of a company that values creativity, agility, and impactful work. We are looking for a Senior ASIC Verification engineer with good grasp of the entire verification process – plan, execution and sign-off, excellent analytical skills, technical skills and high motivation to join our team and take part of the success. What you will be doing:
* Create a thorough verification plan out of IP specification and implement it to completeness.
* Build UVM-compliant IP verification environment from scratch.
* Debug to find root cause of issues.
* Full-chip verification from planning stage to tape-out, including gate-level testing.
* Testing using both System Verilog and C.
* Work in a diverse environment, collaborating with power engineers, communication experts and SW developers.

Country:
Israel

City:
Herzliya

We are in the early stages of a new project and looking for a talented Senior engineer to take on a key role, leading Verification efforts of major parts of our ASIC - from scratch

Roles and responsibilities:
Take ownership of Verification for large ASIC clusters.
Plan, build, and execute the Verification environment end-to-end.
Mentor and guide juniors/students.

We are seeking a System Validation & Quality Assurance Manager to define validation methodologies, set quality standards, and drive a culture of quality across multidisciplinary hardware and software systems. This leadership role emphasizes process ownership, methodology enforcement, and coaching teams, while also providing technical guidance and hands-on validation expertise.

Responsibilities:
Define and enforce validation methodologies, processes, and quality standards across firmware and embedded software.
Lead validation planning and execution reviews, ensuring coverage, consistency, and defect prevention.
Establish automation and CI/CD validation strategies and guide adoption across teams.
Mentor and coach engineers to embed quality practices and foster continuous improvement.
Provide technical leadership in system-level validation, including algorithms and machine learning within firmware and embedded software environments.
Oversee validation execution on ATE platforms, ensuring correlation between simulation, emulation, and silicon test results.
Accountable for high-level analysis of production issues, driving defect escape reviews, enhancing test coverage, and defining quality gates to enforce continuous improvement.

we are a global leader in control systems for our company computing, a field on the verge of exponential growth. Our innovative hardware and software mark a groundbreaking approach in our company computer control, scaling from individual qubits to expansive arrays of thousands. At the core of QM lies a passionate and ambitious team committed to reshaping the construction and operation of our company computers.
We are seeking a highly skilled Hands-On Engineer to join our company Integration Team, ensuring seamless integration of multi-layered systems. This role requires close collaboration with cross-functional teams to debug, validate, and integrate complex interfaces while ensuring end-to-end functionality.
Key Responsibilities:
Integration of multi-disciplinary systems, ensuring smooth operation across different layers.
Debug and troubleshoot issues arising in the integration process.
Develop integration and validation tools.
Collaborate with architecture, logic design, verification, compiler, and embedded teams.

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As a Senior Design Verification Engineer, you will work as a part of a Research and Development team. You will build verification components, constrained-random testing, system testing, and drive verification closure.
In this role, you will verify digital designs. You will collaborate closely with design and verification engineers on projects and perform direct verification. You will build efficient and effective constrained-random verification environments that exercise designs through their corner-cases and expose all types of bugs. You will manage the full life-cycle of verification, which can range from verification planning, test execution, to collecting and closing coverage.
Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of our company platforms, we make our company's product portfolio possible. We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible.
Responsibilities
Plan the verification of digital design blocks by fully understanding the design specification and interacting with design engineers to identify important verification scenarios.
Create and enhance constrained-random verification environments using SystemVerilog and Universal Verification Methodology (UVM) or formally verify designs with SystemVerilog Assertions (SVA) and industry leading formal tools.
Identify and write all types of coverage measures for corner-cases.
Debug tests with design engineers to deliver functionally correct design blocks.
Close coverage measures to identify verification holes and to show progress towards tape-out.

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
The ML, Systems, & Cloud AI (MSCA) organization at our company designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all our company services (Search, YouTube, etc.) and our company Cloud. Our end users are our customers, Cloud customers and the billions of people who use our company services around the world.
We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including our company Clouds Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.
Responsibilities
Plan the formal verification strategy and create the properties and constraints for digital design blocks.
Utilize formal property verification tools combined with formal verification closure techniques to verify properties.
Resolve difficult to verify properties, and contribute improvements to methodologies to enhance formal verification results.
Architect and implement reusable formal verification components.

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As a CPU Design Verification Engineer, you will work as part of a Research and Development team building verification components, constrained-random testing, system testing, and verification closure. As part of our server chip design team, you will verify complex digital designs. You will collaborate with design and verification engineers in active projects and perform verification. You will be responsible for the full lifecycle of verification which can range from verification planning, test execution, or collecting and closing coverage.
Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of our company platforms, we make our company's product portfolio possible. We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible.
Responsibilities
Plan the verification of digital design blocks by fully understanding the design specification and interacting with design engineers to identify important verification scenarios.
Create and enhance constrained-random verification environments using SystemVerilog or formally verify designs with SystemVerilog Assertions (SVA) and industry leading formal tools.
Identify and write all types of coverage measures for stimulus and corner-cases.
Debug tests with design engineers to deliver functionally correct design blocks.
Apply close coverage measures to identify verification holes and to show progress towards tape-out.

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
In this role, you will work as part of a Research and Development team. You will build verification components, constrained-random testing, system testing, and verification closure. You will verify digital designs and collaborate with design and verification engineers in projects and perform direct verification. You will build efficient and effective constrained-random verification environments that exercise designs through their corner-cases and expose all types of bugs. You will manage the full life-cycle of verification which can range from verification planning, test execution or collecting, and closing coverage.
The ML, Systems, & Cloud AI (MSCA) organization at our company designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all our company services (Search, YouTube, etc.) and our company Cloud. Our end users are our customers, Cloud customers and the billions of people who use our company services around the world.
We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including our company Clouds Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.
Responsibilities
Plan the verification of digital design blocks by understanding the design specification and interacting with design engineers to identify important verification scenarios.
Create and enhance constrained-random verification environments using SystemVerilog or formally verify designs with Strategic Value Add (SVA) and industry leading formal tools.
Identify and write all types of coverage measures for stimulus and corner-cases.
Debug tests with design engineers to deliver functionally correct design blocks.
Close coverage measures to identify verification holes and to show progress towards tape-out.