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15/04/2026
Location: Misgav
Job Type: Full Time
we are Hiring VLSI Circuit TEST Engineer Design and develop TEST plans for VLSI circuits, including digital, analog, and mixed-signal circuits. Implement and execute TEST procedures to ensure the functionality and performance of VLSI circuits. Analyze TEST data and identify issues related to circuit design, manufacturing, and performance. Collaborate with design engineers to develop and optimize TEST methodologies. Develop automated TEST scripts and tools to improve TEST efficiency and coverage. Perform failure analysis and debug issues to identify root causes and implement corrective actions. Document TEST results, methodologies, and procedures for future reference. Stay updated with the latest advancements in VLSI testing technologies and methodologies.
Requirements:
Practical or bachelors degree in Electronics Engineering. More than 5 years of Proven experience in VLSI circuit testing, including digital, analog, and mixed-signal circuits. Strong knowledge of VLSI design and testing methodologies. Proficiency in using TEST equipment such as oscilloscopes, logic analyzers, and automated TEST systems. Experience with scripting languages (e.g., Python, PERLgreenTxtBg!) for TEST automation. Excellent problem-solving skills and attention to detail. Strong communication and teamwork skills. Ability to work independently and manage multiple tasks effectively. Preferred Qualifications: Experience with industry-standard EDA tools (e.g., Cadence, Synopsys). Knowledge of semiconductor manufacturing processes and reliability testing. Familiarity with Imaging industry. Benefits: Professional development opportunities and continuous learning. Flexible work hours and remote work options. Collaborative and inclusive work environment. True contribution to future and safety of Israel. Location: SCD Bar-Lev site Job Type: Full-Time
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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8611182
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27/03/2026
Location: Yokne`am
Job Type: Full Time
we are looking for an Electronic Engineer to join the system design testing architecture team and lead systems hw testability definition for nvidias networking systems.
what youll be doing:
leading optimal products testing definitions includes: hw, sw, fw, mechanical fixtures, and cables/harnesses for customized production testing set ups.
making pitches in front of large audience a new product testing architecture, dft and testing method while providing justifications for the testing concept.
responsible for product testing maximum coverage, testing specification documents and production TEST flow process for each system
working with companys engineering team during the developing process of the product from pre-design trough the design and influence on the product design from dft - design for testability aspects.
supporting production ramp up and scalability, lead and fast responding time for ecr/eco implications.
examine new technologies, testing capabilities and their implementation for the next generation products
ensure testing set ups and coverage are met the dft requirements and timetable
lead dft risk assessment and drive mitigations to reduce the risks.
Requirements:
what we need to see:
bsc, msc electrical engineering
integration capabilities of self-task management, vast electronic knowledge, production and testing process knowhow.
background in working with contract manufacturers and suppliers
minimum 5 years of experience as a dft engineer at chip/ system level, as board design engineer or as system architect
management and follow up till completion of multi-functional and personal tasks.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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26/03/2026
Location: Yokne`am
Job Type: Full Time
our company is at the forefront of ai-driven innovation in vlsi design automation. join us to shape the future of semiconductor design with cutting-edge ai tools and make a significant impact in a collaborative, high-performance environment. are you ready to push the boundaries of whats possible in vlsi cad? come be part of our pioneering team!
what you'll be doing:
you will be responsible for developing and integrating advanced cad solutions and automation flows using ai and Machine Learning for vlsi design, verification, and implementation.
work closely with design, verification, and cad teams to identify areas for improving vlsi workflows using advanced tools and methods.
research, prototype, and deploy ai-based algorithms.
develop and maintain scripts and automation infrastructure to enable seamless adoption of ai tools in the vlsi design process.
continuously review emerging ai technologies and methodologies to keep our cad environment up-to-date.
provide Technical Support and training to engineering teams on ai-enabled cad flows and best practices.
Requirements:
what we need to see:
b.sc./m.sc. in electrical engineering, computer engineering, Computer Science, or equivalent experience.
5+ years of experience in vlsi cad tool development, with a strong focus on integrating ai/ml techniques into eda workflows.
proficiency in Python and at least one ai/ml framework (such as tensorflow, pytorch, or scikit-learn).
hands-on experience with vlsi physical design and familiarity with industry-standard eda tools (e.g., synopsys, cadence).
knowledge of data preprocessing, feature engineering, and model deployment as applied to vlsi design challenges.
experience developing and maintaining automation scripts ( Python, PERL, tcl, make).
strong analytical skills in evaluating the impact of ai solutions on design quality, performance, and productivity.
excellent communication skills and the ability to work cross-functionally in a fast-paced environment.
self-motivation, attention to detail, and a track record of delivering robust solutions to production.
ways to stand out from the crowd:
demonstrated experience deploying ai/ml models in production vlsi cad environments.
contributions to open-source ai/eda projects or publications in relevant conferences/journals.
deep understanding of vlsi design challenges-such as timing closure, power optimization, or yield enhancement-and how ai can address them.
experience with cloud-based or distributed compute environments for large-scale ai training and inference.
strong ownership, curiosity, and a passion for continuous learning and innovation.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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8593742
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תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
26/03/2026
Location: Yokne`am
Job Type: Full Time
we are continuously improving and evolving the solution to meet the challenging goals. if you find groundbreaking technologies, and next generation products interesting, then this is the team for you. take opportunity to join our team for an exciting and educational environment, where every individual has significant contribution to our products and achievements!
what youll be doing:
you will be in charge of state of the art design for TEST /atpg flows and implementation
take full atpg ownership end to end on a project, from arch & planning to pattern generation, verification and post silicon bring up and diagnosis.
inventing and maintaining automation flows that provide the short TEST time to production
Requirements:
what we need to see:
3+ years of hands on dft/atpg experience knowledge & technical experience in dft asic design and in atpg tools
strong programming skills in scripting languages
bsc. in electrical engineering or computer engineering
quick learner, proactive and self-motivated, eager to learn and contribute, sense or ownership, commitment, and responsibility
ways to stand out from the crowd:
knowledge of dft including scan, bist, on-chip scan compression, fault models, atpg, and fault simulation
experience in mentor testkompress atpg tool and retargeting flow
programming languages: tcl, prl, phyton & Unix shell scripts
experience with ate and silicon bring-up
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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עדכון קורות החיים לפני שליחה
8593739
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מה השם שלך?
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שליחה
סגור
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תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
26/03/2026
Location: Yokne`am
Job Type: Full Time
are you passionate about working on a team that is at the cutting and bleeding edge of hardware technology? our design-for- TEST engineering team at our company works on groundbreaking innovations involving crafting creative solutions for dft architecture, verification and post-silicon validation on some of the industry's most sophisticated semiconductor chips. we are looking for an experienced dft engineer to join the atpg team. the position includes taking part in development of the next generation dft technologies and working closely with a wide range of our groups and aspects - chip design, backend, verification, and production testing. 
 
working on the most advanced technologies and complex products, our dft solution are unique and innovative internal developments, and we are continuously improving and evolving the solution to meet the challenging goals. if you find groundbreaking technologies, and next generation products interesting, then this is the team for you. take opportunity to join our team for an exciting and educational environment, where every individual has significant contribution to our products and achievements! 
 
what youll be doing: 
you will be in charge of state of the art design for TEST /atpg flows and implementation 
take full atpg ownership end to end on a project, from arch & planning to pattern generation, verification and post silicon bring up and diagnosis. 
inventing and maintaining automation flows that provide the short TEST time to production
Requirements:
what we need to see: 
5+ years of hands on dft/atpg experience knowledge & technical experience in dft asic design and in atpg tools 
experience in mentor testkompress atpg tool and retargeting flow 
strong programming skills in scripting languages 
bsc. in electrical engineering or computer engineering 
quick learner, proactive and self-motivated, eager to learn and contribute, sense or ownership, commitment, and responsibility 
 
ways to stand out from the crowd: 
knowledge of dft including scan, bist, on-chip scan compression, fault models, atpg, and fault simulation 
programming languages: tcl, prl, phyton & Unix shell scripts 
experience with ate and silicon bring-up 
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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עדכון קורות החיים לפני שליחה
8593735
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