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We are looking for you to join our emulation team focusing on the creation, deployment, and support of advanced emulation environments. In this highly visible role, you will be at the center of a chip design effort collaborating with all disciplines, with a critical impact on getting functional products to millions of customers quickly.

As a senior emulation engineer, you will have the responsibilities as follows: Work closely with emulation, architecture and verification teams to create and enhance emulation environments. Work with the leading emulation vendors to debug issues and deploy new capabilities. Develop new emulation workloads and platforms to enhance user productivity . Develop high performance emulation models and transactors in system Verilog and C/C++ . Support multiple emulation environments using the latest emulation techniques Root cause failing SoC/Processor tests and emulator environment issues.

Play a part in shaping the future of human-computer interaction. As an MLOps Engineer, you will be the backbone of the machine learning infrastructure that powers our speech, audio, and conversational AI teams - ensuring their models are trained on the best possible data.
You will bridge the gap between research, data science, and engineering, owning the full ML lifecycle from large-scale data pipelines and distributed GPU training through to low-latency, high-fidelity inference and optimization. You'll partner closely with Audio ML Engineers, Speech ML Engineers, and ML Data Scientists to remove friction across their workflows and accelerate the path from research to product.

The MLOps Engineer will drive end-to-end quality and operational excellence across data ingestion, model training, deployment pipelines, and MLOps tooling for our speech and audio ML platforms. This hire will build, deploy, and optimize production-grade systems with a strong emphasis on scalable, GPU-accelerated infrastructure. You will own the training infrastructure that powers distributed and self-supervised model training on HPC and Slurm-managed clusters, as well as the inference pipelines that bring low-latency, high-fidelity audio and speech models to production. You will establish standard methodologies for model integration, deployment, monitoring, and reproducibility using CI/CD principles.

Responsibilities
Design, build, and operate large-scale data pipelines for proprietary audio and speech datasets - supporting curation, quality monitoring, and validation at scale alongside our ML Data Science team.
Partner closely with Audio ML Engineers, Speech ML Engineers, ML Data Scientists, and product teams to define metrics, gather requirements, and bring new capabilities to life.
Build and operate distributed GPU training workflows, including job scheduling and resource management on Slurm-managed HPC clusters, for both supervised and self-supervised methods.
Optimize model inference for low latency and high-fidelity streaming across serving environments, including optimization for Apple silicon.
Design and maintain automated pipelines for model training, evaluation, versioning, and deployment, with special attention to speech, audio, and signal-processing workflows.
Identify and resolve bottlenecks in ML and data workflows, improving system reliability, latency, and throughput at scale.

We are seeking a highly skilled and motivated real-time embedded Engineer to join our firmware team.

In this role, you will be responsible for implementing cutting-edge technology for our next-generation products. You will be a key contributor to the entire product development lifecycle, from concept to deployment, ensuring that our products are intelligent, efficient, and provide a seamless user experience.

Responsibilities
Implement, deploy and optimize real-time state machines, operate various sensors streams (e.g., audio, vision, motion, etc.) on resource-constrained embedded platforms.
Design, develop, and maintain real-time firmware for embedded systems.
Optimize code for performance, memory usage, and power consumption.
Develop and execute comprehensive testing strategies for embedded systems.
Develop and maintain firmware in C/C++ for embedded systems.
Work with cross-functional teams including software, hardware, and systems engineers.
Participate in the entire software development lifecycle, including requirements gathering, design, implementation, testing, and deployment.
Stay up-to-date with the latest advancements in embedded systems.

we are looking for a Senior Board Design Engineer.
As a Hardware Board Design Engineer , you will own the electrical design of complex Big Data Analytics systems. You will drive the development of next-generation Analytics Processing Unit (APU) accelerator boards, ensuring they meet signal integrity, power delivery, and thermal requirements. You will work cross-functionally with Silicon (ASIC), Signal Integrity, Power, Mechanical, and Manufacturing teams to bring products from concept to mass production.
Responsibilities:
Lead the schematic capture and component selection for high-density, multi-layer Printed Circuit Boards (20+ layers) incorporating high-power ASICs (APUs) and high-speed memory (LPDDR5/DDR5).
Design and validate high-speed interfaces including Peripheral Component Interconnect Express (PCIe) Gen 5, DDR5 and LPDDR5.
Collaborate and manage Signal Integrity (SI) engineers to define routing constraints and stack-up.
Work closely with PCB layout designers to guide placement and routing of critical signals and power planes.
Lead the lab bring-up of first silicon/first board. Debug complex hardware issues. Root-cause failures to component, assembly, or design issues

We are looking for a highly skilled Senior Audio - Voice Processing & Environmental Test Engineer to join our team in Herzliya.

Responsibilities
Test and validate the performance and tuning of core voice processing blocks
Execute validation under diverse acoustic conditions, speaker configurations, and signal scenarios.
Collaborate with algorithm teams to provide data-driven feedback for tuning and optimization.
Conduct objective voice quality assessments using standardized metrics, including POLQA (ITU-T P.863) and PESQ (ITU-T P.862).
Organize and manage subjective "golden ear" listening panels to assess voice naturalness, intelligibility, and overall quality.
Define evaluation criteria and scoring methodologies aligned with industry standards and internal quality benchmarks.
Design and execute WER-based testing for scenarios involving voice transcription and speech recognition.
Correlate WER results with upstream audio processing quality to identify degradation sources.
Conduct testing in specialized laboratories that replicate real-world acoustic scenarios, including: Moving vehicles ,Noisy public environments - cafés, restaurants, crowded spaces Windy outdoor settings and Combined environmental stressors.
Measure and track Time to First Word (TTFW) and round-trip audio latency.
Establish performance baselines and monitoring frameworks for continuous tracking across firmware and software iterations.
Design and maintain automated test suites to detect audio artifacts - including glitches, pops, clicks, distortions, and dropouts.
Build regression frameworks that validate audio quality across new firmware and software updates.

Were looking for an experienced SW Team Manager to join our Simulators Team, where you'll lead the design and development of our hardware simulators - functional and performance models that serve as the source of truth, drive architectural exploration and compiler optimization.
Our simulators model diverse cores within a cutting-edge SoC designed to accelerate Big Data and Database Analytics.
You will collaborate closely with hardware and software teams, contributing to co-design efforts that influence architecture, tooling, and system-level behaviour.
Responsibilities:
Lead & grow a team of experienced engineers
Develop new hardware simulators and continue evolving existing one.
Collaborate with Architecture, VLSI, and Software teams to drive co-design initiatives.
Provide insights that influence chip architecture, compiler optimization, and system-level performance.
Develop tools that drive the chip development cycle.

We are looking for a highly skilled Senior Environmental System Test Engineer - Camera & Laser to join our team in Herzliya.

Responsibilities
Lead end-to-end environmental testing and characterization of camera and laser sensor systems, encompassing optical performance, mechanical alignment, and environmental robustness.
Define and execute environmental test protocols addressing real-world conditions, including: Solar/sun influence - direct and indirect illumination interference on sensor performance; Rain and moisture - water ingress, droplet effects on optical paths, condensation; Motion and walking scenarios - dynamic movement, vibration, and stabilization assessment.
Perform system-level validation ensuring sensor subsystems meet performance specifications across all environmental boundaries.
Design and build repeatable, controlled test environments and fixtures for rigorous physics-based evaluation.
Collaborate with cross-functional teams (optics, firmware, mechanical, and research) to translate environmental requirements into actionable test plans.
Analyze and report test data, providing clear recommendations for design improvements.

Analyze and investigate RF signals across the electromagnetic spectrum.
Identify and diagnose spectrum anomalies and mitigate electromagnetic interference (EMI).
Operate measurement equipment such as Spectrum Analyzer, Network Analyzer, and Signal Generator.
Collaborate with technical teams to implement RF solutions.
Job location- Central Israel
scope of hours: 100-160 hours.

We are looking for a highly skilled Senior Sensor & Embedded System Testing Engineer to join our team in Herzliya.
In this role, you will help create the full data lifecycle that underpins our models: from designing what data we collect, through curation and quality monitoring, to running rigorous experiments that drive model improvements. You will work closely with other ML and Data Engineering teams to ensure our models are trained on the best possible data, reaching the best accuracy, and that we deeply understand when and why they don't perform as expected.

The selected candidate will assume responsibility for the configuration of advanced camera and laser sensor systems, and for the rigorous validation of their functionality at the embedded level. This role encompasses interface verification, timing analysis, performance characterization, firmware integration support, and direct collaboration with research and physics evaluation programs.

Responsibilities
Lead the configuration and bring-up of camera and laser sensor subsystems within embedded platforms.
Define, develop, and execute comprehensive system-level validation and definition testing strategies.
Characterize sensor performance across optical, electrical, and timing domains.
Validate sensor interfaces (MIPI CSI-2, SPI, I²C, LVDS) and ensure compliance with system specifications.
Support firmware integration activities, ensuring robust sensor operation within the full system stack.
Design and maintain automated test infrastructure for sensor validation and regression testing.
Collaborate closely with physics, optics, and research teams to support experimental evaluation campaigns.
Perform root-cause analysis of issues spanning hardware, firmware, optics, and sensor subsystems.

Management and leadership of technological operations and projects.
Planning and execution of models and integration between technology, intelligence, and field requirements.
Operation and implementation of complex technological systems-including field work.
Matrix task management, leadership, and teamwork.

We are looking for an ML Engineer to join a research-oriented group developing physics-informed neural networks for advanced sensing and optical measurement systems. The role focuses on training, validating, and improving neural network models that combine data-driven learning with physical modeling, simulation, and experimental measurements.

Responsibilities
Develop, train, and evaluate neural network models for physics-based sensing and reconstruction tasks.
Incorporate physical knowledge into ML models through data generation, model architecture, loss functions, constraints, or regularization.
Work with simulated and experimental datasets, including data. preprocessing, augmentation, validation, and error analysis.
Build robust training pipelines using Python and modern ML frameworks such as PyTorch.
Compare model predictions against ground-truth data from simulations, optical experiments, or measurement systems.
Collaborate with physicists and optical engineers to understand underlying physical models and translate them into ML workflows.
Analyze model performance, identify failure modes, and improve generalization from simulation to real-world data.
Design experiments to evaluate model robustness, sensitivity, uncertainty, and accuracy.

As an ASIC STA Engineer, you will have responsibilities spanning all aspects of SoC design in terms of timing.
Key responsibilities include timing sign-off, STA and sign-off flow development, ownership of Full chip, IP, and block level timing constraints both for regular and custom timing requirements from synthesis to sign-off to achieve sign-off quality timing constraints.
You will closely interact with RTL designer to understand design intent and clock structure, with CAD to understand and develop flow, and with Physical design team to close and sign-off timing. You will also come up with ideas and plans to verify your own timing constraints. You will innovate timing constraints and flow to facilitate timing closure and any potential pessimism or fall outs in timing analysis.

Lead the Product Management function across multidisciplinary development teams, driving best-in-class product ownership methodologies from concept to launch. Act as the strategic commercial bridge between global field teams and R&D, evaluating business needs for ROI and strictly enforcing R&D intake phase-gates to manage WIP limits. Own and author the Product Requirements Document (PRD) & Marketing Requirements Document (MRD), seamlessly translating complex clinical and business workflows into definitive technical product specifications. Drive usability engineering and human factors testing (IEC 62366-1) specifically tailored for complex medical aesthetics devices Cross-Functional Collaboration with system Engineering, Hardware, Software, V&V, Clinical and Regulatory teams to ensure product vision is executed without scope & feature creep. Play a pivotal role in shaping innovative, broad, and technologically advanced medical products. Ensure alignment between product management and regulatory/clinical/quality requirements. Recruit, mentor, and manage a high-performing team of Product Managers / Product Owners as the department scales Standardize product management frameworks, methodologies (for PRDs/MRDs), and lifecycle processes within the R&D division