*Part-Time or Full-Time Opportunity
Responsibilities:
The research focuses on designing next-generation rack and SuperPod architectures that combine elasticity through resource pooling with optimal performance enabled by holistic co-design across applications, parallel programming models, interconnect fabrics, and compute, memory, and switch chip architectures. On the communication side, the work architects scalable, high-bandwidth, and low-latency scale-up fabrics across multiple chips at rack and SuperPod scale. On the memory side, it explores richer protocol semantics beyond traditional load/store operations to reduce unnecessary data movement and rethinks memory hierarchies to expose large-scale capacity with near-local latency. On the compute side, it analyzes the requirements of General Compute and Generative AI workloads and their parallel programming models to fully leverage large-scale system resources.
Investigate and prototype new architectural features, including but not limited to:
o Tiered Memory: Explore advanced memory organizations, including hardware-managed caching, to enable software-transparent, fine-grained promotion and demotion of cache lines across the memory hierarchy.
o Prefetching/Speculation: Evaluate and design existing and next-generation hardware prefetching and speculation mechanisms to effectively hide local and remote memory latencies at rack and SuperPod scale.
o Near-Memory/Network Processing: Develop support for key primitives executed at the memory and network layers to minimize unnecessary data movement across sparse, dense, and pointer-based data structures.
o Workload-Centric Co-Design: Study optimal parallelization strategies at rack and SuperPod scale for both General Compute and Generative AI workloads, and design dedicated hardware support for widely used parallel programming primitives such as RPCs and collective communication.
Write reports and papers on the research results and present them.
Requirements: MSc in Computer Science, Electrical Engineering, or related field.
Background in Computer Architecture and Computer Fabrics is a must.
Creativity and the ability to think outside the box to develop innovative technologies.
Research experience in at least one of the following areas:
o Computer Architecture: Modern cache hierarchies, cache coherence protocols, memory systems, hardware prefetchers, and the memory-side of the core microarchitecture.
o Scale-up Fabrics: NVLink, UALink, CXL, UPI, IF, or PCIe.
o Parallel programming models: Collective libraires (NCCL or RCCL) and RPCs (gRPC or Thift).
o Workload optimization: General Compute and Generative AI workload composition (internals) and parallelization expertise at the scale of the rack or SuperPoD in both cloud and HPC environments.
Excellent analytical, problem-solving, and system-level thinking skills.
Strong interpersonal skills, with a collaborative spirit and the ability to work independently.
This position is open to all candidates.