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We are looking for an experienced and highly strategic Human Resources Business Partner (HRBP) to support our Chip Design organization. In this role, you will serve as a trusted advisor to senior leaders and their leadership teams, shaping and executing people strategies that enable organizational effectiveness, talent growth, and business success. This is an opportunity for an HR leader who combines strategic thinking with strong execution, thrives in a dynamic global environment, and enjoys partnering closely with highly technical organizations.

What youll be doing:
Partner closely with senior business leaders and leadership teams to understand business priorities and translate them into effective people and organizational strategies.
Drive organizational effectiveness initiatives, including organization design, workforce planning, leadership capability building, talent planning, succession planning, and change management.
Coach and advise leaders on a broad range of people matters, including performance management, employee relations, talent development, retention, engagement, and career growth.
Partner with business leaders to identify organizational capability gaps and develop targeted solutions to support business growth and evolving priorities.
Lead and support key annual HR processes, including performance management, talent reviews, compensation planning, promotion planning, and employee development.
Use people data, business metrics, and employee insights to identify trends, diagnose organizational challenges, and recommend scalable solutions.
Partner with HR Centers of Excellence and other cross-functional stakeholders to deliver integrated and high-impact HR solutions.
Support hiring growth and talent acquisition efforts, including participation in HR interviews and candidate assessment where needed.
Serve as a trusted, credible, and balanced point of contact for both managers and employees, ensuring fair and consistent application of HR practices.
Contribute to the broader HRBP team by sharing knowledge, leading initiatives, and helping strengthen HR practices across the organization.

We are looking for a Chip Design Manager to join our Switch Silicon team. As a Chip Design Manager in our Networking Business Unit, you'll join a group of passionate professionals to design and lead the implementation of the next generation of state-of-the-art Switch Silicon chips. In this position, you'll make a real impact in a dynamic, technology-focused company while developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency!


What You'll Be Doing:

Lead a team of design and verification engineers that develops core units within the Switch Silicon.

Handle micro-architecture for RTL and simulation environment planning for units and modules.

Be responsible for the delivery of complex RTL units and their verification.

Work closely with multiple teams within the organization, such as Architecture, Full Chip, Micro-Architecture, BE, and FW.

We are looking for a passionate Senior Software Engineer to join our Chip Design CAD team. In this role, you will contribute and work at the interesting junction of electrical and software engineering, developing SW tools and solutions used to design the next generation of Smart Adapters, Switches and GPUs for advanced data centers across the world.


What you'll be doing:

Develop innovative SW solutions.

Take part in defining methodologies affecting design and verification engineers day-to-day work.

Improve existing tools, which are used in-house by electrical engineers for designing the next generation SoCs and Switches.

Collaborate with designers, verification specialists and architects to accomplish your tasks.

Our Switch ASIC group is seeking a top-tier ASIC technical manager to lead the development of our next-generation ASICs. Join us in shaping the future of technology! As an ASIC Project Lead, you will manage the pre-silicon development of NVIDIA's most advanced and complex switch ASICs - from concept to tape-out - and drive the chip through power-on and qualification to production release. You will collaborate with a cross-disciplinary team, interacting with unit-level ASIC, Physical Design, CAD, Package Design, Firmware & Software, DFT, System Design, Analog Design, and other specialized teams.


What you'll be doing:
Development Management: Lead the ASIC development from concept and architecture stages through micro-architecture, design, verification, and physical design until tape-out.
Post-Silicon Execution: Drive chip power-on, bring-up, and qualification to production release.
Execution Plans: Define and implement execution plans in collaboration with cross-discipline leaders in unit-level, full-chip, physical design, and firmware/software emulation.
Roadmap Definition: Contribute to the definition of NVIDIA's switch ASIC roadmap.

We are looking for experienced Chip Design Engineers to join our team and take a key role in RTL design, new IP development, and SoC integration.

As part of the design team, you will be deeply involved in architectural exploration, protocol evaluation, and hands-on design work across multiple chip blocks.

Responsibilities
RTL design and implementation of new IPs.
SoC integration and design ownership of chip subsystems.
Exploration and evaluation of new protocols and architectural solutions.
Close collaboration with architecture, verification, validation, software, and back-end teams.
Delivering high-quality, best-in-class RTL that meets performance, power, and area goals.

We are now looking for a Senior Chip Design Engineer to join our Switch Silicon team. As a Chip Design Engineer in our Networking business unit, you'll join a group of passionate engineers to design and implement the next generation state-of-the-art Switch Silicon chips. In this position, you'll make a real impact in a dynamic, technology-focused company while developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency!

What You'll Be Doing:

Work in a design/verification team which develops core units within the Switch silicon.

Micro-architecture of rtl verification environments planning for units and modules.

Design RTL of units/blocks according to Arch. specifications under challenging constraints with high orientation to power, area, and performance.

RTL synthesis, timing, supporting verification, and silicon post TO activities.

Work closely with multiple teams within organizations such as Architecture, u-arch, Full chip Micro-Architecture, BE, and FW.

We are looking for best-in-class Chip Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high speed communication devices, delivering the highest throughput and lowest latency! Come and take a significant part in designing our groundbreaking and innovative chips, enjoy working in a meaningful, growing and highly professional environment where you make a huge impact in a technology-focused company.

What you will be doing:

Join the Tel Aviv or Beer-Sheva group, working on RiscV processors platform.

Verification for chip blocks according to specifications under challenging constraints and with high orientation to power, area and performance.

Daily work might involve any or all aspects of chip development including verification, integration, debug

Work closely with firmware and other groups around the globe.

We are now looking for a Senior Chip Design Verification Engineer to join our Switch Silicon team. As a Chip Design Engineer in our Networking business unit, you'll join a group of passionate engineers to design and implement the next generation state-of-the-art Switch Silicon chips. In this position, you'll make a real impact in a dynamic, technology-focused company while developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency!

What You'll Be Doing:

Work in a design/verification team which develops core units within the Switch silicon.

Micro-architecture of dynamic verification environments planning for units and modules.

Design dynamic verification environments of units/blocks according to Arch. specifications under challenging constraints with high orientation to power, area, and performance.

Work closely with multiple teams within organizations such as Architecture, u-arch, Full chip Micro-Architecture, BE, and FW.

We are looking for a Senior Chip Design Engineer to join our Network Adapter Silicon group. As a Senior Design Engineer in our Networking Silicon team, you will join a group of passionate engineers to design and implement the next generation state-of-the-art Networking Silicon chips. In this position, you will make a real impact in a dynamic, technology-focused company while developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency!

What you'll be doing:

Work in a combined design and verification team which develops core units within the Networking silicon.

Own micro-architecture definition and RTL implementation of chip blocks/entities according to specifications, performance, timing, area and power requirements.

Drive your design through the full implementation flow - synthesis, timing closure, lint/CDC and physical design constraints - together with the backend teams.

Work closely with multiple teams within organizations such as Architecture, Micro-Architecture, Verification, FW and Post-Silicon validation.

We are now looking for a Senior Chip Design Verification Engineer for the Switch Silicon group.

As a Chip Design Engineer at NVIDIA's Networking business unit, you'll join a group of passionate engineers to design and implement the next generation state of the art Switch Silicon chips. In this position, you'll make a real impact in a dynamic, technology-focused company while developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency!

What you'll be doing:
Work in a combined design and verification team which develops some of the switch silicon core units.
Build reference models, verify and simulate chip blocks/entities according to specifications.
Work closely with multiple teams within organizations such as Architecture, Micro- Architecture, and FW.

As a member of our ML group, you will design, prototype, and ship agentic GenAI systems used by chip design engineers to accelerate their day-to-day workflows. We are looking for a machine learning engineer who is energized by taking LLMs from "promising demo" to "depended-on tool": designing the agent loops, retrieval pipelines, and evaluation frameworks that make this transition real. Success in this role means agents that meaningfully shift how our customer teams work, backed by measurements you trust.

You will join a growing team of ML and software engineers building GenAI solutions for chip design teams. In this role, you will:

Design and build agentic systems featuring multi-agent coordination, long-horizon reasoning, tool use, and planning frameworks.
Develop end-to-end solutions, including domain-specific agents and high-performance retrieval pipelines spanning diverse data sources.
Partner with subject-matter experts on the customer teams to translate their workflows and rules of thumb into concrete agent assignments, prompts, tools, and guidelines.
Build the evaluation backbone for our agents: define success measures, curate offline golden sets, and instrument online telemetry to power feedback loops that drive fast, safe iteration with real cost and quality control.
Drive prompt engineering, model selection, and lightweight model adaptation as the workloads demand.
Collaborate closely with software engineers on the team to productionize your work, and with researchers and customers to shape what we build next.
Stay current with the rapidly evolving agentic and LLM landscape and bring promising techniques into our products with good engineering judgment.

You'll be joining our Physical Design team within Cisco Silicon One, which is responsible for the entire backend methodology and flow development from RTL to GDS. This is a critical part of the group leading the development of high-quality VLSI designs.

Our Backend Engineers handle all aspects of chip design, including Definition, Physical Synthesis, Place and Route, Optimization, Timing Closure, Design Floor Planning.

You will be leveraging your backend and physical design experience to drive the development, optimization, and innovation of CAD methodologies and tools, ensuring the highest quality and efficiency in our chip design flows from RTL to GDS.

As the Physical Design Manager, you will provide strategic and technical leadership to a team of engineers, guiding them through the entire chip design lifecycle. You will be responsible for the group's output, including Definition, Physical Synthesis, Place and Route, Optimization, Timing Closure, Design Floor Planning.

We are looking for an excellent Firmware Design Engineer for NVIDIA FW PHY Group. The person will closely work with NVIDIA FW development, architecture, chip design teams and gain deep understanding of NVIDIA's Networking products and technologies.

We have some of the most forward-thinking and hardworking people in the world working for us. Are you a creative and autonomous engineer who loves a challenge? Are you ready to become the engineer you always wanted to be? Come and be part of the best chip design team in the industry!

What youll be doing:

Enabling new SerDes and Optical Technologies

Implement FW functionality in signal processing units of NVIDIA products

Work closely with the architecture, HW, and SW design teams

Define implement and maintain FW algorithm to control the Silicon

Develop and test FW on emulation & simulation environments during the Pre-silicon phase

Debug and screen HW/FW/SW issues

Take an active part in silicon bring-up and SW development phases

Lead data-driven discussions about the product functionality and areas for improvement

Be part of a dynamic and motivated modem VLSI design team. Take part in a complex SOC VLSI chip-design activities with major focus on advanced digital signal processing and modem subsystem development, covering architectural, front-end design, verification and physical-design aspects.
VLSI development of digital modules from concept to final implementation, meeting physical design entry requirements
Be part of a multi-team developing advanced signal processing cores and subsystem solution
In charge of adjusting, deploying and integrating the subsystem into company design environment.