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לפני 20 שעות
דרושים בRisco Group
Location: Rishon Letsiyon
Job Type: Full Time
Responsible for the end-to-end development and design of hardware projects, from requirements definition and technical planning through development, integration, validation, and transfer to production. The role includes analog and digital circuit design, component selection, system architecture definition, and close collaboration with cross-functional teams to ensure successful product delivery throughout the entire product lifecycle.
Requirements:
B.Sc. in Electrical and Electronics Engineering.
At least 5 years of experience in digital circuit design and development.
Proven experience in hardware-software integrated product development.
Experience with PSPICE simulation. Advantaged
Experience with high speed. - Must
Experience with DDR
Knowledge of power supplies and amplifier design- Advantaged
Fluent English, both written and spoken.
This position is open to all candidates.
 
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8768894
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לפני 21 שעות
חברה חסויה
Job Type: Full Time and Hybrid work
The role combines people management, technical leadership, and ownership of hardware execution across multiple R D projects.
The HardWare Manager will lead experienced engineering teams, define priorities and resources, drive technical decisions, and ensure successful delivery from development through production.
Description
Lead and develop the Hardware Engineering team, including resource allocation, goal setting, recruitment, and professional development.
Own hardware execution across multiple R D projects, driving priorities, schedules, risks, and delivery.
Provide technical direction and review key architecture and engineering decisions, balancing performance, reliability, cost, manufacturability, and s
Requirements:
B.Sc. or higher in Electrical / Electronics Engineering or a related field.
10+ years of hardware/electronics engineering experience, including several years in engineering management or technical leadership.
Experience leading multidisciplinary R D teams and taking products from development through production.
Strong understanding of electronic system architecture, analog/digital electronics, power, PCB systems, communication interfaces, sensors, and motion systems.
Good understanding of electrical safety, grounding, EMC, and compliance.
Strong leadership, decision-making, prioritization, and cross-functional communication skills.
This position is open to all candidates.
 
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8877067
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לפני 17 שעות
חברה חסויה
Job Type: More than one
You will work closely with hardware engineers from schematic design through production, taking ownership of complex
multilayer PCB layouts in a multidisciplinary development environment.

What Youll Do
* Design complex multilayer PCBs (2-10 layers and above) using Cadence Allegro PCB Designer
* Work with OrCAD Capture schematics and implement them accurately in layout
* Define design rules according to electrical, EMC/EMI, and Signal Integrity requirements
* Design routing for high-speed analog and digital signals and communication interfaces
* Work with low and medium voltage designs, including isolation and separation requirements
* Collaborate with the mechanical team for enclosure integration
* Prepare manufacturing files (Gerber, Drill, Stackup, Pick & Place) and support production
* Work with Priority ERP for component database management
Requirements:
* 3-5+ years of PCB layout design experience
* Strong experience with Cadence Allegro PCB Designer
* Experience working with OrCAD Capture
* Experience designing multilayer boards
* Good understanding of Signal Integrity and Power Integrity
* Experience with EMC/EMI standards - significant advantage
* Experience with mixed-signal designs (Analog + Digital) - advantage
* Experience working with PCB manufacturers and assembly processes
* Strong teamwork and communication skills
This position is open to all candidates.
 
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8764396
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לפני 15 שעות
דרושים בSecretary
Job Type: Full Time
Microfabrication Engineer | Active Devices | Deep-Tech Startup

An innovative, seed-stage deep-tech startup developing cutting-edge technology is looking for an experienced Microfabrication Engineer to lead the development of active micro- and nanoelectronic devices.

This is a hands-on role focused on the design, fabrication, and characterization of active devices, including thin-film transistors (TFTs) and other structures integrated into novel implanted quantum devices. You will take ownership of device development from design and simulation through fabrication and testing, working independently and with external partners.

Responsibilities

Design, simulate, fabricate, and characterize active transistor devices.

Develop end-to-end fabrication processes in cleanrooms, including advanced lithography, metallization, and etching.

Integrate components with existing and novel devices.
Requirements:
Requirements
4+ years of experience designing and fabricating devices in cleanroom environments.
Hands-on transistor design experience, such as FET, TFT, or CMOS.
Strong knowledge of device physics, fabrication processes, and electrical characterization.
Experience with semiconductor materials such as GaN, silicon, metal oxides, or other wide-bandgap materials.
MSc or PhD in Physics, Electrical Engineering, Materials Science, or a related field, combined with relevant practical experience.
Strong analytical skills and a hands-on approach to device development.
Advantages
Experience with a-Si, IGZO, or TFT fabrication.
Experience with high-power FETs or RF FETs.
Silicon-on-insulator (SOI) experience.
Experience with analog or digital circuits.
Proficiency in device simulation tools such as ANSYS or COMSOL.
Background in control systems.
This position is open to all candidates.
 
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הגשת מועמדות
עדכון קורות החיים לפני שליחה
8862914
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לפני 19 שעות
דרושים בSCD
סוג משרה: משרה מלאה
חברת SCD, מהמובילות בעולם בפיתוח וייצור גלאים לראיית לילה הממוקמת במשגב (ליד כרמיאל) מגייסת מהנדס/ת תהליך מנוסה להצטרף לצוות ההנדסה ולהוביל פרויקטים של אוטומציה והעברת קווים ידניים לתהליכים אוטומטיים בתחום הSemiconductors.
תפקיד מהנדס/ת התהליך הינו תפקיד מאתגר בחזית ההנדסה והאוטומציה בתעשייה ביטחונית מתקדמת. התפקיד משלב הבנה מעמיקה של תהליכי ייצור עדינים ומורכבים לצד יכולת תכנון, אפיון ויישום פתרונות אוטומטיים (כולל רובוטיקה, vision, MES וmaterial handling).
תחומי אחריות:
הובלת תהליכי ייצור בתחום מוליכים למחצה (Assembly, Flip-Chip, Underfill, Polishing, Visual Inspection)
הגדרת צרכים הנדסיים ואפיונים למעבר מקו ידני לאוטומטי?
עבודה מול ספקים בארץ ובחול בתחום רובוטיקה, קובוטים, AMR, vision systems וMES
ביצוע ניסויים, DOE, שיפור תנובות (yield) והפחתת variation בתהליך
ניתוח תקלות ושיפור מתמיד (Continuous Improvement)
כתיבת מפרטים טכניים, הוראות עבודה (SOPs) ודוחות הנדסיים
דרישות:
תואר ראשון לפחות בהנדסת מכונות / חומרים / כימיה / חשמל / פיזיקה
ניסיון של לפחות 3 שנים בהנדסת תהליך בתעשיית הSemiconductors או Microelectronics
ניסיון משמעותי בעבודה עם ציוד אוטומטי / רובוטים / מערכות vision - יתרון
ניסיון בעבודה עם מערכות - MES, SPC, DOE - יתרון
יכולת ניתוח נתונים, פתרון בעיות, וכתיבה טכנית ברמה גבוהה (עברית ואנגלית)
ראייה מערכתית, יכולת ניהול פרויקטים ועבודה עצמאית
יתרונות:
ניסיון בהעברת קו ייצור ידני לאוטומטי
היכרות עם flip-chip bonding, underfill dispensing, polishing, inspection
ניסיון בעבודה מול חברות אינטגרציה (automation integrators) המשרה מיועדת לנשים ולגברים כאחד.
 
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הגשת מועמדות
עדכון קורות החיים לפני שליחה
8723391
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לפני 15 שעות
דרושים באלביט מערכות
Location: Haifa
Job Type: Full Time
We are looking for
Elbit Systems is looking for a Board Design Engineer for our Haifa site within the Aerospace Division. Join a leading global technology company developing advanced mission-critical systems and cutting-edge solutions across a wide range of defense applications. As part of our multidisciplinary engineering teams, you will take part in the development of advanced hardware platforms while working with cutting-edge technologies and complex engineering challenges
Requirements:
Bachelor's degree in electrical engineering
At least 3 years of experience in digital electronic board design
Experience with requirements capture and top-level architecture
Understanding of PCB layout methodologies and high-speed PCB design concepts
Experience working with signal integrity simulation tools such as Hyperlynx, Ansys, or similar tools
Experience with PCB design tools such as Altium Designer, Mentor Expedition, or Cadence
Experience in Voltage Regulated Modules DC/DC (VRM) design - Advantage
Background in retimers and redrivers - Advantage
Experience in Analog Circuit Design (amplifiers, filters, etc.) - Advantage
Problem-solving skills, teamwork abilities, and effective communication skills

*Only relevant applications will be answered
This position is open to all candidates.
 
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עדכון קורות החיים לפני שליחה
8773161
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לפני 17 שעות
דרושים באלביט מערכות
Job Type: Full Time
We are looking for
At Elbit Systems in Modi'in, we are looking for a Board Design Engineer to join a team developing advanced hardware solutions at the heart of cutting-edge defense technologies. This is an opportunity to take part in the development of mission-critical products, work with multidisciplinary teams, and make a real impact through innovative electronic design
Requirements:
Bachelors degree in Electrical Engineering
At least 7 years of experience in digital electronic design
Experience in board requirements definition and top-level architecture definition
Proficiency in PCB design tools such as Altium Designer, Mentor Expedition, or Cadence
Knowledge of PCB layout methodologies and signal integrity tools such as Hyperlynx or Ansys
Experience in Voltage Regulated Modules (VRM) design and analog circuit design - Advantage
Experience with processor-based hardware platforms, CPU architecture such as ARM or X86, and system -level design - Advantage
Knowledge of Python or other software languages, strong problem-solving skills, and ability to work effectively with multidisciplinary teams

*Only relevant applications will be answered
This position is open to all candidates.
 
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הגשת מועמדות
עדכון קורות החיים לפני שליחה
8798961
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לפני 21 שעות
דרושים בגב מערכות
מיקום המשרה: חולון
סוג משרה: משרה מלאה
תנאים נוספים:קרן השתלמות
לחברה ביטחונית וטכנולוגית מובילה בחולון דרוש/ה מהנדס/ת Verification מנוסה להצטרפות לצוות מקצועי העוסק בפרויקטים טכנולוגיים מתקדמים בתחומי FPGA, עיבוד אות ו-Controllers.
במסגרת התפקיד:
הגדרה, ארכיטקטורה ופיתוח סביבות Verification במתודולוגיית UVM
ביצוע Verification לתכנוני FPGA מרמת Block ועד Full-Chip
כתיבת TEST Plans, פיתוח תרחישי בדיקה ועבודה עד Coverage Closure
ביצוע RTL Debugging ברמת Block וברמת system
עבודה צמודה עם צוותי FPGA, מערכת ואלגוריתמים
עבודה בסביבת Linux וכתיבת סקריפטים לצורכי אוטומציה
דרישות:
תואר ראשון בהנדסת חשמל, אלקטרוניקה או מדעי המחשב - חובה
לפחות 5 שנות ניסיון ב-Verification של FPGA או ASIC - חובה
ניסיון מעשי ב-SystemVerilog ובמתודולוגיית UVM - חובה
ניסיון בפיתוח סביבות Verification ברמת Block וברמת Full-Chip
ניסיון בכתיבת TEST Plans ובעבודה עד שלב ה-Coverage
ניסיון ב-RTL Debugging ברמת Block ועד system Level
ניסיון בעבודה עם כלי סימולציה - ניסיון ב-Questa Simulator מהווה יתרון
ניסיון בכתיבת סקריפטים ב- Python, TCL, Bash או Csh
ניסיון בעבודה בסביבת Linux
אנגלית טכנית ברמה טובה מאוד
יכולות אנליטיות גבוהות ויכולת עבודה עצמאית ובצוות מולטי-דיסציפלינרי המשרה מיועדת לנשים ולגברים כאחד.
 
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עדכון קורות החיים לפני שליחה
8815478
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לוח ללקוחות VIP בלבד
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Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
This role is for a analog IP lead who will enable us to produce fully functional first silicon IP designs. The responsibilities include all phases of silicon development from definition to high quality production.


Specifying requirements and circuit architecture for analog blocks and sub-blocks of an IP, lab bring-up, characterization and debug, write specifications, test plans and characterization reports, work with chip design teams, system HW and SW design teams, ATE PE.

You will be responsible for:
Develop the circuit design of the IPs analog blocks following established design guidelines based on microarchitecture spec. Own all aspects of circuit design development.
Work and collaborate with other designers in the group to deliver results.
Work with FE & BE teams to ensure quality analog integration.
Work with power/performance and functional verification team to define and validate operation sequences.
Work with multi-disciplinary teams to make sure designs are delivered on time and with highest quality by incorporating proper checks at every stage of the design process.
Work with post silicon validation groups to ensure the design meets the power/performance targets.
Requirements:
Minimum Qualifications
5+ years experience in analog IC design.
Deep understanding of transistor device characteristics.
Deep understanding of power, performance and area trade-off in mixed-signal designs.
A proven track record of high-performance designs in high volume production for low power applications.
Knowledge of analog IC design flow and tools.
Strong communication skills are a must, as the candidate will interface with a lot of different groups within the company.
Excellent social and interpersonal skills.
Hands-on design expertise in one or more of the following areas: High Speed, Low Power I/O Circuit Design: familiarity with PHY principles and concepts including forwarded clock topologies, training and calibration schemes etc.); High Speed Clock Path: low jitter distribution, DCD correction, phase shift (through delay lines or phase interpolation); Analog Front End: low noise and high-resolution signal conditioning prior to ADC and Op-Amp, switched-cap and continuous time filters, reference/bias generation, LDO etc.; Data Conversion: ADC and DAC subsystem. Different styles of data converters (ΔΣ, SAR, pipelined, SAR and flash) and associated calibration techniques.
Strong initiative and ownership of responsibilities, productive.
Ability to work well in a team and be productive under tight schedules.
Experience with advanced FinFET CMOS processes - an advantage.

Preferred Qualifications
B.Sc. in Electrical Engineering.
MS.c\ PhD - advantage.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8876825
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Location: Yokne'Am Illit
Job Type: Full Time
We are pioneering the future of medical diagnostics with our innovative capsule endoscopy solutions. Imagine a world where diagnosing gastrointestinal conditions is as simple as swallowing a pill which captures with imagers and different sensors the digestive system and transmit it in real time. Our cutting-edge technology not only makes this possible but also revolutionizes the patient experience, providing a non-invasive, accurate, and efficient diagnostic tool. We are seeking a dynamic and visionary Analog and RF engineer to join our dedicated team, driving the development and integration of our next-generation capsule endoscopy devices.
As a Senior Analog & RF Engineer specializing in capsule endoscopy development, you will play a key role in the design, development, and integration of the critical analog and RF communication path between the capsule, located inside the patients digestive system, and the external recorder worn by the patient.
You will be responsible for developing high-performance, low-power analog and RF solutions that enable reliable wireless communication, contributing directly to the performance and advancement of our next-generation medical devices.
In this critical role, you will collaborate closely with System Engineers, PCB design and Layout, Firmware Developers, Modem Algorithm Engineers, and Mechanical Design teams to develop and integrate advanced solutions across the system. You will work in a highly collaborative, open-minded environment that encourages new ideas, creativity, and innovation, contributing to cutting-edge medical technology that enhances patient care.
Primary responsibilities:
Own and drive the Analog & RF communication path from architecture definition through detailed design.
Work closely with leading semiconductor suppliers and technology partners on a system on Chip definition, development, and integration of custom IC/ASIC solutions, contributing to system architectural decisions and ensuring alignment with system-level requirements.
Research, evaluate, and define communication receiver and transmitter architectures, including Zero-IF, Low-IF/NZ-IF, Superheterodyne, and other relevant architectures, based on system requirements and product constraints.
Perform system-level RF and Analog analysis, including noise budget, link budget, dynamic range, sensitivity, linearity, distortion, interference, and overall communication-channel performance.
Develop simulation models and methodologies to evaluate communication-channel performance and validate architectural and design decisions prior to hardware implementation.
Design and specify the Analog transmitter and receiver signal paths, including filtering, amplification, gain stages, matching networks.
Analyse and optimize antenna design and RF performance, including antenna matching, efficiency, radiation characteristics, impedance, and interaction with the capsule and surrounding biological environment.
Drive a system on chip designs from proof-of-concept and laboratory prototypes into production-ready medical devices.
דרישות:
BSc \ MSc in Electrical Engineering.
7+ years of hands-on experience in very Low power Analog and RF engineering, preferably in wireless communication systems, RFICs, or mixed-signal systems; Familiarity with SoC/mixed-signal architecture, including considerations for integrating analog, RF, digital, and power-management functions.
Strong understanding of RF and analog communication architectures, including Zero-IF, Low-IF/NZ-IF, Superheterodyne, and related receiver/transmitter architectures; Proven experience with analog/RF transmitter and receiver design, including filters, amplifiers, LNAs, PAs, mixers, matching networks, and signal-conditioning circuits; Strong understanding of PCB-level RF implementation, including layout, grounding, shielding, power integrity, signal integrity, and RF isolation.
Preferred Qualifications:
Experience in writing design and technical specifications.#EN המשרה מיועדת לנשים ולגברים כאחד.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8862957
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05/10/2026
Location: Ahihud and Karmiel
Job Type: Full Time
Semi Conductor Devices (SCD), a leading worldwide supplier of high-end Infrared Detectors and thermal imaging cores, is looking for an Analog / Mixed-Signal VLSI Designer to join its VLSI R&D group. The role involves design and validation of custom analog and mixed-signal ASICs (ROICs) for advanced IR imaging systems, working closely with experienced analog, digital, system, and hardware teams.
Responsibilities:
Design and verify Analog and Mixed-Signal circuit blocks for IR image sensors (ROICs) under the guidance of senior designers Participate in the full ASIC development flow: specification review circuit design verification integration silicon bring-up lab validation Contribute to block-level simulations, documentation, and design reviews Work closely with digital designers, layout engineers, electronics, and system teams to support chip integration Support post-silicon validation and lab measurements, including debug and correlation to simulations Gain exposure to advanced CMOS processes, image sensor architectures, and system -driven design constraints.
Requirements:
Basic requirements BSc / MSc in Electrical Engineering.
2-5 years of hands-on experience in analog or mixed-signal VLSI design (industry or advanced academic work).
Basic understanding of analog design fundamentals: gain, bandwidth, noise, stability, matching, PVT effects.
Experience reading and working from specification documents.
Familiarity with analog simulation and schematic tools (e.g., Cadence Virtuoso / ADE / Spectre).
Ability to work well in a team-oriented, multidisciplinary environment Good written and spoken English.
Advantages:
Experience with image sensors, ROICs, or custom mixed-signal ASICs. Design experience with one or more of the following:
o Analog front-ends, amplifiers, bias circuits.
o ADCs or data converters o Low-noise and/or low-power analog design. Exposure to silicon bring-up and lab validation.
Strong motivation to learn, take responsibility, and grow as an analog designer.
Location: Near Karmiel.
This position is open to all candidates.
 
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01/10/2026
Location: Tel Aviv-Yafo
Job Type: Full Time
Design high-performance analog and mixed-signal ICs optimized for precision, power, and area, driving prototype and product iterations from architecture to silicon validation.

Responsibilities
Design and simulate analog and RF integrated circuits, including critical blocks such as amplifiers, mixers, PLLs, ADCs, DACs, and bias/reference circuits, with a focus on signal integrity, linearity, and precision.

Optimize circuits for power, area, and performance trade-offs, ensuring designs meet system-level requirements across process, voltage, and temperature (PVT) variations.

Collaborate closely with optics, simulation and PCB teams to define architecture and block-level specifications for successive prototypes and product iterations, ensuring tight alignment with overall performance and integration goals.

Work with layout engineers to guide floor-planning and physical design, minimizing parasitic effects and preserving analog precision in layout-sensitive blocks.

Support post-silicon validation and bring-up, defining test plans, analyzing lab measurements, and correlating results with simulation to refine future design iterations.

Language: English at a proficient level. French is a plus.
Requirements:
A sound mathematical understanding and deep physical intuition of analog electronics, as well as analog voltage-to-current and current-to-voltage conversion at low and high frequencies.

Experience in designing high-precision analog systems for signal processing or power electronics. Experience working with high-frequency analog signals is valued.

Extensive experience in IC design and post-layout design methodology using standard industry tools like Cadence Virtuoso.

Proficiency in designing and optimizing mixed-signal circuits, including DACs and ADCs at low (kHz-MHz) and high (>GHz) frequencies, and signal conditioning circuits, ensuring flawless integration between analog RF components and digital processors.

Strong understanding of signal integrity, crosstalk, and noise reduction techniques in mixed-signal environments, particularly in high-frequency RF systems interfacing with digital processors.

Advanced node experience required (<28nm).
This position is open to all candidates.
 
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6 ימים
Location: Hod Hasharon
Job Type: Full Time and Hybrid work
Required Analog Design Engineer
Job Location:
Israel, Hod HaSharon (Hybrid)
Job Brief:
Be part of the team that is responsible for developing and optimizing the state-of-the-art analog circuits that power our embedded ReRAM and mixed-signal products.
Job Description:
In this role, you will take the lead on designing high-performance analog circuits, driving innovation in mixed-signal systems from concept through production. Youll partner closely with digital design, system architecture, and process engineering teams, playing a key role in bringing our next generation of memory products to market:
Design and develop complex analog circuits, including amplifiers, complex memory arrays, and LDOs, ensuring reliability and performance
Collaborate with cross-functional teams to define system specifications and architecture, translating requirements into actionable designs
Conduct thorough simulations and analyses to validate designs, using tools such as Cadence Virtuoso and Siemens Solido while identifying and mitigating risks early in the design process
Oversee the transition of designs from prototype to production, ensuring compliance with quality and industry standards
Apply deep expertise in analog circuit design - including amplifiers, voltage references, comparators, and ADCs/DACs - to push the boundaries of performance.
Requirements:
Required Skills and Experience:
Bachelors or Masters degree in Electrical Engineering or a related field
6+ years of experience in analog circuit design, with a proven track record of successful product launches
Strong knowledge of analog design principles and methodologies, including feedback systems and signal integrity
Proficiency in industry-standard design and simulation tools
Experience with CMOS technology, 90nm-16nm
Familiarity with mixed-signal design and signal processing concepts
Strong communication skills, with the ability to convey complex concepts to diverse audiences
Proven ability to work collaboratively in a team-oriented environment while also excelling in independent projects
A proactive and innovative mindset, eager to push the boundaries of technology
Nice to have:
Ability to model circuits using VerilogA or SystemVerilog
Familiarity with sign-off simulations (IR/EM)
Hands-on experience with layout tools
Understanding of manufacturing processes and testing methodologies related to analog circuits.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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30/09/2026
Location: Yokne`am
Job Type: Full Time
Our Analog Layout design team is looking for a Senior Analog Layout Design Engineer - someone who is excited to join a growing group of diverse individuals responsible for handling challenge high-speed mixed-signal circuit designs. We have continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI - the next era of computing. We are a learning machine that constantly evolves by adapting to new opportunities that are hard to solve, that only we can pursue, and that matter to the world. This is our lifes work, to amplify human creativity and intelligence.

What you'll be doing:

Perform physical layout for mixed-signal functions like PLL's, high speed I/O circuits, SerDes, general I/O's, ESD structures designs in state-of-the-art sub-micron CMOS FinFET technologies using Cadence tools.

You will work with ASIC and mixed-signal engineers to customize designs for integration in VLSI products.

Job duties will include floor planning, custom layout and verifying against design rules and schematics, EM/IR analysis.
Requirements:
What we need to see:

You will have a minimum of 5 years of relevant mask analog layout experience.

An Electronics Practical Engineer certificate or a B.Sc. in Electrical Engineering.

Proven understanding of analog circuit layout concepts in submicron CMOS and FinFet technologies - such as Operational Amplifiers and ADC/DACs.

You are an expert with Cadence custom circuit design tools - particularly Virtuoso.

Experience running and debugging DRC and LVS with verification tools such as ICV, Calibre.

You can work effectively in a team, good interpersonal skills, enthusiasm and positive energy.

Ways to stand out in the crowd:

Proficiency in scripting languages like python, skill.

Knowledge of DRC and LVS checking flows, EM/IR tools, ability to customize DRC and LVS decks.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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8837795
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Location: Herzliya and Haifa
Job Type: Full Time
As an Analog Layout Automation Engineer, youll convert design concepts into silicon by collaborating with circuit designers and using advanced, including AI-powered, CAD tools to create high-performance analog and mixed-signal layouts. You will review floor plans, analyze circuits, run verification suites, and resolve LVS/DRC/ERC issues to deliver next-generation SOCs. Youll also drive automation by developing scripts, improving workflows, and applying AI/ML for layout optimization, verification acceleration, advanced modeling, intelligent quality metrics, reduced manual effort, and data-driven design insights.
Requirements:
Minimum Qualifications
BS degree in technical discipline with minimum 10 years of relevant experience.

Preferred Qualifications
Experience designing analog and mixed-signal layouts in deep-submicron CMOS and FinFET technologies.
Strong programming/scripting skills in SKILL, Perl, TCL, Shell, and/or Python, with emphasis on layout automation, productivity tooling, and data analysis.
Solid understanding of supervised and self-supervised learning, convolutional neural networks (CNNs), and core training concepts such as loss functions, backpropagation, and optimization.
Hands-on experience with PyTorch for model development and experimentation.
Demonstrated ability to automate layout tasks, flows, and quality checks using scripting and CAD tools.
Proven record in implementing high-quality analog layouts with tight device matching, low noise, and low power consumption.
Familiarity with failure-prone circuit/layout structures, analog and DFM best practices, and the ability to diagnose and resolve layout-related issues.
Strong proficiency in custom and standard-cell floor planning, hierarchical layout assembly, and physical integration.
Understanding of image processing fundamentals, spatial representations, multi-channel image handling, segmentation, and object detection concepts.
Technical understanding of IR drop, RC delay, electromigration, self-heating, coupling capacitance, and related reliability concerns.
High proficiency in interpreting physical verification reports, including DRC, ERC, and LVS.
Experience using advanced Cadence Virtuoso features (XL, EAD, APR, Constraint Manager), and familiarity with Cadence Innovus.
Experience with CAD automation workflows and PCell creation.
Excellent communication skills and the ability to work effectively with cross-functional teams.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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עדכון קורות החיים לפני שליחה
8847766
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28/09/2026
Location: Be'er Sheva
Job Type: Full Time
We are looking for a Senior Chip Design Engineer to join our Network Adapter Silicon group. As a Senior Design Engineer in our Networking Silicon team, you will join a group of passionate engineers to design and implement the next generation state-of-the-art Networking Silicon chips. In this position, you will make a real impact in a dynamic, technology-focused company while developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency!

What you'll be doing:

Work in a combined design and verification team which develops core units within the Networking silicon.

Own micro-architecture definition and RTL implementation of chip blocks/entities according to specifications, performance, timing, area and power requirements.

Drive your design through the full implementation flow - synthesis, timing closure, lint/CDC and physical design constraints - together with the backend teams.

Work closely with multiple teams within organizations such as Architecture, Micro-Architecture, Verification, FW and Post-Silicon validation.
Requirements:
What we need to see:

B.Sc. in Electrical Engineering or Computer Engineering, or equivalent experience.

5+ years of proven experience in RTL design.

Strong knowledge of HDL (Verilog/SystemVerilog/VHDL).

Solid understanding of digital design fundamentals - pipelining, clock domain crossing, arbitration and low-power techniques.

Familiarity with synthesis and static timing analysis is an advantage.

A great teammate with good communication and interpersonal skills.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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עדכון קורות החיים לפני שליחה
8836164
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27/09/2026
Location: Tel Aviv-Yafo
Job Type: Full Time
We're looking for exceptional engineers to join our Signal/Power-Integrity and Packaging team. A team that sits where the Silicon meets the Board, bridging the gap between what happens internally at the DIE and the overall system interconnect and the external memories and peer devices.
What sets us apart:
Small team, yet a one stop shop for IP electrical integration at the DIE level, Package design, SI/PI simulations, Layout, Board-design and advanced lab characterization.
Combining Signal-Integrity and Layout, to come up with optimized Package and PCB designs.
Holistic view of the entire interconnect, from the DIEs metals, through the Package, to the PCB traces, and all the way to the peer device.
In-depth post-silicon characterization, using advanced measurement techniques, far exceeding traditional compliance measurements.
Deep dive mentality, in both theory and the bolts and nuts that make the internal circuitry of the electrical interfaces.

The SIP (Signal-Integrity & Packaging) team is part of Annapurna-Labs Chip development team.
The team is dealing with the external electrical interfaces of the device, from their Signal/Power-integrity and electrical usage perspectives.
The teams work includes close work with the BackEnd team on integrating these interfaces to the Die, the package layout design of the BGAs substrate, Signal and power integrity simulations, and working with the system team to come up with optimal pin-out and optimal PCB breakout schemes.

As a SIP team member, you will assume responsibility for all electrical aspects of physical interfaces of advanced I/Os, PLL, Memory and SerDes interfaces, from integration at the Die level, through SI/PI simulation and package layout, to reference board design aspects.

This position is for an experienced engineer with strong background in high-speed electrical interfaces, such as DRAM, PCIe, Ethernet SerDeses. The line of work is multi-disciplinary, combining Package-Design, Back-End integration of electrical IPs, SI/PI extractions & simulations.


Key job responsibilities
Deep dive into electrical IPs, integrated into the DIE;
I/O ring design and close work with Backend team on floor-planning all I/O interfaces at the DIE level.
Lead test studies of Die bump-out arrangements and Package substrate breakout.
Lead layout test studies of package pin-out arrangements and PCB board breakout.
Design large and complex package substrates.
Carry advanced SI/PI extractions and simulations to validate the design from the silicon to the peer device at the board level.
Requirements:
Basic Qualifications
- BSc or MSc in Electrical Engineering or in related field.
- At least 8 years of experience in a similar role.
- Experience in Layout (PCB or Package), or BackEnd integration of electrical IPs.
- Familiarity with Signal and Power integrity simulation tools.

Preferred Qualifications
- Knowledge of Chip, Package and PCB co-design methodology.
- Knowledge in high-speed digital interfaces such as DRAM/PCIe/SerDes.
- Knowledge in power-integrity and power-delivery of low-voltage high-current
- Hands on experience with lab testing and characterization.
- Familiarity with simulation/extraction tools (e.g. HFSS, Sigrity, HSpice).
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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8834463
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28/09/2026
Location: Tel Aviv-Yafo
Job Type: Full Time
We are now looking for a Senior Chip Design Engineer to join our Switch Silicon team. As a Chip Design Engineer in our Networking business unit, you'll join a group of passionate engineers to design and implement the next generation state-of-the-art Switch Silicon chips. In this position, you'll make a real impact in a dynamic, technology-focused company while developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency!

What You'll Be Doing:

Work in a design/verification team which develops core units within the Switch silicon.

Micro-architecture of rtl verification environments planning for units and modules.

Design RTL of units/blocks according to Arch. specifications under challenging constraints with high orientation to power, area, and performance.

RTL synthesis, timing, supporting verification, and silicon post TO activities.

Work closely with multiple teams within organizations such as Architecture, u-arch, Full chip Micro-Architecture, BE, and FW.
Requirements:
What We Need To See:

Electrical Engineering B.Sc. or Computer Engineering B.Sc. graduate with high scores or equivalent experience.

5+ years of experience in RTL design.

Knowledge in network protocols and/or HPC and distributed calculations - advantage.

A team player with good communication and interpersonal skills.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8835895
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תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
27/09/2026
Location: Haifa
Job Type: Full Time
We're looking for exceptional engineers to join our Signal/Power-Integrity and Packaging team. A team that sits where the Silicon meets the Board, bridging the gap between what happens internally at the DIE and the overall system interconnect and the external memories and peer devices.
What sets us apart:
Small team, yet a one stop shop for IP electrical integration at the DIE level, Package design, SI/PI simulations, Layout, Board-design and advanced lab characterization.
Combining Signal-Integrity and Layout, to come up with optimized Package and PCB designs.
Holistic view of the entire interconnect, from the DIEs metals, through the Package, to the PCB traces, and all the way to the peer device.
In-depth post-silicon characterization, using advanced measurement techniques, far exceeding traditional compliance measurements.
Deep dive mentality, in both theory and the bolts and nuts that make the internal circuitry of the electrical interfaces.

The SIP (Signal-Integrity & Packaging) team is part of Annapurna-Labs Chip development team.
The team is dealing with the external electrical interfaces of the device, from their Signal/Power-integrity and electrical usage perspectives.
The teams work includes close work with the BackEnd team on integrating these interfaces to the Die, the package layout design of the BGAs substrate, Signal and power integrity simulations, and working with the system team to come up with optimal pin-out and optimal PCB breakout schemes.
We are looking for highly motivated Electrical Engineering graduates, or engineers with up to 3 years' experience in related fields, to join our growing team specializing in Signal Integrity and IC Package Design. The position offers a unique entry point into a diverse and multidisciplinary domain.

Key job responsibilities
Work on advanced high-speed interfaces such as PCIe, DDR and Ethernet.
End-to-end solution of high-speed interfaces; from floor-planning at the DIE level, through Package and PCB routing, addressing both robust SI/PI considerations as well as optimizing layout routing.
Signal and power integrity modeling and simulation of high-speed interconnects using advanced SI/PI simulation tools.
Requirements:
Basic Qualifications
- BSc in Electrical Engineering or in related field.
- Background in board design, or lab measurement of digital high-speed interfaces.
- Familiarity with Signal and Power integrity simulation tools.

Preferred Qualifications
- Familiarity with high-speed digital interfaces such as DRAM/PCIe/SerDes.
- Previous experience with lab equipment (e.g oscilloscope, spectrum analyzer).
- Familiarity with simulation/extraction tools (e.g. HFSS, Sigrity, HSpice).
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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עדכון קורות החיים לפני שליחה
8834477
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30/09/2026
Location: Yokne`am
Job Type: Full Time
We are looking for a Chip Design micro architect for the Networking Silicon group. As a chip micro architect in our Networking business unit, you will join a group of passionate engineers to implement the next generation state-of-the-art BlueField DPU SOC and/or ConnectX NIC that deliver breakthrough networking, security, cloud, AI and storage performance to the AI data centers. As a design micro architect, you will make a real impact in a dynamic, technology-focused AI company while developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency!

What you'll be doing:
You will be part of a small and exclusive micro-architecture team and have the opportunity to make a real impact in designing the micro-architecture of the next generation state of the art network card hand in hand with the product architect making sure implementation meets the product goals.
Work closely with architecture and design teams to thoroughly understand system requirements and identify micro-architecture solutions, while weighing trade-offs related to performance, area and power consumption.
Break high-level arch requirements into lower-level design building blocks. Focal point for the design team, reviewing implementation and guiding the team.
Find bottlenecks early in the development cycle using performance analysis and simulations.
Use your understanding of the entire chip and system to identify and debug pre and post silicon full-chip issues.
Requirements:
What we need to see:
B.Sc. in Electrical Engineering or equivalent experience.
8+ years of relevant experience in architecture/micro-architecture.
Deep understanding of RTL design including timing, area, power, and complexity considerations
Problem solving and analytical skills
Ability to document and present requirements to peers and design teams.
A team player with strong communication and interpersonal skills.

Ways to stand out from the crowd:
Professional RTL design implementation and implementation definition experience.
Prior experience of defining a network card and/or Smart NIC SoC, high-speed interconnects, switches.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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עדכון קורות החיים לפני שליחה
8837872
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18/10/2026
Location: Herzliya
Job Type: Full Time
Nuvoton Israel is a leading supplier of custom SoC and security hardware solutions for the computing and server markets. As a well-established and independent design center, we collaborate closely with top-tier customers such as HP, Dell, Qualcomm, Microsoft, and Google to develop advanced solutions that secure, control, and manage our customers platforms. We are seeking a talented and experienced Chip Architect to join our team. The ideal candidate is a self-motivated, fast learner with a strong background in hardware and system architecture. This role requires a technology leader capable of driving multidisciplinary programs and working closely with customers and internal teams across the entire product lifecycle. Responsibilities:
* Translate customer and marketing requirements into detailed SoC architectural specifications
* Provide functional specifications for chip hardware design and embedded software development
* Lead architectural decisions and serve as a technical authority across cross-functional teams
* Collaborate with customers and marketing to refine product requirements and align on technical solutions
* Support design, implementation, and verification processes throughout development
* Participate in system debugging, root-cause analysis, and issue resolution
* Support post-silicon bring-up, system integration, and software enablement
Requirements:
* BSc or MSc degree in electrical / computer engineering
* 5+ years of proven experience in SoC/board design and architecture (mandatory)
* Strong VLSI/board design background (mandatory)
* Board and system design understanding
* Excellent analytical, communication, and leadership skills
* Ability to work effectively in a cross-functional, multidisciplinary environment
* Highly motivated with strong self-learning capabilities Advantages:
* Experience with standard interfaces (e.g., USB, SPI, I2C, etc.) - Advantage
* Experience in board/system design and integration - Advantage
* Experience in embedded software - Advantage
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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8675258
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Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Required SoC Chip Architect, Cloud, Silicon
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As an SoC Chip Architect, you will lead the definition of groundbreaking, high-performance custom silicon and multi-chiplet systems for our Cloud AI infrastructure. You will bridge the gap between hyperscale data center workload requirements and silicon implementation across various domains, collaborating with cross-functional partners to design scalable, energy-efficient, and feature-rich SoCs.
You will be part of a team pushing the boundaries of custom silicon engineering, architecting next-generation data center products that deliver industry-leading performance, low latency, and massive bandwidth for Cloud and our flagship AI services.
Responsibilities
Lead top-level SoC architecture across multiple disciplines, including IP architects, digital design, verification, physical design, validation, firmware, power management, security, and system software.
Architect and analyze complex multi-chiplet systems, including chip partitioning, die-to-die (D2D) interconnects, advanced packaging constraints, and high-performance on-chip fabrics (NoC).
Define top-level SoC subsystems, memory hierarchies, clock distribution, reset schemes, and power domains to ensure optimal system performance and operational efficiency.
Formulate end-to-end operational flows, latency models, and system throughput analyses for data center workloads.
Own the SoC architecture specification and lead it throughout the complete product life-cycle: concept, modeling, implementation, tape-out, and post-silicon bring-up.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering, Computer Engineering, or equivalent practical experience.
15 years of experience leading the architectural definition of high-performance SoCs, ASICs, or multi-chiplet systems from concept through production.
Experience architecting SoC interconnects, memory hierarchies, and system-level fabrics.
Experience writing, owning and maintaining comprehensive SoC architecture specifications.
Experience working across hardware, firmware, and system software boundaries with system-level reasoning.
Preferred qualifications:
Masters degree or PhD in Electrical Engineering or Computer Engineering.
Experience with AI workload analysis, their mapping across different data center system components, and optimizing hardware solutions to better serve them.
Experience scaling and optimizing high-performance AI accelerators, compute chiplets, or IO Hub SoCs for data center/cloud deployments.
Proven track record of architecting multi-chiplet systems utilizing cutting-edge silicon process technology and advanced packaging (2.5D/3D, D2D interfaces such as UCIe, BoW, or high-speed SerDes).
This position is open to all candidates.
 
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תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
Location: Herzliya
Job Type: Full Time
Join our team in a pivotal role where you'll own the entire IP-level netlist generation and timing convergence journey from synthesis to sign-off.
You'll drive synthesis, UPF power intent, scan insertion, and external IP integration while architecting timing constraints for both standard and complex custom designs that ensure sign-off quality from day one.
Working at the intersection of multiple disciplines, you'll partner closely with RTL designers to deeply understand design intent and clock architecture, collaborate with CAD teams to shape and optimize cutting-edge flows, and team with Physical Design engineers to achieve flawless timing sign-off.
We're seeking an innovative thinker who brings fresh perspectives to timing analysis methodologies and proactively identifies and resolves timing challenges to eliminate pessimism and accelerate convergence, ultimately making their mark on next-generation chip design.
Requirements:
Minimum Qualifications
Bsc/Msc in Electrical Engineering
5+ years of experience in the field
At least 2+ years of experience in writing ASIC timing constraints and achieving timing closure
Expertise in STA tools (Primetime) and flow generation
Knowledge of the ASIC design timing closure flow and methodology
Preferred Qualifications
Understanding of timing corners/modes
Familiarity with process variations and signal integrity-related issues
Hands-on experience in generating and managing timing/SDC constraints, proficient in scripting languages (Tcl and Perl)
Knowledge of synthesis, DFT, and backend-related methodologies and tools
Strong communication skills are required, as you will interact with various groups
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8866844
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