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The HW PM team focuses on HW engineering development activities; managing multiple complex programs that support the development and TTM of new Networking products for datacenter segment. The role of PM organization gives an individual the principal responsibility of overseeing and coordinating the program and rollout, the mission is to cover all stages of program development, including schedule planning, resource allocation, cohesive program execution, change management, and cycle closure with post-mortems.


What you'll be doing:

Track milestones, manage resources, coordinate activities, assign tasks, and lead progress.

Collaborate with cross-functional teams to address gaps and resolve issues.

Run project meetings, share updates, coordinate objectives, review projects, generate reports, and escalate to management as needed.

Identify threats, solve daily problems, and quickly implement mitigation strategies.

Optimize scheduling, logistics, staffing, testing, communication, implementation, and execution.

Assess risks, execute risk management plans, and ensure alignment with program milestones.

Report project status to leadership regularly.

We are looking for a program manager with technical skills for HW R&D organization, responsible for programs and project on various Network products. The PM will drive execution and scheduling of HW projects while aligning with corporate priorities and constraints.

What you'll be doing:

Responsibility to coordinate between all project stakeholders such as marketing, engineering teams, operations etc. from initial requirements definition through delivery.

Work with project managers and engineers to ensure consistency with company strategy, commitments, and goals.

Responsibility for developing and implementing HW methodologies and Project management processes and tools.

We are seeking talented, creative and disciplined engineers to join the best-in-class team that plays a significant part in the development of new silicon for our eco-systems by engaging in a dynamic, highly collaborative environment with the focus on the following goals.

Deep understanding of components/modules within wireless communication systems and the corresponding calibration and impairment reduction techniques - Develop methods/algorithms to alleviate hardware induced impairments by calibration, cancellation and other applicable techniques - PHY firmware architecture and design, including calibrations, real-time processing flows, collaboration with RF hardware, microcode, and MAC layer.

Develop highly efficient designs delivering outstanding performance, optimizing power and memory footprints while meeting hard-realtime latency requirements.

Debug real-time systems with limited visibility, working hands-on with development boards and lab equipment.

Collaborate with Radio, MAC, and Systems engineering teams to architect, define and implement innovative algorithms, calibrations, and protocols.

Support pre-silicon validation efforts, including simulation, emulation, and FPGA prototyping.

Develop SoC test and calibration capabilities for chip, module, and product factories.

Support post-silicon bringup, validation, performance characterization, system integration and debugging. - Repeatedly measure and optimize results using various test harnesses - Automate calibration and verification processes

We are looking for a Chip Design micro architect for the Networking Silicon group. As a chip micro architect in our Networking business unit, you will join a group of passionate engineers to implement the next generation state-of-the-art BlueField DPU SOC and/or ConnectX NIC that deliver breakthrough networking, security, cloud, AI and storage performance to the AI data centers. As a design micro architect, you will make a real impact in a dynamic, technology-focused AI company while developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency!

What you'll be doing:
You will be part of a small and exclusive micro-architecture team and have the opportunity to make a real impact in designing the micro-architecture of the next generation state of the art network card hand in hand with the product architect making sure implementation meets the product goals.
Work closely with architecture and design teams to thoroughly understand system requirements and identify micro-architecture solutions, while weighing trade-offs related to performance, area and power consumption.
Break high-level arch requirements into lower-level design building blocks. Focal point for the design team, reviewing implementation and guiding the team.
Find bottlenecks early in the development cycle using performance analysis and simulations.
Use your understanding of the entire chip and system to identify and debug pre and post silicon full-chip issues.

The team leads the development of networking infrastructure for NVIDIA's next-generation data centers, focusing on accelerated performance while enabling optimized end-to-end GPU connectivity, focusing on datacenter-level optimized solutions for AI.

As a leader of our switch Hardware Engineering team, you'll guide, encourage, and drive a team of highly skilled hardware engineers, providing them with stimulating and ambitious assignments and enabling them to stay creative and motivated while delivering products on schedule.

What You'll Be Doing:

Build the best team to design and execute high-performance switch system from concept to mass production.

Be a key member of the technical leadership team developing world-class switch designs.

This position is hands-on and will require a deep understanding of all technical/engineering aspects of the project with intimate familiarity with the entire development flow. From a technical standpoint, you will lead and support engineering teams in the following areas: specification definition, electrical schematics, opto-mechanical design, component selection, layout guidance, hands-on lab testing, production processes, qualification workflows, micro-architecture development, verification, characterization, design for testability, cost optimization, reliability, and more.

Collaborate with and integrate all HW project disciplines: Board Design, Assembly Process, Mechanics, Thermal, PCB Layout, Process , Production Engineering, Software/Firmware, Procurement, NPI, and more.

Plan and oversee your teams work on multiple simultaneous development projects in coordination with the broader leadership team. Manage direct reports, set goals, provide coaching, conduct performance appraisals, plan careers, and make compensation recommendations.

Collect, examine, and filter requirements from internal customers such as marketing, software, and systems engineering to assemble a comprehensive plan of record for next-generation switches while planning resource allocation for projects and assign team members effectively.

Schedule projects, create realistic outcome estimates, and drive timely, successful execution for high-volume manufacturing.

Nuvoton Israel is a leading supplier of custom SoC and security hardware solutions for the computing and server markets. As a well-established and independent design center, we collaborate closely with top-tier customers such as HP, Dell, Qualcomm, Microsoft, and Google to develop advanced solutions that secure, control, and manage our customers platforms. We are seeking a talented and experienced Chip Architect to join our team. The ideal candidate is a self-motivated, fast learner with a strong background in hardware and system architecture. This role requires a technology leader capable of driving multidisciplinary programs and working closely with customers and internal teams across the entire product lifecycle. Responsibilities:
* Translate customer and marketing requirements into detailed SoC architectural specifications
* Provide functional specifications for chip hardware design and embedded software development
* Lead architectural decisions and serve as a technical authority across cross-functional teams
* Collaborate with customers and marketing to refine product requirements and align on technical solutions
* Support design, implementation, and verification processes throughout development
* Participate in system debugging, root-cause analysis, and issue resolution
* Support post-silicon bring-up, system integration, and software enablement

In this visible role, you will be responsible for taking part of a SoC verification process of a large scale SoC.
You will develop verification test plans, tools, test benches, protocol monitors, and high-coverage stimulus vectors. Apply advanced techniques to achieve verification with the highest quality, productivity, and time-to-market. You will work closely with the design team to ensure timely delivery of quality designs.
Working with methods to accelerate verification time.

Imagine what you could do here. At our company, new ideas have a way of becoming great products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish.
The people who work here have reinvented entire industries with all our Hardware products. The same passion for innovation that goes into our products also applies to our practices - strengthening our dedication to leave the world better than we found it. Join us to help deliver the next groundbreaking our products.

As a member of our Physical Design team in this highly visible role, you will directly own implementation and verification of design partition(s) / IPs (netlist to delivery of our final GDS) for a highly complex SoC utilizing state of the art process technology.
* Implementation - Block level PnR, floor-planning, clock, power planning and distribution.
* Verification and Analysis - Static Timing closure using commercial tools, Physical Verification as well as Electrical/Power Analysis (EM / IR-Drop / Xtalk / noise )

Required CPU Core Micro Architect
Job Description
Our goal is to design cutting-edge CPUs for smartphones, servers, and desktops, and we need the very best talent to help us achieve it!
The CPU Micro architect will take charge in defining a processor Micro architecture features that will improve the performance and reduce the power consumption of the CPU core. This architect will use a performance simulator to explore his ideas and will analyze implementability of these features: Power, Timing, Area. This architect will utilize his processor and VLSI design experience to develop many advanced features for Huawei processors.

Required Design AI Lead, Cloud
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
Our mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.
Responsibilities
Lead an edge AI IP design team including definition, implementation and deployment, and define IP development methodologies sharing unified blocks within the IP design team.
Define the block level design documents such as interface protocol, block diagram, transaction flow, pipeline, and more.
Demonstrate technical involvement throughout the entire Intellectual Property (IP) development cycle, ensuring seamless integration into System-on-Chip (SoC).
Perform RTL development (e.g., coding and debug in SystemVerilog), function/performance simulation debug, and Lint/CDC/FV/UPF checks.
Collaborate closely with software, verification, emulation, physical design, packaging, and silicon validation stakeholders to ensure that designs are complete, correct, and performant.

Required SoC Edge-AI Design Verification Engineer, Cloud
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
In this role, you will work as part of a Research and Development team. You will build verification components, constrained-random testing, system testing, and drive verification closure. You will verify digital designs, collaborate closely with design and verification engineers on projects, and perform direct verification. You will build constrained-random verification environments that exercise designs through their corner-cases and expose all types of bugs. You will manage the full life-cycle of verification, which can range from verification planning, test execution, to collecting and closing coverage.
Responsibilities
Plan the verification of digital design blocks by fully understanding the design specification and interacting with design engineers to identify important verification scenarios.
Create and enhance constrained-random verification environments using SystemVerilog and Universal Verification Methodology (UVM), or formally verify designs with SystemVerilog Assertions (SVA) and industry leading formal tools.
Identify and write all types of coverage measures for corner-cases.
Debug tests with design engineers to deliver functionally correct design blocks.
Close coverage measures to identify verification holes and to show progress towards tape-out.

our company is seeking an experienced Systems Integration Engineer - RF & EW to lead integration and validation activities for complex multidisciplinary systems, with a strong focus on RF, Electronic Warfare (EW), and naval environments. This is a full-time position located in central Israel.

Required Edge-AI SOC Verification Lead, Cloud
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
In this role, you will work to shape the future of an edge-AI product, bringing high-performance intelligence to the edge. You will have an opportunity to drive distributed inference technology that powers real-time systems where latency and reliability are mission-critical.
You will be part of a team that pushes boundaries, developing autonomous solutions that define the next generation of intelligent infrastructure and hardware for the edge. You will contribute to the innovation behind products that transform industries, leveraging your expertise in system-level integration and localized processing to deploy complex AI models across sophisticated hardware platforms, ensuring intelligence is embedded exactly where the action happens.
Our mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.
Responsibilities
Lead the verification of an edge AI IP, to be used in edge-AI products.
Lead a team of chip verification engineers. Plan tasks, allocate people, hold verification design/code reviews, and drive verification execution.
Plan the verification of digital design blocks, including writing test plans, and other verification documents.
Code development of verification features and capabilities, and participate in RTL debug.
Work closely with architecture, software, design, and physical design stakeholders to make technical decisions and represent project status throughout the development process.