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we are seeking a Lead System Architect to join our system architecture team and help define NR-NEXUS, our next-generation AI inference platform.

Responsibilities

Lead the software architecture and technical roadmap for NR-Nexus
Write system specifications for NR-Nexus product
Research AI infrastructure, SaaS platforms, model serving, and inference trends
Work with engineering to translate technical capabilities into product value
Work closely with engineering teams to optimize performance, scalability, and feature delivery.
Define performance goals and lead profiling, benchmarking, and optimization efforts for GenAI and distributed AI workloads.
Collaborate with customers, partners, and open-source communities to ensure ecosystem compatibility and adoption.
Mentor software engineers and provide technical leadership

We are looking for a Senior Machine Learning Algorithm Engineer who is passionate about solving complex, real-world problems at the intersection of hardware and software.

Location: Tel-Aviv in hybrid model.

Responsibilities
Develop advanced ML algorithms using data from proteanTecs Agents embedded in silicon. Example domains include:
Lifetime predictions.
Clustering and dimensionality reduction.
Parametric modeling and screening.
Time-series forecasting.
Lead end-to-end algorithm lifecycle: ideation - research - POC - design - implementation - validation - deployment.
Collaborate closely with cross-functional teams and directly with customers to continuously refine and enhance deployed solutions.
Drive integration of AI-enhanced tools and intelligent pipelines into ML workflows.

A significant part of the role involves building end-to-end integration flows and tests, particularly around token generation pipelines and system orchestration, as well as contributing to intelligent system behavior such as hardware selection and execution strategies. The role also includes developing system-level logic in Python for multi-tenant management, caching strategies, and service lifecycle management across the platform.

***This is not a Data Science position***

Responsibilities:

Build and maintain end-to-end integration flows across the AI inference pipeline (serving, orchestration, APIs, and infrastructure)
Design, implement, and optimize LLM inference workflows, including prefill and decode stages
Improve system performance with focus on throughput, latency, and interactivity
Write production-grade components in Python and integrate them into the broader system
Contribute to system-level logic such as smart hardware selection and execution strategies
Integrate models (open source and custom), services, and APIs into cohesive, reliable end-to-end application pipelines

We are looking for a Senior Software Engineer to help build and optimize large-scale, high-performance GenAI infrastructure and inference systems on Kubernetes.

As AI workloads increasingly move toward Kubernetes-native infrastructure, we are building systems that support distributed inference, performance optimization, reliability, observability, and production-grade deployment at scale.

This role is ideal for an engineer who can reason deeply about systems, performance, tradeoffs, and reliability, and who is comfortable owning difficult technical decisions end-to-end.

You will work across inference serving, distributed systems, optimization, and Kubernetes-native AI infrastructure.

What Youll Do

Build and optimize high-performance Kubernetes-native GenAI inference systems
Work with modern inference stacks such as vLLM, SGLang, TensorRT-LLM, and related tooling
Work with Kubernetes-native distributed LLM inference frameworks such as llm-d and NVIDIA Dynamo
Design and implement optimization algorithms and performance improvements
Improve reliability, observability, deployment, and operational maturity of AI systems
Make architectural decisions and take ownership of technical outcomes
Collaborate with a small, senior engineering team focused on performance and production quality

AI scale-out communication is a critical element in modern data centers, and emerging standards such as Ultra Ethernet aim to address this challenge. This role focuses on defining a high-performance Smart NIC architecture optimized for GPU-centric AI workloads, with emphasis on low-latency, high-bandwidth data movement.

You will work across hardware and software domains, collaborating closely with AI, platform, driver, and VLSI teams to design a competitive scale-out networking solution.

Responsibilities

Lead the software architecture and technical roadmap for or next-generation ultra low-latency AI-SuperNIC software stack, including drivers, firmware, libfabric, and libibverbs.
Define the partitioning and interfaces between hardware, firmware, kernel drivers, user-space libraries, and AI frameworks.
Lead the design and implementation of high-performance networking, RDMA, and GPU-direct communication capabilities.
Drive software support for emerging technologies and standards such as UEC, UALink, MRC and RoCEv2 ecosystems.
Work closely with hardware, system architecture, and VLSI teams to optimize performance, scalability, and feature delivery.
Define performance goals and lead profiling, benchmarking, and optimization efforts for GenAI and distributed AI workloads.
Collaborate with customers, partners, and open-source communities to ensure ecosystem compatibility and adoption.
Mentor software engineers and provide technical leadership across firmware, driver, and networking software development

This role is ideal for experienced product manager who is fast-learning, technical, and ambitious. Youll work closely with Product, R&D, Marketing and customers engineering team to turn market needs, customer feedback, and AI infrastructure trends into clear product requirements, workflows, demos and PoCs.

What Youll Do

Help define NR-NEXUS product capabilities, workflows, and use cases
Write clear PRDs, user stories, feature briefs, and competitive notes
Research AI infrastructure, SaaS platforms, model serving, and inference trends
Work with engineering to translate technical capabilities into product value
Support customer and partner discovery with sharp product thinking

We are looking for a Logic Design Engineer to join the ride as we spearhead the next revolution in electronics!.

Our Logic Design team builds the on-chip monitoring IP at the heart of our product - digital blocks that ship inside some of the most advanced chips in the industry. Were growing the team and looking for a Logic Design Engineer to take ownership of that logic, working alongside circuit, verification, physical design, EDA, and AE engineers. A strong fit if you enjoy hard digital design problems in a collaborative, technically demanding environment.

Responsibilities
Define and implement digital logic micro-architecture - in plain English, diagrams, and SystemVerilog.
Verify design quality against industry standards using static analysis tools (Lint, CDC, RDC).
Work with Circuit Engineers to turn low-level circuit designs into the well-behaved, insightful agents at the core of the proteanTecs solution.
Work with Verification Engineers to simulate and debug the digital logic.
Work with Physical Design Engineers to ensure correct implementation of our special circuits.