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Are you passionate about working on a team that is at the cutting and bleeding edge of hardware technology? Our Design-for-Test Engineering team works on groundbreaking innovations involving crafting creative solutions for DFT architecture, verification and post-silicon validation on some of the industry's most sophisticated semiconductor chips. We are looking for an experienced DFT Engineer to join the ATPG team. The position includes taking part in development of the next generation DFT technologies and working closely with a wide range of our groups and aspects - chip design, backend, verification, and production testing.

Working on the most advanced technologies and complex products, our DFT solution are unique and innovative internal developments, and we are continuously improving and evolving the solution to meet the challenging goals. If you find groundbreaking Technologies, and next generation products interesting, then this is the team for you. Take opportunity to join our team for an exciting and educational environment, where every individual has significant contribution to our products and achievements!

What youll be doing:
You will be in charge of state of the art Design for Test/ATPG flows and implementation.
Take full ATPG ownership end to end on a project, from Arch & planning to pattern generation, verification and post Silicon bring up and diagnosis.
Inventing and maintaining automation flows that provide the short test time to productionץ

We are looking for an excellent, creative, and independent IC Test Validation & Automation Engineer to join our Networking unit. Our Networking has continuously reinvented itself over the years, delivering industry-leading high-speed Ethernet and InfiniBand solutions that push performance, bandwidth, and reliability from one generation to the next. In this role, you will help transfer our Network Silicon IC products, including Switch, NIC, and SmartNIC devices, from design engineering to high-quality mass production. You will define and automate IC test validation methodologies, develop validation tests and automation infrastructure, and build scalable flows for regression execution, results collection, reporting, and debug.

You will work closely with HW, SW, FW, SPE, SLT, DFT, security, and production teams, and will be responsible for improving test stability, coverage, quality, and debug visibility across wafer-level and final-test environments. The role includes troubleshooting complex test issues, improving validation methodologies, integrating tools such as Jenkins, Git, Jira, and automation agents, and acting as a gatekeeper for IC test program quality before production release. If you are passionate about IC product testing, automation, and enabling the highest-quality our Networking products, we would like to hear from you.

What you'll be doing:

Definition and automation of IC test validation methodologies and procedures.

Developing validation tests and automation infrastructure.

Building Jenkins-based flows for regression execution, result collection, and reporting.

Using Git-based development workflows for test infrastructure, reviews, and releases.

Integrating Jira and MCP-based tools into validation, debug, and issue-tracking flows.

Maintaining products quality by improving test stability, coverage, quality, and debug visibility.

Troubleshooting test issues and improving automated testing methodologies.

As a chip design Engineer in our Networking business unit, you'll join a group of passionate engineers to design and implement the next generation state of the art Switch Silicon chips. In this position, you'll make a real impact in a dynamic, technology-focused company while developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency!

What you'll be doing:

Work in a combined design and verification team which develops some of the switch silicon core units specializing in quality of service.

Build reference models, verify and simulate chip blocks/entities according to specifications under challenging constraints with high orientation to power, area, and performance.

Work closely with multiple teams within organizations such as Architecture, Micro- Architecture, and FW.

We are now looking for a Senior Chip Design Verification Engineer to join our Switch Silicon team. As a Chip Design Engineer in our Networking business unit, you'll join a group of passionate engineers to design and implement the next generation state-of-the-art Switch Silicon chips. In this position, you'll make a real impact in a dynamic, technology-focused company while developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency!

What You'll Be Doing:

Work in a design/verification team which develops core units within the Switch silicon.

Micro-architecture of dynamic verification environments planning for units and modules.

Design dynamic verification environments of units/blocks according to Arch. specifications under challenging constraints with high orientation to power, area, and performance.

Work closely with multiple teams within organizations such as Architecture, u-arch, Full chip Micro-Architecture, BE, and FW.

We are now looking for a Senior Chip Design Engineer to join our Switch Silicon team. As a Chip Design Engineer at our Networking business unit, you'll join a group of passionate engineers to design and implement the next generation state-of-the-art Switch Silicon chips. In this position, you'll make a real impact in a dynamic, technology-focused company while developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency!

What You'll Be Doing:

Work in a design/verification team which develops core units within the Switch silicon.

Micro-architecture of rtl verification environments planning for units and modules.

Design RTL of units/blocks according to Arch. specifications under challenging constraints with high orientation to power, area, and performance.

RTL synthesis, timing, supporting verification, and silicon post TO activities.

Work closely with multiple teams within organizations such as Architecture, u-arch, Full chip Micro-Architecture, BE, and FW.

We are now looking for a Senior Hardware Quality Engineer. This role leads the quality strategy and execution across the entire product development lifecycle, ensuring adherence to robust engineering standards and organizational goals. You will drive multi-functional alignment, manage risks, and champion proactive quality measures and continuous improvement initiatives. The mission is to deliver high-quality products by optimizing development, verification, and validation processes from concept to mass production.

What youll be doing:
Lead multi-functional teams to guarantee seamless completion of all development stages, adhering closely to technical guidelines and quality criteria.
Ensure the professional and robust execution of all development phases, strictly adhering to engineering standards and defined quality requirements.
Drive proactive quality activities such as Inquiry, Root Cause Analysis (RCA), and implement effective Corrective and Preventive Actions (CAPA).
Identify, prioritize, track, and mitigate potential risks to prevent impact on schedule and quality.
Manage product changes and maintain configuration control throughout the development lifecycle.
Promote and enforce early detection mechanisms by driving the implementation of early checks, continuous monitoring, and rapid resolution of identified issues.
Ensure the organization is maintaining adherence to quality control plans and processes; maintain and enhance product design development, verification, and validation processes, to allow high quality of products throughout the entire product life cycle.
Partner with Continuous Improvement to drive Quality process improvement initiatives to reduce customer complaints and internal scrap, including developing and coordinating department project planning.

With the growing demand for traffic bandwidth in datacenters, efficient physical high-speed communication becomes a crucial part of the development of silicon ASCs that serve networking infrastructures. We are looking for a PHY (Physical Layer) Architect for our Architecture team. We are positioning you to a key role to face this challenge and become part of our team, so we can continue developing the best devices in the industry.

What you will be doing:
Lead projects across team, starting from processing requirements and definitions from customers and translating those into detailed technical specification for hardware architecture, system embedded software, user interface and high-level design.
Supervise the implementation of projects by team-leaders / developers / QA, participate in low level design reviews, QA test plans reviews, and keep track of changes and handle obstacles.
Define the architecture of implementing physical layer standards into our ASIC devices.
Involved in standard bodies activities and definition of next generation protocols.
Define features for the phy layer, to exploit interoperability between different generations of communication.
Be involved in product definition and the high-speed protocols that the networking devices will support.
Work closely with multi-functional teams - design, backend, system, marketing, firmware, driver, etc. Provide architecture definitions and as a result converge on key design decisions.
Become focal point for our physical layer networking communication devices.

Do you consider yourself a Technical Leader? Want to get your hands on NVIDIA's groundbreaking Network technologies? Are you a person whos not afraid of challenges? We are looking for an excellent Senior Optics Firmware Design Engineer to develop the 1600GbE Data Centers and Networks of tomorrow. We develop the FW for every Transceiver and Optical device. Working with the industry leaders in Machine Learning Platforms, Data Centers, High Performance Computing, Storage Platforms and more!

Youll be joining the LinkX FW team who is a Leading Supplier of End-to-End Interconnect Solutions and that cares about who and what you are. We are a fast-growing company with positive energy that emanates from our team members' internal drive to develop, market, sell, and support ground breaking products and services. We are a strong believer in developing our employees and giving them the tools to succeed!

What you will be doing:

Develop our next-generation network products Firmware.

Developing cutting edge technology and systems with Optical Engines.

Take part in sophisticated networking Firmware features development for Cloud and Datacenter. Focusing on Physical Link-up process and optimizations.

Collaboration with leading Network companies which are our customers.

Our HW Sustain team in Israel is looking for an board designer to join the sustaining engineering team . The team leads the HW sustaining of networking infrastructure for our next-generation data centers focusing on accelerated performance while enabling optimized end to end GPU connectivity.

What you'll be doing:

You will take engineering ownership of networking products once they are released to production.

Provide engineering technical leadership for improving product availability, driving cost reduction, and resolving manufacturability issues.

Work on debugging and resolving HW related quality issues to improve customers' satisfaction.

We are looking for a Senior Chip Design Verification Engineer to join our Network Adapter Silicon group. As a Senior Verification Engineer Networking Silicon team, you will join a group of passionate engineers to design and implement the next generation state-of-the-art Networking Silicon chips. In this position, you will make a real impact in a dynamic, technology-focused company while developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency!

What you'll be doing:

Work in a combined design and verification team which develops core units within the Networking silicon.

Build reference models, verify and simulate chip blocks/entities according to specifications and performance requirements.

Work closely with multiple teams within organizations such as Architecture, Micro-Architecture, FW and Post-Silicon validation.