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Semi Conductor Devices (SCD), a leading worldwide supplier of high-end Infrared Detectors and thermal imaging cores, is looking for an Analog / Mixed-Signal VLSI Designer to join its VLSI R&D group. The role involves design and validation of custom analog and mixed-signal ASICs (ROICs) for advanced IR imaging systems, working closely with experienced analog, digital, system, and hardware teams.
Responsibilities:
Design and verify Analog and Mixed-Signal circuit blocks for IR image sensors (ROICs) under the guidance of senior designers Participate in the full ASIC development flow: specification review circuit design verification integration silicon bring-up lab validation Contribute to block-level simulations, documentation, and design reviews Work closely with digital designers, layout engineers, electronics, and system teams to support chip integration Support post-silicon validation and lab measurements, including debug and correlation to simulations Gain exposure to advanced CMOS processes, image sensor architectures, and system -driven design constraints.

The CPU Architect will take charge in defining a processor core that meets the requirement of high performance, high bandwidth, and scalable processing architecture. This architect will utilize his processor experience to deliver a world-class processor ASIC with many advanced features for Huawei products.

Join a team developing next-generation AI accelerators, working at the intersection of AI algorithms, software, and hardware.

*Part-Time or Full-Time Opportunity

Responsibilities:
The research focuses on designing next-generation rack and SuperPod architectures that combine elasticity through resource pooling with optimal performance enabled by holistic co-design across applications, parallel programming models, interconnect fabrics, and compute, memory, and switch chip architectures. On the communication side, the work architects scalable, high-bandwidth, and low-latency scale-up fabrics across multiple chips at rack and SuperPod scale. On the memory side, it explores richer protocol semantics beyond traditional load/store operations to reduce unnecessary data movement and rethinks memory hierarchies to expose large-scale capacity with near-local latency. On the compute side, it analyzes the requirements of General Compute and Generative AI workloads and their parallel programming models to fully leverage large-scale system resources.
Investigate and prototype new architectural features, including but not limited to:
o Tiered Memory: Explore advanced memory organizations, including hardware-managed caching, to enable software-transparent, fine-grained promotion and demotion of cache lines across the memory hierarchy.
o Prefetching/Speculation: Evaluate and design existing and next-generation hardware prefetching and speculation mechanisms to effectively hide local and remote memory latencies at rack and SuperPod scale.
o Near-Memory/Network Processing: Develop support for key primitives executed at the memory and network layers to minimize unnecessary data movement across sparse, dense, and pointer-based data structures.
o Workload-Centric Co-Design: Study optimal parallelization strategies at rack and SuperPod scale for both General Compute and Generative AI workloads, and design dedicated hardware support for widely used parallel programming primitives such as RPCs and collective communication.
Write reports and papers on the research results and present them.

We are seeking a highly motivated V2X Customer Engineer to join our Customer Engineering team. The successful candidate will serve as a trusted technical advisor to automotive OEMs, Tier-1 suppliers, module vendors, and ecosystem partners developing products based on our V2X solutions.

Our team is deeply technical and engineering-driven. In addition to customer-facing activities, Customer Engineers actively develop software, tools, demonstrations, proof-of-concepts, and reference solutions that help customers successfully evaluate, integrate, validate, and deploy V2X technology.

The role combines customer interaction, system engineering, software development, troubleshooting, and innovation, allowing engineers to influence both customer success and product evolution.

Key Responsibilities

Customer Technical Leadership

Act as the primary technical interface between customers and our engineering teams.

Support customers throughout the product lifecycle, from evaluation and design through validation and production.

Lead technical discussions, design reviews, architecture assessments, and integration activities.

Understand customer applications, requirements, and deployment scenarios, and provide expert technical guidance.

Support customer field trials, interoperability events, demonstrations, and production programs.

Engineering and Development

Design and develop software tools, and applications that enhance customer adoption of our V2X technologies.

Develop and maintain demo applications, proof-of-concepts, and engineering prototypes used for customer engagements, industry events, and internal validation.

Implement customer-specific adaptations, reference implementations, and integration examples that accelerate development and reduce technical risk.

Create automation solutions for testing, validation, diagnostics, data collection, and performance analysis.

Contribute code, bug fixes, and feature enhancements to internal software projects when required.

Technical Problem Solving

Reproduce, analyze, and resolve complex system-level issues spanning software, hardware, RF, networking, security, and standards compliance.

Drive root-cause investigations in collaboration with engineering teams.

Analyze logs, traces, packet captures, and field-test results.

Develop workarounds, reference solutions, and validation methods for customer issues.

Product and Ecosystem Support

Provide technical training, workshops, and hands-on enablement activities.

Support interoperability testing with ecosystem partners.

Gather customer feedback and communicate requirements and market insights to Product Management and Engineering.

Contribute to technical documentation, application notes, training materials, and best practices.

Be part of a team responsible for designing the next generation of mobile devices. The position includes responsibility for system analysis and HW architecture design for high-speed and low-power interfaces, networking protocols, storage processing, including acceleration of protocols reducing overall power consumption. The job requires collaboration with multiple engineering functions and teams in various geographical locations. It includes identifying system use, requirements definitions, understanding of industry specification for interfaces, operating in industry Standards committees, SW and HW interaction, performance analysis, and more.