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We are looking for a satellite networking Lab Coordinator. You will be responsible for overseeing our cutting-edge physical & virtual lab operations, ensuring smooth, automatic & reliable functionality, and driving innovation in our multidisciplinary technological solutions.

What you will do
Plan, organize, and oversee day-to-day operations of the lab to ensure efficiency and effectiveness.
Maintain and manage lab equipment, tools, and supplies, ensuring compliance with security standards.
Automate deployment, maintenance & monitoring processes, to support the R&D delivery processes.
Collaborate with R&D teams to plan, coordinate, and execute research initiatives and experiments within the lab.

join our advanced packaging team to define and develop cutting-edge semiconductor package solutions for automotive-grade digital and RF system -on-chip ( SOC ) products.
youll collaborate with internal teams and external osats to deliver high-performance, manufacturable, and reliable packages that meet stringent automotive standards.
what will your job look like:
define and specify advanced package architectures for digital socs and RF ics in automotive applications.
perform substrate design for flip-chip bga (fc-bga) packages, including stack-up, routing, and ball-out optimizations.
evaluate and select substrate technologies, materials, and package solutions based on performance, cost, and reliability.
collaborate with osats to define and validate assembly materials and process flows.
work closely with internal teams such as backend, sipi, product engineering, and quality & reliability to ensure seamless integration.
monitor yield, quality, and manufacturability across package development and production stages.
support dfm reviews and ensure compliance with automotive standards and customer requirements.

We are expanding our algorithm team working on operational defense command-and-control systems and are looking for a Senior Tracking and Data Fusion Algorithm Engineer. This role focuses on the development of real-time multi-target tracking and sensor fusion algorithms deployed in mission-critical environments This is not a pure ML position. It is a model-based tracking and estimation role with operational deployment responsibility.

our radar team develops cutting-edge radar technology for autonomous driving (av) and advanced driver-assistance systems (adas). we are looking for a Cyber security architect to lead the design and implementation of robust security solutions that protect our radar systems from cyber threats.
in this role, you will define security architecture for radar hardware, Embedded software, and communication interfaces, ensuring compliance with automotive cybersecurity standards and safeguarding mobileyes mission-critical sensing technology.
youll be part of a team shaping the future of autonomous driving. our radar technology is a critical component in delivering safe, reliable, and intelligent mobility solutions. youll work on innovative projects in a collaborative environment, with the opportunity to influence security strategy at a global scale. what will your job look like?
security architecture design - develop and maintain end-to-end security architecture for radar systems, including hardware, firmware, and software components.
threat modeling & risk assessment (tara) - perform threat analysis and risk assessment for radar components, software modules, and communication channels; identify vulnerabilities and design mitigation strategies.
secure communication - implement encryption, authentication, and integrity checks for radar data transmission between hardware and software layers.
secure software design - define and enforce security controls for apis, middleware, and integration points between radar systems and other vehicle subsystems.
compliance & standards - ensure radar systems meet iso 21434, unece wp.29, and other relevant automotive cybersecurity regulations.
collaboration with r&d - work closely with radar engineers, Embedded software developers, and system architects to embed security into the design process.
incident response support - provide architectural guidance during security incidents involving radar systems.
technology evaluation - assess and recommend security tools, frameworks, and methodologies for radar-specific applications.

which department will you join?
epg is a fast-paced, dynamic, and startup-like group responsible for researching, incubating and developing next-generation technologies and ideas, with a strong orientation towards computer vision, Machine Learning, data, and ai.
the group hosts a diverse team of scientists, engineers and developers to research, realize, and bring to market innovative new products, leveraging cutting-edge technologies, skills and capabilities.
were looking for a backend expert to join the growing physical design team, responsible for state of the art SOC design from definition to tape-out. what will your job look like:
hands-on physical design block owner from rtl to gds.
floorplan exploration with guidance and collaboration with Front-End and architecture teams.
sta: work with fe and floor planner to manage block and top level constraints and 1st level of timing analysis.
synthesis exploration and final synthesis netlist: scan insertion @ synthesis, clean checks from lint, upf & spyglass.
place & route: from synthesis netlist to final layout and signoff verification with target to achieve best power performance and area.

we are looking for an experienced Hardware Design Engineer with a strong background in high-speed board design to join our radar hw group.
our imaging radar organization develops automotive radar systems that enable advanced driver assistance and fully autonomous driving. the radar hw group has multidisciplinary responsibilities and owns the end-to-end development of all radar hardware which includes: RF and high-speed digital boards, ic packages, mechanical solutions & antenna design
what will your job look like?
design high-speed boards from concept to production
own all design stages: architecture, schematics, layout, modeling, and design reviews
work on boards that include high-speed serdes, lpddr5/4, power circuits, and additional digital interfaces
collaborate closely with RF, mechanical and system teams.