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The company Networking Advanced Development Software team develops new groundbreaking technologies to enable new market shares for the company and tighten customer relationships. These are emerging technologies in networking and distributed computing for the booming AI factories and data centers. They span areas such as AI neural networks, Deep Learning, High Performance Computing (HPC), Storage, Cloud, SW Defined Network, Network Function Virtualization, 5G NR and more. We develop the solutions top-down, all the way from application behavioral analysis, to architecture definition and down to the implementation, using the world-leading company devices. The development traverses any needed component - application SW, middleware SW, OS kernel subsystems, device drivers, embedded SW (Firmware) and CUDA GPU. We collaborate with partners and key customers in the analysis processes and engage with open source communities introducing our leading features.
What youll be doing:
Design and implement solutions throughout all layers from high level application, OS and driver subsystem to firmware
Work on impactful projects involving state-of-the-art high-performance computing hardware and software
Provide insight and technical guidance and collaborate with peers from across the company - including software architecture, chip architecture, and engineering departments to improve our future technology
Collaborate with our company partners and customers.

We seek a highly motivated Network Performance Exploration Engineer to join our team of experts and help shape the foundational infrastructure for the AI revolution. Our next-generation networking systems are at the forefront of connecting and powering the world's most advanced AI clusters. As a key member of our architecture team, you will be responsible for exploring and identifying critical network optimization opportunities across our entire hardware and software stack, analyzing how system-level changes impact application-level performance.
What Youll Be Doing:
Explore and validate end-to-end application performance, defining comprehensive test plans and critical metrics to identify optimization opportunities in both hardware and software.
Establish and maintain a comprehensive database of benchmark results, tracking performance across releases to drive data-informed decisions.
Conduct deep-dive analysis into communication libraries (like NCCL), system software, and hardware configurations to investigate performance characteristics, validate architectural theories, and identify bottlenecks.
Provide critical performance data to correlate and enhance simulation tools, ensuring our models accurately predict real-world hardware behavior.
Analyze application-level traffic patterns (e.g., LLMs) on our advanced networking fabrics to identify hardware and software optimization opportunities and tune system parameters.
Lead Proof-of-Concept (POC) projects to prototype and evaluate potential hardware and software optimizations and their impact on application performance.

We are now looking for a Chip Design Engineer to join our Switch Silicon team for Verification / Design roles. As a Chip Design Engineer at our company's Networking business unit, you'll join a group of passionate engineers to design, implement and verify the next generation state-of-the-art Switch Silicon chips. In this position, you'll make a real impact in a dynamic, technology-focused company while developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency!
What You'll Be Doing:
Work in a combined design and verification team which develops some of the switch silicon core units.
Micro-architecture for RTL and simulation environment planning for units and modules.
Design/Verify RTL units/blocks according to Arch. specifications under challenging constraints with high orientation to power, area, and performance.
Build reference models, verify, and simulate chip blocks/entities according to specifications.
RTL synthesis, timing, supporting verification, and silicon post TO activities.
Work closely with multiple teams within organizations such as Architecture, Full chip Micro-Architecture, BE, and FW.

We are now looking for a best-in-class Verification Engineer to join our outstanding GPU-Networking Silicon Engineering team. As a DV Engineer at our company's GPU-Networking group, you'll make a real impact in a dynamic, technology-focused company while being a part of the team that develops the flagship product of todays semiconductor industry our companys GPU Super-Chip.
What youll be doing:
Work in a DV (Design Verification) team that has a global responsibility over deliverable units and clusters to the silicon GPU
Integrations and Full-Chip models
Verification of chip blocks/entities according to specifications under challenging constraints
Ramp-up and run DV tasks on emulation platform.

We are looking for a visionary, hands-on leader who can take an idea from zero to product, work closely with Product and customers, run experiments fast, and inspire a small team of strong builders. You will contribute to both the technical and product direction of this new line.

This is a key founder-mindset role inside a scaling startup. A rare opportunity to define an entirely new capability within a company - one that can become a pillar of the business.



What Youll Do



Build & lead a new business unit

Establish and lead a small, competent, multidisciplinary team.
Recruit, mentor, and inspire top talent.
Define & build the agentic AI product

Design and develop an agentic workflow system.
Define system architecture, agent patterns, interaction models, orchestration, observability, and safety.
Balance experimentation with production-grade engineering and reliability.
Partner with Product & customers

Work nearly day-to-day with the Product team.
Engage directly with design partners and later with early adopters.
Translate vision into experiments, MVPs, and short-term roadmaps.
Help shape UX, system behavior, product packaging, and pricing logic.
Collaborate across the company

Integrate with our Data, App, and DevOps teams.
Leverage existing infrastructure while building new, independent components.
Influence the broader companys approach to agentic AI systems.

Required DFT Engineer , Nitro Team
Join our innovative semiconductor engineering team and help shape the future of cloud computing infrastructure. As a DFT Engineer at Annapurna Labs, you'll be instrumental in developing groundbreaking chip technologies that power the world's largest cloud platform. Your expertise will directly contribute to creating revolutionary semiconductor solutions that drive technological advancement and transform how global businesses leverage cloud services.
Key job responsibilities
* Develop comprehensive Design-for-Testability (DFT) strategies for advanced semiconductor platforms
* Collaborate with cross-functional engineering teams to ensure robust chip design and verification
* Generate and optimize test patterns using advanced methodological approaches
* Conduct detailed chip bring-up and lifecycle management processes
* Contribute to architectural definition and logic design for revolutionary semiconductor technologies
A day in the life
Your day will be dynamic and collaborative, involving deep technical problem-solving across multiple engineering domains. You'll engage with chip design, verification, and testing teams, translating complex architectural concepts into tangible semiconductor innovations. Expect to dive into intricate design challenges, develop sophisticated test methodologies, and contribute to cutting-edge product development.

Required DFT Engineer, Graviton Team
Key job responsibilities
* Design and implement advanced Design-for-Test (DFT) architectures for complex semiconductor platforms
* Develop high-quality test and debug patterns ensuring robust performance
* Conduct comprehensive static timing analysis across multiple DFT modes
* Verify intricate DFT logic and components with precision and creativity
* Support silicon bring-up and device diagnostic processes
A day in the life
Your day will be filled with complex problem-solving and collaborative innovation. You'll work alongside world-class DFT engineers in a dynamic environment, developing semiconductor technologies that support global cloud infrastructure. Our team thrives on creativity, technical excellence, and continuous learning.

Required Electrical Engineering Graduate, Graviton Team
Description
We develop leading-edge semiconductor products that power our cloud infrastructure.
As a startup-like organization within AWS, we create technologies that drive the world's largest cloud provider. Our engineers work with cutting-edge technologies to innovate and shape the future of cloud computing. At Annapurna Labs, you'll experience a fast-paced environment that offers continuous learning opportunities and the chance to develop next-generation platforms.
Are you ready to join us?
Key job responsibilities
- Develop and design advanced semiconductor technologies for cloud infrastructure
- Collaborate on architecture definition and logic design for next-generation computing platforms
- Participate in comprehensive chip verification and bring-up processes
- Contribute to the entire product lifecycle from initial concept to mass production
- Support integration of new chip designs into AWS data center environments
A day in the life
Your day will be filled with challenging technical problems, collaborative problem-solving, and innovative engineering. You'll engage in complex chip design processes, work with advanced design tools, and contribute to projects that improve the next generation of cloud computing technology.

We operate in true startup mode: fast-paced, ambitious, and deeply technical. The project is complex and schedule-challenging across architecture, RTL, verification, and system design and we are looking for a Senior Verification Engineer who wants to work hard, move fast, and help build something truly new.

The Senior Verification Engineer will join a high-end team responsible for verifying a high-performance controller ASIC at the core of this new computational paradigm.

Your Day to Day:
Define, architect, and develop advanced verification environments and flows using SystemVerilog UVM.
Build block-level, subsystem-level, and full-chip verification environments with reusable methodology.
Develop coverage-driven verification strategies and automation infrastructure.
Work closely with design, architecture, algorithms, and software teams to define functionality and corner cases.
Drive testplan creation, functional coverage definition, and closure across multiple complex blocks.
Debug intricate logic interactions, multi-clock structures, and high-speed data paths.
Contribute to verification methodology, tooling, infrastructure, and continuous improvement.
Participate in a fast-moving, startup-style environment where deep technical ownership and rapid iteration are essential.

We operate in true startup mode: fast-paced, ambitious, and deeply technical. The project is challenging across architecture, RTL, verification, and schedule and we are looking for a Senior Design Engineer who wants to push boundaries, work hard, and help build something that has never been done before.

The Senior Design Engineer will join a team responsible for the architecture, design, and verification of a high-performance controller ASIC at the core of this new computational paradigm.

Your Day to Day
Own the design, micro-architecture, and implementation of digital logic for a high-performance ASIC
Translate system-level requirements into detailed micro-architecture and RTL designs
Develop high-quality RTL code in Verilog/SystemVerilog
Work closely with the algorithm, verification, analog, and software teams to define interfaces and ensure end-to-end functionality
Participate in design reviews, propose improvements, and ensure compliance with coding and design guidelines
Integrate and debug digital modules in simulation and lab environments
Support synthesis, timing closure, performance optimization, and power reduction activities
Collaborate with verification teams to define test plans and ensure thorough coverage
Contribute to a high-intensity startup environment where solving tough technical challenges and meeting ambitious schedules is part of the mission

Required DFT Engineer, Nitro Team
Description
AWS Utility Computing (UC) provides product innovations from foundational services such as our Simple Storage Service (S3) and our Elastic Compute Cloud (EC2), to consistently released new product innovations that continue to set AWSs services and features apart in the industry. As a member of the UC organization, youll support the development and management of Compute, Database, Storage, Internet of Things (Iot), Platform, and Productivity Apps services in AWS. Within AWS UC, our Dedicated Cloud (ADC) roles engage with AWS customers who require specialized security solutions for their cloud services.
Join a groundbreaking semiconductor team where your expertise will directly power the world's largest cloud infrastructure. At Annapurna Labs, you'll be instrumental in developing next-generation chip technologies that transform how global businesses leverage computing power, working at the intersection of innovative design and cutting-edge technological advancement.
Key job responsibilities
* Develop comprehensive Design-for-Testability (DFT) strategies for next-generation semiconductor platforms
* Collaborate across multiple engineering domains to ensure robust chip design and verification
* Generate and optimize test patterns using advanced methodological approaches
* Conduct detailed logic design and verification processes
* Support chip bring-up and contribute to the entire device lifecycle from definition to mass production
A day in the life
Your day will be dynamic and collaborative, diving deep into semiconductor design challenges. You'll engage with multiple engineering teams, crafting sophisticated test strategies, developing intricate logic designs, and contributing to the entire chip development lifecycle. Expect to transition seamlessly between technical problem-solving, collaborative design sessions, and strategic planning.

This role demands a unique blend of deep, code-level execution with a broad, system-wide architectural vision that spans our entire data, cloud, and AI stack.



Responsibilities:

Rapidly code and build functional proofs of concept (PoCs) and prototypes to explore and validate new architectures, data platforms, data processing frameworks, and GenAI capabilities.
Validate technical feasibility, scalability, and business impact through working software, not just diagrams or documents.
Partner closely with engineering, product and data science teams to translate emerging technologies into production-ready, scalable systems.
Lead architecture design reviews, proactively identify scalability and performance bottlenecks, and embed security principles into the design process from day one.
Serve as a technical leader and mentor, elevating the team's skills through pair programming, in-depth code reviews, and deep-dive sessions on system design and software craftsmanship.

As an Engineering Manager, you will need to manage, lead and guide a team of software engineers and identify and improve processes, procedures, technical knowledge and expertise of the team.
You will assume ownership of features and deliver value to customers, understand their domain & use cases and provide solutions to their problems
Design, implement and maintain micro-services implemented various technologies and services on AWS and Azure
Deliver high-quality reusable & maintainable features covered by unit tests, components and E2E tests with metrics and monitoring capabilities to enable proper deployment to production
Collaborate with team members and other groups via open discussions, design reviews, code reviews, etc