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We are seeking an experienced Software Engineer to join our growing R&D team in Tel Aviv, reporting to the Engineering team manager. As part of this role you will, design, develop, and deliver high-quality, scalable, reliable, and extensible products. Work within our multidisciplinary R&D teams (Software Engineers, Linguists and NLP Research Engineers) and with the Product Management team.

This is an exceptionally exciting time to join a real AI company - when the very foundations of NLP are being redefined in front of our eyes. Youll be at the forefront of that transformation, helping to shape the next generation of AI systems that are not only cutting-edge but also deeply impactful.

We Are more than a Professional Services firm, we are a community of people driven by impact. As part of a leading global network, we partner with the most influential organizations to drive large-scale business and technology transformation, combining strategic thinking, innovation, and advanced technologies. Guided by integrity, excellence, and forward thinking, we help organizations navigate complexity and create real change. Our people are at the center, with space to lead, experiment, and grow in a dynamic and collaborative environment that connects personal development with meaningful impact on the future of business and society. About the Role We're looking for a AI backend Engineer with a data science foundation to join our AI team and build production systems that integrate Generative AI capabilities. You'll design and implement end-to-end solutions APIs, databases, orchestration, and cloud infrastructure for clients across a wide range of sectors. This role is ideal for someone who thinks in systems, enjoys working with GenAI technologies, and wants to grow into designing complex architectures. You'll work alongside senior engineers on real delivery projects from day one. Key Responsibilities Design and build backend systems APIs, databases, authentication, and integrations Implement multi-agent architectures and orchestration workflows combining LLMs with backend logic Deploy and maintain systems on GCP, Azure, or AWS Optimize AI system performance, cost, and reliability Collaborate with client teams, DevOps, and stakeholders on project delivery Contribute to technical discussions and solution design

Design high-performance analog and RF ICs optimized for precision, power, and area, driving prototype and product iterations from architecture to silicon validation.

Responsibilities
Design and simulate analog and RF integrated circuits, including critical blocks such as amplifiers, mixers, PLLs, ADCs, DACs, and bias/reference circuits, with a focus on signal integrity, linearity, and precision.

Optimize circuits for power, area, and performance trade-offs, ensuring designs meet system-level requirements across process, voltage, and temperature (PVT) variations.

Collaborate closely with optics, simulation and PCB teams to define architecture and block-level specifications for successive prototypes and product iterations, ensuring tight alignment with overall performance and integration goals.

Work with layout engineers to guide floor-planning and physical design, minimizing parasitic effects and preserving analog precision in layout-sensitive blocks.

Support post-silicon validation and bring-up, defining test plans, analyzing lab measurements, and correlating results with simulation to refine future design iterations.

Language: English at a proficient level. French is a plus.

As a Digital Backend Design Engineer, you will be responsible for the physical implementation of digital designs from RTL to GDSII, leveraging cutting-edge EDA tools and methodologies. You will collaborate closely with RTL design, DFT, and packaging teams to achieve optimal performance, power, and area (PPA), while meeting stringent timing and yield targets.

Responsibilities
Execute full-chip and block-level physical design tasks including floorplanning, placement, clock tree synthesis, routing, and physical verification.

Develop and optimize the digital backend flow.

Drive timing closure, power optimization, and physical verification (LVS/DRC/ERC).

Collaborate with front-end designers to address timing and logical/physical interface issues.

Support tapeout preparation and final signoff processes.

Play a critical role in ensuring the functional integrity, performance, and reliability of next-generation optical chips.

Responsibilities
Develop robust verification plans for complex digital and mixed-signal optical chip designs.

Collaborate closely with architects, designers, and customers to understand logic requirements, translate them into verification strategies, and deliver clear, actionable feedback throughout the development process.

Perform netlist-level simulations with SDF back-annotation for timing-accurate verification

Support FPGA/ASIC bring-up and post-silicon validation as needed

Develop, maintain, and optimize testbenches and verification components using advanced SystemVerilog features, such as constrained random testing, assertions, and transaction-level modeling, to create robust coverage-driven environments.

Design scalable, reusable UVM-based environments and components (e.g., agents, monitors, scoreboards) for block- and system-level verification. Employ UVM to achieve regression automation, functional coverage closure, and high bug-detection efficiency.

Develop and execute verification strategies for digital blocks implementing or interfacing with PCI Express (PCIe). Apply protocol-checking, compliance validation, error injection, and debug skills for PCIe endpoints and root complex devices. Use protocol analyzers and simulation environments to validate correct implementation across all protocol layers.

Participate in the verification of RISC-V CPU cores and subsystems. Create test plans targeting processor modules (ALU, decoder, register file, control logic), with reference model comparisons, signature checks, and coverage of edge-case scenarios. Leverage formal verification and compliance suites for thorough design validation.

Plan and perform end-to-end ASIC verification, from block-level testbenches to full-chip integration. Execute functional and regression tests, formal verification, and coverage analysis. Debug and resolve design issues, ensuring pre-silicon reliability before manufacturing. Engage in design reviews and system-level protocol validation with cross-functional teams.

Design and verify custom digital hardware components and architectures that enable high-performance, tightly integrated computation workloads and interface custom tensor unit for advanced AI/ML applications.

Responsibilities
Design, implement, and verify RTL blocks for memory, control, and compute subsystems within custom multiphysics computation unit.

Collaborate with system software and architecture teams to define block-level specifications and ensure alignment with performance and integration goals.

Develop and maintain functional verification infrastructure to validate design correctness across simulation and hardware testbenches.

Support synthesis, timing analysis, and backend integration, working closely with physical design and CAD engineers.

Contribute to architectural exploration and hardware-software co-design efforts to shape future iterations of compute platform.

As a Performance Software Engineer, you will be instrumental in building the core computation software that runs on custom AI accelerators. Your work will bridge the gap between host systems and proprietary hardware, encompassing everything from a custom on-board kernels to the sophisticated tooling required for real-time debugging. You will be a key player in chip bring-up and the long-term development of high-performance computation primitives and kernels, ensuring our architecture operates with maximum efficiency and deterministic performance.

Responsibilities
Develop and optimize low-level software primitives in C/C++, assembly, and architecture-specific intrinsics, primarily for RISC-V and ARM platforms.

Implement performance-critical kernels, runtime components, hardware abstraction layers, drivers, and firmware operating in bare-metal or highly constrained environments.

Work closely with hardware architects and RTL/design teams to define and validate hardware-software interfaces, memory maps, register interfaces, interrupts, synchronization mechanisms, and boot flows.

Analyze and optimize software for latency, throughput, memory footprint, instruction count, and efficient use of processor and accelerator features.

Bring up and debug software on simulation, emulation, FPGA, and silicon platforms, including low-level hardware/software integration issues.

Develop validation tests, benchmarks, and diagnostic tools for new processor, DSP, accelerator, and SoC functionality.

Contribute to architecture decisions around ISA extensions, compiler intrinsics, memory hierarchy, DMA, cache/coherency behavior, and software-visible hardware features.

As a Drivers & Virtualization Engineer, you will own the host-facing software boundary. Your mission is to ensure our hardware is accessible, secure, and performant across diverse environments-ranging from bare-metal deployments to complex virtualized and multi-device cloud infrastructures. You will focus on building robust kernel-level interfaces where correctness, isolation, and long-term operational safety are paramount.

Responsibilities
Develop and maintain high-performance Linux kernel drivers for proprietary accelerator.

Implement communication protocols and virtual device interfaces to bridge hardware and software.

Manage low-level hardware interactions including PCIe, DMA, MMIO, and interrupt handling.

Enable seamless virtualized access to accelerators using QEMU and KVM.

Design and implement robust device sharing, passthrough, and isolation mechanisms.

Ensure the security of accelerator operations through strict memory protection and resource isolation.

Debug complex failures that span the entire stack: from hardware and kernel to hypervisor and guest OS.

Support the scaling of our architecture from single-device setups to large-scale multi-device deployments.

Were looking for an enthusiastic and highly motivated Technical Support Engineer to identify, diagnose and resolve customers issues. The Technical Support Engineer will be a part of our Professional Services team.

This is an exciting opportunity to work in a challenging, fast-paced environment in a high-performance team. Here we truly put our people first. We strongly believe in teamwork, and we encourage and trust our people to reach higher, learn more, and live up to their potential.


Job Description
Taking ownership of customer issues reported by customers and prioritizing them based on urgency and importance.
Researching, diagnosing, troubleshooting issues and identifying solutions to resolve system issues.
Coordinating support case resolution with the appropriate internal teams: Sales, Professional Services, Product.
Following standard procedures for proper escalation of critical or unresolved issues.