לוח משרות דרושים מדעים מדוייקים בתל אביב יפו

We are looking for best-in-class Chip Design Verification and Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high speed communication devices, delivering the highest throughput and lowest latency! Come and take a significant part in designing and verifying our groundbreaking and innovating new chips, enjoy working in a meaningful, growing and highly professional environment where you make a huge impact in a technology-focused company.

What you'll be doing:

Take a crucial part in developing our next-generation chip controller.

Design and verification with challenging multi-discipline context.

Take part in the development of all our networking and GPU networking chips and systems.

We are committed to advancing the field of artificial intelligence by making fundamental advances in technologies to help interact with and understand our world. We are seeking individuals passionate in areas such as deep learning, computer vision, audio and speech processing, natural language processing, machine learning, reinforcement learning, computational statistics, signal processing, information retrieval, and applied mathematics. Our interns have an opportunity to make core algorithmic advances and apply their ideas at an unprecedented scale. Our internships are twelve (12) to twenty-four (24) weeks long and we have various start dates throughout the year.
Research Scientist Intern, AI Core Machine Learning (PhD) Responsibilities
Develop novel state-of-the-art machine learning algorithms and corresponding systems, leveraging various deep learning techniques.
Analyze and improve efficiency, scalability, and stability of corresponding deployed algorithms.
Perform state of the art research to advance the science and technology of Machine Learning and Artificial Intelligence.
Devise better data-driven models for information retrieval, Multi-modal fusion, generation or media understanding (CV, NLP, Speech/ Audio).
Collaborate with researchers and cross-functional partners including communicating research plans, progress, and results.
Contribute to research that can be applied to our company product development.

Were looking for a student to join our team as a Junior BizOps team member. This role is a hands-on role assisting the department with daily and ongoing tasks.

Youll be working with the different CRM and data systems to assist the team with building new processes, data oversight, quality,setup, documentation and more.


Key Responsibilities

Review CRM data for accuracy and relevance and update where needed
Troubleshoot basic CRM related issues
Oversee accuracy of deals data and other manual inputs
Review sales /sdr processes as seen in the CRM and flag discrepancies and deviations
Assist in documentation creation and knowledge base organization
Setup new flows / playbooks / segments etc. in CRM according to team guidance

We are now looking for a Chip Design Verification Engineer. We are seeking a verification engineer to join the chip design methodologies team. The team is in charge of the verification methodologies, shared code, training, and embracing new technologies. One of our main goals is to make sure that the team works in an efficient manner, and provides high-quality deliveries. This position offers the opportunity to have real impact in a dynamic, technology-focused company.

What you'll be doing:

Develop shared verification code and solutions to be widely used by the chip design team.

Develop groundbreaking methodologies to create a flawless experience for verification engineers to keep the focus on new problems.

Collaborate with the design automation team to provide end-to-end solutions that combine verification, simulation, and automation.

Get in touch with EDA vendors to learn about cutting-edge tools/technology and apply them into our verification process.

Understand the design, define the verification scope, develop the verification infrastructure and verify the correctness of the design.

Collaborate with designers, verification specialists to accomplish your tasks.

Develop training sessions.

We are looking for a highly experienced a hands-on Compiler Engineer who embodies ambition and positivity.
Someone who can passionately take ownership of their responsibilities, collaborating effectively with remote teams to not only meet but exceed our objectives and fulfill the evolving needs of our expanding customer base.
Responsibilities::
Develop QM's compiler from a proprietary quantum language to a proprietary processor tailored to realize and accelerate quantum computing.
Take on complex optimization challenges at the core of our unique compiler, focusing on real-time applications, hybrid quantum/classical algorithms, and parallel processing.
Conduct rigorous testing, debugging, and profiling to ensure the performance and correctness of compiler outputs.
Hands-on development and debugging of software to optimize the utilization of limited hardware resources, enabling the scaling of quantum computing systems and improving quantum algorithm performance on our cutting-edge quantum orchestration platform.
Collaborate closely with hardware, software and architecture teams to ensure seamless software-hardware integration, directly enhancing system capabilities and performance.

We're seeking an exceptional experimental Physicist who combines deep physics expertise with strong software engineering capabilities and skills.
In this role, you'll focus on developing and implementing automated calibration solutions for several computing partners while also serving as a solutions expert for our European customer base.
You'll work at the intersection of physics and software engineering, translating complex calibration requirements into robust automation frameworks.
This position offers unprecedented exposure to diverse qubit types and architectures, enabling you to create groundbreaking calibration solutions while helping customers implement computing experiments.
Prior hands on experience on managing AMO set-ups and good understanding of the underlying physics is strongly encouraged.
Responsibilities:
Design and implement automated calibration frameworks for computing systems
Collaborate with the strategic partner's team to optimize calibration workflows
Lead technical implementation and integration of QM solutions for customers
Provide technical guidance on best practices for control systems
Translate complex customer requirements into actionable technical solutions
Manage technical relationships with accounts throughout Europe
Contribute to customer education and training materials

We are looking for NPI Engineer who will join the operation team and help us scale onwards!
The NPI product leader will be responsible for transitioning new products from early stage development to production level till field deployment processes. Work with cross functional teams ranging from HW designers, systems engineers, marketing and operations teams and participate in the complete product life cycle from development through build prototype until handing off the product to sustaining engineers.
The NPI product leader will manage all engineering related activities of QMs new products. The NPI PL will have a full responsibility on the overall operational activities to ensure qualified manufacturing readiness of new products.
Responsibilities:
Lead cross functional teams to execute the NPI process within the operations group.
Set an overall Operational NPI plan, Set Ops KPIs, Track and follow project progress, manage risk and report accordingly.
Define the NPI methodologies, interfaces, and process within the operation matrix to ensure smooth product introduction
Providing engineering leadership for the definition and scoping of NPI projects for all aspects of manufacturing and transitioning of projects to Manufacturing for project implementation and subsequent operation.
Ensure Design for Manufacturing guidelines are well implemented in the product design and validate implementation impact on product quality
Overall accountability of production data integrity including: BOM, production documentation, jigs and tools, product regulation.
Establishing and documenting process specifications that ensure manufacturing operations will meet product capability and quality expectations.
Analyze and recommend improvements to all production processes and methods to facilitate cost reduction and quality improvement through engineering change requests
Prepare plans for all NPI projects and coordinate with all stakeholders to ensure a good quality product represent the operations in the product life cycles gates
Serve as a technical mentor to contract manufacturing during NPI process

we are looking for an Algorithm Developer to join AI research team on a mission to solve one of Retails biggest problems. This is your chance to join an elite team, working on cutting edge technologies and solving real-world problems. Your mission will be to develop novel algorithms and modeling techniques alongside a team of other top-talent engineers and researches. The ideal candidate will be independent and highly motivated. He or she is expected to be a self-learner that continuously seeks to push the envelope, following new and emerging trends in technology while working in a complex setting.

our mission is to enable brands and retailers to harness the power of digital technologies to produce the best shopping experiences imaginable. our retail platform allows customers to understand what is happening on shelf, in every store, all the time so they can focus on what they do best delighting shoppers. Many of the worlds top CPG companies and retailers use our dynamic merchandising, in-store execution, shopper engagement, market measurement, analytics, and shelf monitoring solutions at scale to drive positive shopper experiences and unlock revenue opportunities at all points of sale. As pioneers in computer vision, we continue to lead the industry in innovation and excellence through development of advanced technologies and autonomous data collection methods. we are a global company with hubs in the United States, Singapore and Israel, serving customers in more than 90 countries worldwide.
Responsibilities

Develop state-of-the-art AI systems
Develop highly scalable solutions capable of processing a very large amount of data
Own services end-to-end including design, code, test, documentation. Taking ownership of their productization process. Integrate and deploy these within the Trax environment
Contribute to the solution as a whole, through working together collaboratively. We all review pull requests, mentor each other, and give technical talks.

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
our company's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of our company AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.
As a Power and Signal Integrity Engineer, you will be responsible for the design and characterization of signal and power integrity of our IC designs. You will design the external electrical interfaces of the device, from their Signal/Power-integrity and electrical usage perspectives.
You'll set up methodologies, perform simulations, silicon characterization and correlations to ensure our IC designs meet systems design budgets and achieve the highest performance. You will work with systems architects, ASIC design, systems engineers, and partner cross-functionally with teams and external vendors/partners.
The ML, Systems, & Cloud AI (MSCA) organization at our company designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all our company services (Search, YouTube, etc.) and our company Cloud. Our end users , Cloud customers and the billions of people who use our company services around the world.
We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including our company Clouds Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.
Responsibilities
Design and optimize power distribution networks (PDN) across chip, package, and board levels. This includes managing power/ground planes, decoupling capacitors, and power gating strategies.
Conduct both pre-layout and post-layout power integrity simulations to analyze power and ground noise (SSN/SSO), voltage drops (IR drop), and electromagnetic interference (EMI).
Implement and verify low-power design methodologies, such as multi-voltage designs and clock gating, using power intent formats like UPF/CPF.
Generate precise electrical models (e.g., S-parameters, SPICE models) for components such as packages, PCBs, and connectors for use in simulations.
Execute lab measurements utilizing test equipment like oscilloscopes, Vector Network Analyzers (VNA), Time Domain Reflectometers (TDR), Spectrum analyzers to validate simulation outcomes and debug signal and power-related issues on silicon prototypes and boards.

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As a SoC Design Verification Engineer, you will work as part of a Research and Development team. You will build verification components, constrained-random testing, system testing, and drive verification closure.
As part of our server chip design team, you will verify digital designs. You will collaborate closely with design and verification engineers on projects and perform direct verification. You will build efficient and effective constrained-random verification environments that exercise designs through their corner-cases and expose all types of bugs. You will manage the full life-cycle of verification, which can range from verification planning, test execution, to collecting and closing coverage.
The AI and Infrastructure team is redefining whats possible. We empower our company customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers, our company Cloud customers, and billions of our company users worldwide.
We're the driving force behind our company's groundbreaking innovations, empowering the development of our AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for our company Cloud, our company Global Networking, Data Center operations, systems research, and much more.
Responsibilities
Plan the verification of digital design blocks by fully understanding the design specification and interacting with design engineers to identify important verification scenarios.
Create and enhance constrained-random verification environments using SystemVerilog and Universal Verification Methodology (UVM), or formally verify designs with SystemVerilog Assertion (SVA) and industry leading formal tools.
Identify and write all types of coverage measures for corner-cases.
Debug tests with design engineers to deliver functionally correct design blocks.
Close coverage measures to identify verification holes and to show progress towards tape-out.

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As a Design Verification Engineer, you will work as part of a Research and Development team, and will build verification components, constrained-random testing, system testing, and verification closure. As part of our server chip design team, you will verify digital designs. You will collaborate closely with design and verification engineers in projects and perform direct verification. You will build efficient and effective constrained-random verification environments that exercise designs through their corner-cases and expose all types of bugs. You will manage the full life-cycle of verification which can range from verification planning, test execution or collecting, and closing coverage.
The AI and Infrastructure team is redefining whats possible. We empower our company customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers , our company Cloud customers, and billions of our company users worldwide.
We're the driving force behind our company's groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for our company Cloud, our company Global Networking, Data Center operations, systems research, and much more.
Responsibilities
Plan the verification of digital design blocks by fully understanding the design specification and interacting with design engineers to identify important verification scenarios.
Create and enhance constrained-random verification environments using SystemVerilog/UVM, or Specman.
Identify and write all types of coverage measures for stimulus and corner-cases.
Debug tests with design engineers to deliver functionally correct design blocks.
Lead coverage measures to identify verification holes and to show progress towards tape-out.

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As a CPU Design Verification Engineer, you will work as part of a Research and Development team building verification components, constrained-random testing, system testing, and verification closure. As part of our server chip design team, you will verify complex digital designs. You will collaborate with design and verification engineers in active projects and perform verification. You will be responsible for the full lifecycle of verification which can range from verification planning, test execution, or collecting and closing coverage.
Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of our company platforms, we make our company's product portfolio possible. We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible.
Responsibilities
Plan the verification of digital design blocks by fully understanding the design specification and interacting with design engineers to identify important verification scenarios.
Create and enhance constrained-random verification environments using SystemVerilog or formally verify designs with SystemVerilog Assertions (SVA) and industry leading formal tools.
Identify and write all types of coverage measures for stimulus and corner-cases.
Debug tests with design engineers to deliver functionally correct design blocks.
Apply close coverage measures to identify verification holes and to show progress towards tape-out.

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
In this role, you will work as part of a Research and Development team. You will build verification components, constrained-random testing, system testing, and drive verification closure. You will verify digital designs, collaborate closely with design and verification engineers on projects, and perform direct verification. You will build constrained-random verification environments that exercise designs through their corner-cases and expose all types of bugs. You will manage the full life-cycle of verification, which can range from verification planning, test execution, to collecting and closing coverage.
The AI and Infrastructure team is redefining whats possible. We empower our company customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers , our company Cloud customers, and billions of our company users worldwide.
We're the driving force behind our company's groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for our company Cloud, our company Global Networking, Data Center operations, systems research, and much more.
Responsibilities
Plan the verification of digital design blocks by fully understanding the design specification and interacting with design engineers to identify important verification scenarios.
Create and enhance constrained-random verification environments using SystemVerilog and UVM, or formally verify designs with SVA and industry leading formal tools.
Identify and write all types of coverage measures for corner-cases.
Debug tests with design engineers to deliver functionally correct design blocks.
Close coverage measures to identify verification holes and to show progress towards tape-out.