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לפני 17 שעות
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סוג משרה: משרה מלאה
דרוש/ה מהנדס/ת אלקטרוניקה לביצוע ופיתוח סימולציות לכרטיסים אלקטרוניים מהדור החדש עבור תעשיית החלל והרכב

מיקום: ראשון לציון
היקף המשרה: מלאה



התפקיד כולל:

ביצוע סימולציות ואנליזות לכרטיסים אלקטרוניים באמצעות פלטפורמת התוכנה הקיימת של חברת BQR
שיפור ופיתוח מודלי סימולציה חדשים באמצעות מערכת AI למעגלים ורכיבים מהדור החדש עבור תעשיית הרכב והחלל
הטמעת שיטות סימולציה חדשות עבור מהנדסי Board design.
אופטימיזציה של תכנוני מעגלים על בסיס ממצאי הסימולציה והמלצות לשיפור התכן.
הובלת תהליכי ניתוח כשלים ושיפור הביצועים הכלליים של מערכות.
דרישות:
תואר ראשון בהנדסת אלקטרוניקה - חובה. תואר שני או דוקטורט - יתרון.
אנגלית ברמה גבוה.
יכולת למידה עצמית גבוהה מאוד של כלי תוכנה הנדסיים מורכבים וכלי AI - חובה.
ניסיון בעבודה עם תוכנות לתכנון מעגלים אלקטרוני והבנה טכנית מעמיקה ברכיבים אלקטרוניים ותכנון מעגלים מורכבים - יתרון משמעותי.
ניסיון קודם בעבודה עם תוכנות סימלציה כמו Spice, ModelSim או אחרים - יתרון.
ניסיון של מספר שנים לפחות בעולמות פיתוח באלקטרוניקה / התוכנה.
נדרשת יכולת עבודה עם ריבוי משימות ושגשוג בסביבה מהירה.
העבודה במשרה מלאה. תחילת עבודה מידית ולטווח ארוך!
עבודה בסביבה אתגרית ותומכת מול לקוחות מהשורה הראשונה בנושאים החמים ביותר בתעשייה.
המשרה מתאימה לנשים וגברים כאחד.
משרדי החברה בראשון לציון. המשרה מיועדת לנשים ולגברים כאחד.
 
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5 ימים
Job Type: Full Time
we are looking for best-in-class chip Verification engineers to join our outstanding networking silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! come and take a significant part in verifying our ground-breaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a huge impact in a technology-focused company.
what you'll be doing:
own end-to-end unit-level (ul) verification of complex chip blocks, from verification planning through coverage closure
work closely with architecture and micro-architecture teams to review specifications, identify gaps and corner cases, and ensure the design is fully verifiable
develop verification strategies, environments, checkers, assertions, and coverage to validate functional and micro-architectural requirements
drive verification of complex scenarios, including feature interactions, error flows, performance-related behavior, and corner cases.
Requirements:
b.sc./ m.sc. in computer engineering/ electrical engineering/ communication engineering or equivalent experience
5+ years experience in verification or similar position
high level of english
ability to work as part of a team
ways to stand out from the crowd:
validated experience in verification
experience in Specman
background in uvm/sv
knowledge in hdl (verilog/vhdl)
we have some of the most forward-thinking and hardworking people in the world working for us and, due to unprecedented growth, our world-class engineering teams are growing fast. if you're a creative and autonomous engineer with a real passion for technology, we want to hear from you. we are committed to fostering a diverse work environment and proud to be an equal opportunity employer. as we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.
This position is open to all candidates.
 
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5 ימים
Job Type: Full Time
we are hiring a senior physical Verification engineer to lead signoff-quality verification for advanced silicon programs. you will drive physical verification strategy and closure for complex designs, working across implementation, methodology, and signoff teams to achieve tapeout readiness. the role requires strong technical ownership, structured debug, and the ability to scale best practices across multiple programs. this is a great match for an engineer who wants to combine technical depth with broad project impact.
what you'll be doing:
own physical verification closure for major blocks or full-chip designs through tapeout.
lead debugging of complex drc, lvs, and reliability-related issues and drive high-quality resolution.
define verification check plans, signoff criteria, and closure priorities with cross-functional teams.
partner with physical design, custom design, and cad teams to improve quality and turnaround.
drive automation, methodology improvements, and best practices for scalable pv execution.
review results, coach team members, and help reduce repeated classes of violations.
we are committed to fostering a diverse work environment and proud to be an equal opportunity employer. as we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law. we will ensure that individuals with disabilities are provided reasonable accommodation to participate in the job application or interview process, to perform essential job functions, and to receive other benefits and privileges of employment. please contact us to request accommodation.
Requirements:
what we need to see:
b.sc. or m.sc. in electrical engineering, computer engineering, or equivalent experience.
5+ years of experience in physical verification, backend implementation, or asic signoff.
deep knowledge of drc, lvs, physical signoff methodology, and tapeout flows.
strong experience with industry-standard physical verification tools and foundry rule decks.
proven ability to debug and close complex verification issues on large designs.
strong scripting and automation skills.
excellent communication and cross-team execution skills.
ways to stand out from the crowd:
experience owning full-chip pv signoff at advanced nodes.
familiarity with reliability, density, fill, erc, or other manufacturing-related signoff checks.
experience leading methodology improvements across teams.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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5 ימים
Job Type: Full Time
we are looking for an excellent, highly motivated sw verification manager to join the software verification team in the data processing unit (dpu) sw group. in this role, you will lead a team of highly skilled Verification engineers, combining people management, technical leadership, and execution. we are looking for a candidate with a strong quality-oriented mindset, the ability to thrive in an environment with complex software and hardware designs, and a passion for deep-dive verification of key dpu components. the role includes working closely with hw, fw, and sw teams all over the world, and taking our product to next level.
what you'll be doing:
lead, mentor, and grow a team of software Verification engineers, fostering a culture of technical excellence, ownership, and professional development.
provide technical leadership and hands-on mentorship, driving the design and implementation of comprehensive verification plans and automated environments using Python.
lead end-to-end feature validation, from architectural review to final system integration, ensuring robust hw-sw interoperability for high-end hardware and software.
ensure high product quality by conducting code reviews, defining engineering procedures, and identifying, analyzing, and reporting software defects.
drive improvements for performance, quality, and stability around sw acceleration solutions, taking an active part in integration and verification with r&d.
partner closely with cross-functional teams (hw, fw, sw architectures, and product) across multiple engineering organizations worldwide.
Requirements:
what we need to see:
bachelor's degree in Computer Science, software engineering, or a related field (or equivalent experience).
3+ years of experience in a managerial/ team lead position, with a proven track record of leading engineering teams.
8+ years of overall experience in software development or verification, with a strong, hands-on technical background.
expertise in Python, specifically in testing complex Embedded systems, system -level software, or firmware-integrated environments.
strong verification attitude with experience in developing modern software testing system / QA Automation frameworks.
expertise in networking & compute infrastructure (servers, switches, routers, tcp/udp).
deep understanding of Linux distributions (centos/redhat, ubuntu) and experience in software debugging and problem-solving.
knowledge of how to tune environments for the best performance and deploy infrastructure based on innovative technologies and high-end hardware.
ways to stand out from the crowd:
experience with pytest or other modern Python testing tools.
proficiency with data search and analytics engines (elasticsearch, kibana, grafana).
hands-on experience with virtualization in Linux (qemu/kvm).
work background with ci/cd methodologies, infrastructure, and toolsets (jenkins, git).
knowledge of docker, kubernetes, and understanding of C / C ++ toolchain in Linux.
we are widely considered to be one of the technology world's most desirable employers. we have some of the most forward-thinking and hardworking people in the world working for us and, due to unprecedented growth, our exclusive engineering teams are rapidly growing. if you're a creative and autonomous engineer with a real passion for technology, we want to hear from you. we are committed to fostering a diverse work environment and proud to be an equal opportunity employer. as we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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5 ימים
Location: Tel Aviv-Yafo
Job Type: Full Time
we are looking for an excellent senior firmware Verification engineer for our fw phy verification group. the person will be part of fw phy verification of our products. will closely work with our fw phy development, architecture teams and gain deep understanding of our products and technologies.
what you'll be doing:
own the responsibility for delivering networking features and their verification aspects.
define, develop and maintain verification infrastructure and regression tests suites - make TEST suites robust, maintainable and easy portable.
work with continuous integration system, regression tools, automate builds, run TEST suites and analyzing results.
innovate! bring our product to next quality level
Requirements:
what we need to see:
b.sc. in Computer Science / computer engineering / electrical engineering / communication engineering
5+ year of relevant experience working with established brands
experience with verification and automation
programming knowledge in C and C ++, object-oriented oop
knowledge in Linux
creative, motivated and value-driven person
ways to stand out from the crowd:
background with C / C ++ as well as git
experience with Python
experience with networking applications and protocols
background with ci methodology & tools (gerrit, jenkins etc.)
we are widely considered to be one of the technology world's most desirable employers. we have some of the most forward-thinking and hardworking people in the world working for us. are you a creative and autonomous engineer who loves a challenge? are you ready to become the engineer you always wanted to be? come and be part of the best chip design team in the industry!
we are an equal opportunity employer and value diversity at our company. we do not discriminate on the basis of race, religion, color, national origin, gender, sexual orientation, age, marital status, veteran status, or disability status. we will ensure that individuals with disabilities are provided reasonable accommodation to participate in the job application or interview process, to perform essential job functions, and to receive other benefits and privileges of employment. please contact us to request accommodation.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
5 ימים
Job Type: Full Time
we are seeking a physical Verification engineer to help ensure our asic and SOC designs are clean, correct, and ready for tapeout. this role focuses on physical verification quality across layout data, connectivity, and manufacturing rule compliance. you will work closely with physical design, custom layout, and methodology teams to run verification flows, debug issues, and improve signoff robustness. this is an excellent opportunity for an engineer who enjoys detailed analysis and high-impact signoff work.
what you'll be doing:
run and analyze physical verification checks such as drc, lvs, and other tapeout-quality signoff checks.
debug physical verification violations and partner with design teams to drive clean closure.
review layout, netlist, and runset interactions to identify root causes and recommend fixes.
support full-chip and block-level verification readiness across implementation milestones.
improve physical verification flow quality, turnaround time, and automation.
collaborate with methodology, cad, and foundry-facing teams on rule interpretation and signoff quality.
Requirements:
what we need to see:
b.sc. or m.sc. in electrical engineering, computer engineering, or equivalent experience.
2+ years of experience in physical verification, backend implementation, or vlsi signoff.
strong understanding of drc, lvs, antenna, and layout verification concepts.
hands-on experience with tools such as calibre, icv, pegasus, or equivalent physical verification tools.
ability to debug verification issues across layout, extracted views, and netlist connectivity.
scripting ability in tcl, PERL, Python, or shell for automation and debug.
strong collaboration skills and attention to detail.
ways to stand out from the crowd:
experience with advanced-node signoff and foundry rule decks.
familiarity with stream-out/oasis or gdsii generation and tapeout readiness flows.
experience improving pv automation, dashboards, or regression infrastructure.
widely considered to be one of the technology world's most desirable employers, we offer highly competitive salaries and a comprehensive benefits package. as you plan your future, see what we can offer to you and your family.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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מודים לך שלקחת חלק בשיפור התוכן שלנו :)
5 ימים
Location: Tel Aviv-Yafo and Ra'anana
Job Type: Full Time
we are seeking a talented and driven senior software Verification engineer to join our innovative team and tackle sw verification challenges in the domains of high-speed networking, virtualization, and security. you will play a key role in validating and testing complex software products that support ethernet and infiniband protocols, delivering advanced networking, Storage, and security services for cloud, compute, and ai workloads.
what you'll be doing:
develop and automate testing: design, implement, and maintain automated TEST scripts and frameworks (primarily in Python ) to verify the correct functionality of our software products.
end-to-end feature ownership: deep dive into feature sets, taking responsibility from TEST planning through to final implementation and full automation.
system & integration validation: validate software functionality and performance through system -level and integration testing, utilizing Linux -based environments and virtualization tools.
TEST environment management: set up, maintain, and optimize TEST environments using Linux, docker, virtual machines, and other modern tools.
collaboration & communication: work closely with software, DevOps, architecture, and product teams to define TEST requirements, coordinate releases, and ensure high-quality product delivery.
continuous improvement: drive design verification flows, contribute to methodology improvements, and leverage planning/tracking systems to manage release progress and build release indicators.
defect analysis: analyze TEST results, file defects, and track issues to closure, ensuring robust and scalable solutions.
 
we are committed to fostering a diverse work environment and proud to be an equal opportunity employer. as we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.
Requirements:
what we need to see:
bachelors/master's degree in Computer Science or computer engineering, or equivalent experience
5+ years of experience in software testing, QA Automation, or software engineering.
strong proficiency in Python and scripting for automation.
solid experience with Linux -based environments, including system tools and command-line utilities.
proven understanding of computer networking and modern Linux operating systems.
familiarity with software testing, integration, and system validation practices.
excellent problem-solving, critical thinking, and communication skills.
ability to work independently, manage multiple tasks, and drive technical initiatives.
great interpersonal skills, agility, and determination for success.
fluent english; strong presentation and public speaking abilities.
ways to stand out from the crowd:
deep technical know-how and familiarity with networking protocols or low-level system tools.
experience with docker, kvm, or other virtualization technologies.
knowledge of ci/cd tools (e.g., jenkins, gitlab ci) and TEST reporting tools (e.g., allure, grafana, kibana).
experience with large hw+sw systems and advanced Linux os technologies.
proficiency with git, bash, and other scripting languages.
if you are creative, autonomous, and passionate about delivering world-class software solutions, we want to hear from you! join us and work alongside some of the most forward-thinking and dedicated professionals in the industry.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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5 ימים
Location: Tel Aviv-Yafo
Job Type: Full Time
we are looking for a best-in-class chip design Verification engineer to join our outstanding networking silicon engineering team, developing the industry's best high-speed communication devices and delivering the highest throughput and lowest latency! join us to play a key role in verifying our groundbreaking, innovative chips, and work in a meaningful, growing, highly professional environment where you can make a huge impact at a technology-focused company.
what you'll be doing:
work on a design and verification team developing the Front-End design for the switch silicon.
develop verification components and reference models, and verify and simulate chip blocks to specifications under challenging constraints, with a strong focus on power, area, and performance.
work closely with multiple teams within organizations such as architecture, micro- architecture and fw.
Requirements:
what we need to see:
electrical engineering b.sc., computer engineering, or another relevant engineering discipline, with high scores, or equivalent experience.
completion of programming or logic design courses with high scores.
4+ years of experience in asic or sw verification.
software/ firmware development with orientation toward rtl is also relevant.
a team player with good communication and interpersonal skills.
we have some of the most forward-thinking and hardworking people in the world working for us. are you creative and autonomous? do you love the challenge of crafting the highest performance & lowest power silicon possible? if so, we want to hear from you. come, join our switch silicon design team, and help us build the next chip in this exciting and quickly growing field.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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5 ימים
Job Type: Full Time
we are now looking for a chip design Verification engineer. we are seeking a Verification engineer to join the chip design methodologies team. the team is in charge of the verification methodologies, shared code, training, and embracing new technologies. one of our main goals is to make sure that the team works in an efficient manner, and provides high-quality deliveries. this position offers the opportunity to have real impact in a dynamic, technology-focused company.
what you'll be doing:
develop shared verification code and solutions to be widely used by the chip design team.
develop groundbreaking methodologies to create a flawless experience for Verification engineers to keep the focus on new problems.
collaborate with the design automation team to provide end-to-end solutions that combine verification, simulation, and automation.
get in touch with eda vendors to learn about cutting-edge tools/technology and apply them into our verification process.
understand the design, define the verification scope, develop the verification infrastructure and verify the correctness of the design.
collaborate with designers, verification specialists to accomplish your tasks.
develop training sessions.
we have some of the most forward-thinking and hardworking people in the world working for us. are you a creative and autonomous engineer who loves a challenge? come join our networking verification team and help us developing great products by raising the efficiency and the quality standard in our chip design team.
Requirements:
a bachelor's degree in electrical engineering or Computer Science.
5+ years of relevant experience
exposure to design and verification tools.
strong interpersonal skills and ability & desire to innovate.
ways to stand out from the crowd:
experience in Specman / system verilog uvm.
understanding simulation tools.
experience in building TEST benches, evaluate coverage and debug simulation failures.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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עדכון קורות החיים לפני שליחה
8882921
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שליחה
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v נשלח
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
29/10/2026
Location: Tel Aviv-Yafo
Job Type: Full Time
We are looking for a Verification Engineer who embodies ambition and positivity, who can passionately take ownership of their responsibilities, collaborating effectively with remote teams to not only meet but exceed our objectives and fulfil the evolving needs of our expanding customer base.
The Verification engineer we look for will be a highly talented and motivated person, who is a real team player and can collaborate closely with engineers from other disciplines and quantum physicists.
Responsibilities:
Practicing the full range of verification aspects
Creating a verification environment from scratch (drivers, monitors, coverage...)
VIP (DDR/PCIe/AXI) integration
Defining verification sequences via a complex control-flow constraint set
System understanding of a full-stack product with strong HW-SW coupling
Reference model integration
Test plan definition
Defining verification flows and creating the proper infrastructure to support it.
Requirements:
3- 5 years of experience with UVM, System Verilog.
Ability to ramp up verification environments from scratch.
Knowledge of Verification IPs and protocols (PCIe, DDR, AXI).
Good understanding of HW/SW interaction- Advantage
Knowledge in C/C++/Python/System C - Advantage.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8877199
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סגור
דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
סגור
v נשלח
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
29/10/2026
Location: Tel Aviv-Yafo
Job Type: Full Time
We are seeking for a passionate and skilled Validation Engineer to join our core R&D team. As a Validation Engineer, you'll play a critical role in ensuring the quality, reliability, and performance of our state-of-the-art quantum control systems. You will design, develop, and execute validation plans for complex hardware-software systems, contributing directly to the advancement of quantum technologies.
This role is ideal for engineers with good programming skills, a strong technical culture, and a passion for working at the intersection of software, hardware, and quantum science.
Main Responsibilities:
Design and Implement Validation Methods: Design, implement and execute comprehensive validation test plans for our quantum control platforms and solutions
Automated Tests and Automation Frameworks: Contribute to the development of automated testing infrastructures to streamline validation processes and implement system tests based on the defined test plans
AI/ LLM Tools: Apply AI/LLM tools to accelerate test code generation and continuously improve the validation toolchain, driving measurable gains in engineering productivity
Data Analysis: Collect, interpret, and document data from system tests/experiments to assess system performance and identify areas for improvement
System Debugging & Troubleshooting: Identify, reproduce, and analyze issues across system components with other engineering teams
Collaborate Across Teams: Collaborate closely with R&D and product teams to define test coverage and quality acceptance criteria
Release & Quality Assurance Process: Participate in regression testing and CI/CD for new feature rollouts and product releases
Maintain and Improve Test Setups: Oversee the setup, calibration, and enhancement of test equipment and environments.
Requirements:
M.Sc./PhD in Electrical Engineering, Computer Science, Physics, or a related field. - Must
3+ years of professional experience with Python or other high level programming language - Must
Deep understanding of hardware-software system architecture and debugging- Must
Excellent problem-solving, team-player and communication skills- Must
Experience using AI tools to accelerate test development - e.g., leveraging LLM-based coding assistants (GitHub Copilot, Claude, Cursor, etc.) to generate and maintain test code, scripts, and validation tooling. Comfortable evaluating AI-generated code for correctness and integrating it into existing test frameworks and CI/CD pipelines- Advantage
Enjoys working in a highly driven multi-disciplinary team
Strong technical background with experience in validation, test automation, or system integration - Advantage
Experience working with lab instruments and signal processing tools- Advantage
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8877196
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סגור
דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
סגור
v נשלח
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
29/10/2026
Location: Tel Aviv-Yafo
Job Type: Full Time
We are looking for a Verification Engineer who embodies ambition and positivity, who can passionately take ownership of their responsibilities, collaborating effectively with remote teams to not only meet but exceed our objectives and fulfil the evolving needs of our expanding customer base.
The Verification engineer we look for will be a highly talented and motivated person, who is a real team player and can collaborate closely with engineers from other disciplines and quantum physicists.
Responsibilities:
Practicing the full range of verification aspects
Creating a verification environment from scratch (drivers, monitors, coverage...)
VIP (DDR/PCIe/AXI) integration
Defining verification sequences via a complex control-flow constraint set
System understanding of a full-stack product with strong HW-SW coupling
Reference model integration
Test plan definition
Defining verification flows and creating the proper infrastructure to support it.
Requirements:
At least 5 years of experience.
Ability to ramp up verification environments from scratch
Experience with UVM, System Verilog - Advantage
Knowledge of Verification IPs and protocols (PCIe, DDR, AXI)
Good understanding of HW/SW interaction- Advantage
Knowledge in C/C++/Python/System C - Advantage.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8877183
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סגור
דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
סגור
v נשלח
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
26/10/2026
Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
We are looking for talented engineers to join the Pre-silicon Verification team and help us technically lead the challenges of the next decade, developing a semiconductor platform based on revolutionary architecture, and taking part in the development of cutting-edge products within a disruptive system architecture.
Youll have the opportunity to work on the technologies that power the worlds largest cloud provider, in a dynamic, open, and fast-paced environment.
Requirements:
Basic Qualifications
- B.Sc. in Electrical or Computer Engineering. Please include your academic transcript with your CV in a single PDF.
- Understanding of object-oriented programming concepts.
- Knowledge of Verilog/SystemVerilog/Specman.

Preferred Qualifications
- Familiarity with hardware verification concepts and tools (UVM , Coverage Driven verification).
- Experience with at least one scripting language (Python, Perl, Bash, or Tcl).
- Knowledge of PCIe, Processors, Ethernet, DDR.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8873522
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דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
סגור
v נשלח
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Required Senior DDR Design Verification Engineer, Cloud
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
In this role, you will work as part of a Research and Development team. You will build verification components, constrained-random testing, and system testing. You will verify digital designs, collaborate closely with colleagues on projects, and perform direct validation. You will construct testbenches that exercise hardware through corner-cases and expose bugs. You will manage the full life-cycle from planning and execution to closing coverage.
Responsibilities
Plan the verification of digital design blocks by fully understanding the design specification and interacting with design engineers to identify important verification scenarios.
Create and enhance constrained-random verification environments using SystemVerilog and UVM, or formally verify designs with SVA and industry leading formal tools.
Identify and write all types of coverage measures for corner-cases.
Debug tests with design engineers to deliver functionally correct design blocks.
Close coverage measures to identify verification holes and to show progress towards tape-out.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering or equivalent practical experience.
8 years of experience with creating and using verification components and environments in standard verification methodology.
Experience verifying digital logic at RTL level using SystemVerilog or Specman/E for FPGAs or ASICs.
Preferred qualifications:
Master's degree or PhD in Electrical Engineering, or a related field.
Experience with verification techniques, and the full verification life cycle.
Experience with Application-Specific Integrated Circuit (ASIC) standard interfaces and memory system architecture.
Experience with performance verification of ASICs and ASIC components.
Experience in DDR PHY/Controller verification activities.
Experience in DDR SoC integration and verification.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8847280
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שירות זה פתוח ללקוחות VIP בלבד
סגור
דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
סגור
v נשלח
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Required SoC Design Verification Engineer, Cloud
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As a System on a Chip (SoC) Design Verification Engineer, you will work as part of a Research and Development team. You will build verification components, constrained-random testing, system testing, and drive verification closure.
As part of our server chip design team, you will verify digital designs. You will collaborate closely with design and verification engineers on projects and perform direct verification. You will build efficient and effective constrained-random verification environments that exercise designs through their corner-cases and expose all types of bugs. You will manage the full life-cycle of verification, which can range from verification planning, test execution, to collecting and closing coverage.
Responsibilities
Plan the verification of digital design blocks by fully understanding the design specification and interacting with design engineers to identify important verification scenarios.
Create and enhance constrained-random verification environments using SystemVerilog and Universal Verification Methodology (UVM), or formally verify designs with SystemVerilog Assertion (SVA) and industry leading formal tools.
Identify and write all types of coverage measures for corner-cases.
Debug tests with design engineers to deliver functionally correct design blocks.
Close coverage measures to identify verification holes and to show progress towards tape-out.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
4 years of experience with creating and using verification components and environments in standard verification methodology.
Experience verifying digital systems using standard IP components/interconnects (microprocessor cores, hierarchical memory subsystems).
Experience verifying digital logic at RTL level using SystemVerilog or Specman/E for FPGAs or ASICs.
Preferred qualifications:
Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
Experience with verification techniques, and the full verification life-cycle.
Experience with performance verification of ASICs and ASIC components.
Experience with ASIC standard interfaces and memory system architecture.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8847220
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סגור
דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
סגור
v נשלח
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Required Emulation Verification Tech Lead, Cloud
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
Responsibilities
Lead, plan and execute the verification of digital design blocks by understanding specifications and working with design engineers to define key verification scenarios.
Develop, execute, and debug full-chip/system on a chip (SoC) tests on emulation platforms.
Collaborate with design engineers to debug tests and ensure functional correctness of design blocks.
Define and implement various coverage measures to capture stimulus and corner-case scenarios. Work with software and post-silicon validation teams to reproduce failures on emulation.
Drive coverage analysis to identify verification gaps and demonstrate progress towards tape-out. Explore new verification and emulation methodologies and implement them.
Requirements:
Minimum qualifications:
Bachelor's degree in Computer Science, Electrical Engineering, or equivalent practical experience.
10 years of Experience with full-chip/SoC verification (e.g., test definition, creation, execution, and debug)
Experience developing full-chip/SoC tests using these environments/tools: ASM, C, C++, Perspec, Threadmill, OS, or drivers.
Experience with execution and RTL/firmware/software debug on hardware emulation (e.g., ZeBu Server, Palladium, Veloce) or FPGA (e.g., EP, HAPS, Protium).
Experience with design debug tools (e.g., Verdi, Verisium).
Experience with coding and scripting in C, C++, Perl, TCL, or Python.
Preferred qualifications:
Experience with associated EDA tools, automation, and flow enhancements.
Experience with coding in Verilog/SystemVerilog (for design).
Experience in embedded software and firmware (e.g., Linux drivers, firmware validation).
Understanding of RTL to emulation/FPGA flows including emulation test benches (e.g., transactors/accelerated VIPs, hybrid, in-circuit emulation).
Understanding of SoC architecture and interfaces (e.g., CPU, DDR, PCIe, interconnect, Ethernet, etc.).
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8846917
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